Index: /trunk/src/VBox/Devices/Graphics/DevVGA-SVGA.cpp
===================================================================
--- /trunk/src/VBox/Devices/Graphics/DevVGA-SVGA.cpp	(revision 65297)
+++ /trunk/src/VBox/Devices/Graphics/DevVGA-SVGA.cpp	(revision 65298)
@@ -2868,5 +2868,5 @@
     Assert(offFifoMin < offFifoMax);
     Assert(offCurrentCmd >= offFifoMin && offCurrentCmd < offFifoMax);
-    Assert(offFifoMax <= VMSVGA_FIFO_SIZE);
+    Assert(offFifoMax <= pThis->svga.cbFIFO);
 
     /*
@@ -3029,5 +3029,5 @@
      * (All code must return via the end of the function to free this buffer.)
      */
-    uint8_t *pbBounceBuf = (uint8_t *)RTMemAllocZ(VMSVGA_FIFO_SIZE);
+    uint8_t *pbBounceBuf = (uint8_t *)RTMemAllocZ(pThis->svga.cbFIFO);
     AssertReturn(pbBounceBuf, VERR_NO_MEMORY);
 
@@ -3130,5 +3130,5 @@
         if (RT_UNLIKELY(   !VMSVGA_IS_VALID_FIFO_REG(SVGA_FIFO_STOP, offFifoMin)
                         || offFifoMax <= offFifoMin
-                        || offFifoMax > VMSVGA_FIFO_SIZE
+                        || offFifoMax > pThis->svga.cbFIFO
                         || (offFifoMax & 3) != 0
                         || (offFifoMin & 3) != 0
@@ -3339,5 +3339,5 @@
 
                 /* Refetch the command buffer with the variable data; undo size increase (ugly) */
-                AssertBreak(pEscape->size < VMSVGA_FIFO_SIZE);
+                AssertBreak(pEscape->size < pThis->svga.cbFIFO);
                 uint32_t cbCmd = sizeof(SVGAFifoCmdEscape) + pEscape->size;
                 VMSVGAFIFO_GET_MORE_CMD_BUFFER_BREAK(pEscape, SVGAFifoCmdEscape, cbCmd);
@@ -3440,5 +3440,5 @@
                     else
                     {
-                        AssertBreak(pCmd->numPages <= VMSVGA_FIFO_SIZE / cbPageDesc);
+                        AssertBreak(pCmd->numPages <= pThis->svga.cbFIFO / cbPageDesc);
                         cbCmd += cbPageDesc * pCmd->numPages;
                     }
@@ -3711,5 +3711,5 @@
                     SVGA3dCmdHeader *pHdr;
                     VMSVGAFIFO_GET_CMD_BUFFER_BREAK(pHdr, SVGA3dCmdHeader, sizeof(*pHdr));
-                    AssertBreak(pHdr->size < VMSVGA_FIFO_SIZE);
+                    AssertBreak(pHdr->size < pThis->svga.cbFIFO);
                     uint32_t cbCmd = sizeof(SVGA3dCmdHeader) + pHdr->size;
                     VMSVGAFIFO_GET_MORE_CMD_BUFFER_BREAK(pHdr, SVGA3dCmdHeader, cbCmd);
@@ -4445,5 +4445,5 @@
             if (RT_SUCCESS(rc))
             {
-                rc = PGMHandlerPhysicalRegister(PDMDevHlpGetVM(pDevIns), GCPhysAddress, GCPhysAddress + (VMSVGA_FIFO_SIZE - 1),
+                rc = PGMHandlerPhysicalRegister(PDMDevHlpGetVM(pDevIns), GCPhysAddress, GCPhysAddress + (pThis->svga.cbFIFO - 1),
                                                 pThis->svga.hFifoAccessHandlerType, pThis, NIL_RTR0PTR, NIL_RTRCPTR,
                                                 "VMSVGA FIFO");
Index: /trunk/src/VBox/Devices/Graphics/DevVGA-SVGA.h
===================================================================
--- /trunk/src/VBox/Devices/Graphics/DevVGA-SVGA.h	(revision 65297)
+++ /trunk/src/VBox/Devices/Graphics/DevVGA-SVGA.h	(revision 65298)
@@ -26,5 +26,6 @@
 
 /** Default FIFO size. */
-#define VMSVGA_FIFO_SIZE                0x20000
+#define VMSVGA_FIFO_SIZE                _128K
+
 /** Default scratch region size. */
 #define VMSVGA_SCRATCH_SIZE             0x100
@@ -192,4 +193,5 @@
     /** Physical address of command mmio range. */
     RTIOPORT                    BasePort;
+    RTIOPORT                    Padding3;
     /** Port io index register. */
     uint32_t                    u32IndexReg;
Index: /trunk/src/VBox/Devices/Graphics/DevVGA.cpp
===================================================================
--- /trunk/src/VBox/Devices/Graphics/DevVGA.cpp	(revision 65297)
+++ /trunk/src/VBox/Devices/Graphics/DevVGA.cpp	(revision 65298)
@@ -6091,4 +6091,5 @@
 #ifdef VBOX_WITH_VMSVGA
                                           "VMSVGAEnabled\0"
+                                          "VMSVGAFifoSize\0"
 #endif
 #ifdef VBOX_WITH_VMSVGA3D
@@ -6130,4 +6131,11 @@
     AssertLogRelRCReturn(rc, rc);
     Log(("VMSVGA: VMSVGAEnabled   = %d\n", pThis->fVMSVGAEnabled));
+
+    rc = CFGMR3QueryU32Def(pCfg, "VMSVGAFifoSize", &pThis->svga.cbFIFO, VMSVGA_FIFO_SIZE);
+    AssertLogRelRCReturn(rc, rc);
+    AssertLogRelMsgReturn(pThis->svga.cbFIFO >= _128K, ("cbFIFO=%#x\n", pThis->svga.cbFIFO), VERR_OUT_OF_RANGE);
+    AssertLogRelMsgReturn(pThis->svga.cbFIFO <=  _16M, ("cbFIFO=%#x\n", pThis->svga.cbFIFO), VERR_OUT_OF_RANGE);
+    AssertLogRelMsgReturn(RT_IS_POWER_OF_TWO(pThis->svga.cbFIFO), ("cbFIFO=%#x\n", pThis->svga.cbFIFO), VERR_NOT_POWER_OF_TWO);
+    Log(("VMSVGA: VMSVGAFifoSize  = %#x (%'u)\n", pThis->svga.cbFIFO, pThis->svga.cbFIFO));
 #endif
 #ifdef VBOX_WITH_VMSVGA3D
@@ -6247,5 +6255,5 @@
         if (RT_FAILURE(rc))
             return rc;
-        rc = PDMDevHlpPCIIORegionRegister(pDevIns, 2 /* iRegion */, VMSVGA_FIFO_SIZE,
+        rc = PDMDevHlpPCIIORegionRegister(pDevIns, 2 /* iRegion */, pThis->svga.cbFIFO,
                                           PCI_ADDRESS_SPACE_MEM /* PCI_ADDRESS_SPACE_MEM_PREFETCH */, vmsvgaR3IORegionMap);
         if (RT_FAILURE(rc))
@@ -6277,11 +6285,10 @@
          * Allocate and initialize the FIFO MMIO2 memory.
          */
-        rc = PDMDevHlpMMIO2Register(pDevIns, &pThis->Dev, 2 /*iRegion*/, VMSVGA_FIFO_SIZE,
+        rc = PDMDevHlpMMIO2Register(pDevIns, &pThis->Dev, 2 /*iRegion*/, pThis->svga.cbFIFO,
                                     0 /*fFlags*/, (void **)&pThis->svga.pFIFOR3, "VMSVGA-FIFO");
         if (RT_FAILURE(rc))
             return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS,
-                                        N_("Failed to allocate %u bytes of memory for the VMSVGA device"), VMSVGA_FIFO_SIZE);
+                                        N_("Failed to allocate %u bytes of memory for the VMSVGA device"), pThis->svga.cbFIFO);
         pThis->svga.pFIFOR0 = (RTR0PTR)pThis->svga.pFIFOR3;
-        pThis->svga.cbFIFO  = VMSVGA_FIFO_SIZE;
     }
 #else
@@ -6315,6 +6322,6 @@
         {
             RTR0PTR pR0Mapping = 0;
-            rc = PDMDevHlpMMIO2MapKernel(pDevIns, 2 /* iRegion */, 0 /* off */,  VMSVGA_FIFO_SIZE, "VMSVGA-FIFO", &pR0Mapping);
-            AssertLogRelMsgRCReturn(rc, ("PDMDevHlpMapMMIO2IntoR0(%#x,) -> %Rrc\n", VMSVGA_FIFO_SIZE, rc), rc);
+            rc = PDMDevHlpMMIO2MapKernel(pDevIns, 2 /* iRegion */, 0 /* off */,  pThis->svga.cbFIFO, "VMSVGA-FIFO", &pR0Mapping);
+            AssertLogRelMsgRCReturn(rc, ("PDMDevHlpMapMMIO2IntoR0(%#x,) -> %Rrc\n", pThis->svga.cbFIFO, rc), rc);
             pThis->svga.pFIFOR0 = pR0Mapping;
         }