Index: /trunk/src/VBox/Devices/Audio/DevIchAc97.cpp =================================================================== --- /trunk/src/VBox/Devices/Audio/DevIchAc97.cpp (revision 61902) +++ /trunk/src/VBox/Devices/Audio/DevIchAc97.cpp (revision 61903) @@ -46,5 +46,5 @@ *********************************************************************************************************************************/ -#ifdef DEBUG_andy +#if 0 /* * AC97_DEBUG_DUMP_PCM_DATA enables dumping the raw PCM data @@ -58,5 +58,5 @@ # define AC97_DEBUG_DUMP_PCM_DATA_PATH "/tmp/" # endif -#endif /* DEBUG_andy */ +#endif /** Current saved state version. */ @@ -67,69 +67,69 @@ /** @todo Use AC97_ prefixes! */ -#define SR_FIFOE RT_BIT(4) /* rwc, FIFO error. */ -#define SR_BCIS RT_BIT(3) /* rwc, Buffer completion interrupt status. */ -#define SR_LVBCI RT_BIT(2) /* rwc, Last valid buffer completion interrupt. */ -#define SR_CELV RT_BIT(1) /* ro, Current equals last valid. */ -#define SR_DCH RT_BIT(0) /* ro, Controller halted. */ -#define SR_VALID_MASK (RT_BIT(5) - 1) -#define SR_WCLEAR_MASK (SR_FIFOE | SR_BCIS | SR_LVBCI) -#define SR_RO_MASK (SR_DCH | SR_CELV) -#define SR_INT_MASK (SR_FIFOE | SR_BCIS | SR_LVBCI) - -#define CR_IOCE RT_BIT(4) /* rw, Interrupt On Completion Enable. */ -#define CR_FEIE RT_BIT(3) /* rw FIFO Error Interrupt Enable. */ -#define CR_LVBIE RT_BIT(2) /* rw Last Valid Buffer Interrupt Enable. */ -#define CR_RR RT_BIT(1) /* rw Reset Registers. */ -#define CR_RPBM RT_BIT(0) /* rw Run/Pause Bus Master. */ -#define CR_VALID_MASK (RT_BIT(5) - 1) -#define CR_DONT_CLEAR_MASK (CR_IOCE | CR_FEIE | CR_LVBIE) - -#define GC_WR 4 /* rw */ -#define GC_CR 2 /* rw */ -#define GC_VALID_MASK (RT_BIT(6) - 1) - -#define GS_MD3 RT_BIT(17) /* rw */ -#define GS_AD3 RT_BIT(16) /* rw */ -#define GS_RCS RT_BIT(15) /* rwc */ -#define GS_B3S12 RT_BIT(14) /* ro */ -#define GS_B2S12 RT_BIT(13) /* ro */ -#define GS_B1S12 RT_BIT(12) /* ro */ -#define GS_S1R1 RT_BIT(11) /* rwc */ -#define GS_S0R1 RT_BIT(10) /* rwc */ -#define GS_S1CR RT_BIT(9) /* ro */ -#define GS_S0CR RT_BIT(8) /* ro */ -#define GS_MINT RT_BIT(7) /* ro */ -#define GS_POINT RT_BIT(6) /* ro */ -#define GS_PIINT RT_BIT(5) /* ro */ -#define GS_RSRVD (RT_BIT(4)|RT_BIT(3)) -#define GS_MOINT RT_BIT(2) /* ro */ -#define GS_MIINT RT_BIT(1) /* ro */ -#define GS_GSCI RT_BIT(0) /* rwc */ -#define GS_RO_MASK (GS_B3S12 | \ - GS_B2S12 | \ - GS_B1S12 | \ - GS_S1CR | \ - GS_S0CR | \ - GS_MINT | \ - GS_POINT | \ - GS_PIINT | \ - GS_RSRVD | \ - GS_MOINT | \ - GS_MIINT) -#define GS_VALID_MASK (RT_BIT(18) - 1) -#define GS_WCLEAR_MASK (GS_RCS|GS_S1R1|GS_S0R1|GS_GSCI) +#define AC97_SR_FIFOE RT_BIT(4) /* rwc, FIFO error. */ +#define AC97_SR_BCIS RT_BIT(3) /* rwc, Buffer completion interrupt status. */ +#define AC97_SR_LVBCI RT_BIT(2) /* rwc, Last valid buffer completion interrupt. */ +#define AC97_SR_CELV RT_BIT(1) /* ro, Current equals last valid. */ +#define AC97_SR_DCH RT_BIT(0) /* ro, Controller halted. */ +#define AC97_SR_VALID_MASK (RT_BIT(5) - 1) +#define AC97_SR_WCLEAR_MASK (AC97_SR_FIFOE | AC97_SR_BCIS | AC97_SR_LVBCI) +#define AC97_SR_RO_MASK (AC97_SR_DCH | AC97_SR_CELV) +#define AC97_SR_INT_MASK (AC97_SR_FIFOE | AC97_SR_BCIS | AC97_SR_LVBCI) + +#define AC97_CR_IOCE RT_BIT(4) /* rw, Interrupt On Completion Enable. */ +#define AC97_CR_FEIE RT_BIT(3) /* rw FIFO Error Interrupt Enable. */ +#define AC97_CR_LVBIE RT_BIT(2) /* rw Last Valid Buffer Interrupt Enable. */ +#define AC97_CR_RR RT_BIT(1) /* rw Reset Registers. */ +#define AC97_CR_RPBM RT_BIT(0) /* rw Run/Pause Bus Master. */ +#define AC97_CR_VALID_MASK (RT_BIT(5) - 1) +#define AC97_CR_DONT_CLEAR_MASK (AC97_CR_IOCE | AC97_CR_FEIE | AC97_CR_LVBIE) + +#define AC97_GC_WR 4 /* rw */ +#define AC97_GC_CR 2 /* rw */ +#define AC97_GC_VALID_MASK (RT_BIT(6) - 1) + +#define AC97_GS_MD3 RT_BIT(17) /* rw */ +#define AC97_GS_AD3 RT_BIT(16) /* rw */ +#define AC97_GS_RCS RT_BIT(15) /* rwc */ +#define AC97_GS_B3S12 RT_BIT(14) /* ro */ +#define AC97_GS_B2S12 RT_BIT(13) /* ro */ +#define AC97_GS_B1S12 RT_BIT(12) /* ro */ +#define AC97_GS_S1R1 RT_BIT(11) /* rwc */ +#define AC97_GS_S0R1 RT_BIT(10) /* rwc */ +#define AC97_GS_S1CR RT_BIT(9) /* ro */ +#define AC97_GS_S0CR RT_BIT(8) /* ro */ +#define AC97_GS_MINT RT_BIT(7) /* ro */ +#define AC97_GS_POINT RT_BIT(6) /* ro */ +#define AC97_GS_PIINT RT_BIT(5) /* ro */ +#define AC97_GS_RSRVD (RT_BIT(4)|RT_BIT(3)) +#define AC97_GS_MOINT RT_BIT(2) /* ro */ +#define AC97_GS_MIINT RT_BIT(1) /* ro */ +#define AC97_GS_GSCI RT_BIT(0) /* rwc */ +#define AC97_GS_RO_MASK (AC97_GS_B3S12 | \ + AC97_GS_B2S12 | \ + AC97_GS_B1S12 | \ + AC97_GS_S1CR | \ + AC97_GS_S0CR | \ + AC97_GS_MINT | \ + AC97_GS_POINT | \ + AC97_GS_PIINT | \ + AC97_GS_RSRVD | \ + AC97_GS_MOINT | \ + AC97_GS_MIINT) +#define AC97_GS_VALID_MASK (RT_BIT(18) - 1) +#define AC97_GS_WCLEAR_MASK (AC97_GS_RCS|AC97_GS_S1R1|AC97_GS_S0R1|AC97_GS_GSCI) /** @name Buffer Descriptor (BD). * @{ */ -#define BD_IOC RT_BIT(31) /**< Interrupt on Completion. */ -#define BD_BUP RT_BIT(30) /**< Buffer Underrun Policy. */ - -#define BD_MAX_LEN_MASK 0xFFFE +#define AC97_BD_IOC RT_BIT(31) /**< Interrupt on Completion. */ +#define AC97_BD_BUP RT_BIT(30) /**< Buffer Underrun Policy. */ + +#define AC97_BD_MAX_LEN_MASK 0xFFFE /** @} */ /** @name Extended Audio Status and Control Register (EACS). * @{ */ -#define EACS_VRA 1 /**< Variable Rate Audio (4.2.1.1). */ -#define EACS_VRM 8 /**< Variable Rate Mic Audio (4.2.1.1). */ +#define AC97_EACS_VRA 1 /**< Variable Rate Audio (4.2.1.1). */ +#define AC97_EACS_VRM 8 /**< Variable Rate Mic Audio (4.2.1.1). */ /** @} */ @@ -147,15 +147,15 @@ /** @} */ -#define REC_MASK 7 +#define AC97_REC_MASK 7 enum { - REC_MIC = 0, - REC_CD, - REC_VIDEO, - REC_AUX, - REC_LINE_IN, - REC_STEREO_MIX, - REC_MONO_MIX, - REC_PHONE + AC97_REC_MIC = 0, + AC97_REC_CD, + AC97_REC_VIDEO, + AC97_REC_AUX, + AC97_REC_LINE_IN, + AC97_REC_STEREO_MIX, + AC97_REC_MONO_MIX, + AC97_REC_PHONE }; @@ -198,13 +198,14 @@ /* Codec models. */ -enum { - Codec_STAC9700 = 0, /* SigmaTel STAC9700 */ - Codec_AD1980, /* Analog Devices AD1980 */ - Codec_AD1981B /* Analog Devices AD1981B */ -}; +typedef enum +{ + AC97_CODEC_STAC9700 = 0, /* SigmaTel STAC9700 */ + AC97_CODEC_AD1980, /* Analog Devices AD1980 */ + AC97_CODEC_AD1981B /* Analog Devices AD1981B */ +} AC97CODEC; /* Analog Devices miscellaneous regiter bits used in AD1980. */ -#define AD_MISC_LOSEL RT_BIT(5) /* Surround (rear) goes to line out outputs. */ -#define AD_MISC_HPSEL RT_BIT(10) /* PCM (front) goes to headphone outputs. */ +#define AC97_AD_MISC_LOSEL RT_BIT(5) /* Surround (rear) goes to line out outputs. */ +#define AC97_AD_MISC_HPSEL RT_BIT(10) /* PCM (front) goes to headphone outputs. */ #define ICHAC97STATE_2_DEVINS(a_pAC97) ((a_pAC97)->pDevInsR3) @@ -231,13 +232,13 @@ typedef enum { - PI_INDEX = 0, /** PCM in */ - PO_INDEX, /** PCM out */ - MC_INDEX, /** Mic in */ - LAST_INDEX + AC97SOUNDSOURCE_PI_INDEX = 0, /** PCM in */ + AC97SOUNDSOURCE_PO_INDEX, /** PCM out */ + AC97SOUNDSOURCE_MC_INDEX, /** Mic in */ + AC97SOUNDSOURCE_LAST_INDEX } AC97SOUNDSOURCE; -AC97_NABMBAR_REGS(PI, PI_INDEX * 16); -AC97_NABMBAR_REGS(PO, PO_INDEX * 16); -AC97_NABMBAR_REGS(MC, MC_INDEX * 16); +AC97_NABMBAR_REGS(PI, AC97SOUNDSOURCE_PI_INDEX * 16); +AC97_NABMBAR_REGS(PO, AC97SOUNDSOURCE_PO_INDEX * 16); +AC97_NABMBAR_REGS(MC, AC97SOUNDSOURCE_MC_INDEX * 16); #endif @@ -245,9 +246,9 @@ { /** NABMBAR: Global Control Register. */ - GLOB_CNT = 0x2c, + AC97_GLOB_CNT = 0x2c, /** NABMBAR Global Status. */ - GLOB_STA = 0x30, + AC97_GLOB_STA = 0x30, /** Codec Access Semaphore Register. */ - CAS = 0x34 + AC97_CAS = 0x34 }; @@ -454,7 +455,7 @@ switch (uIndex) { - case PI_INDEX: return pThis->pSinkLineIn; break; - case PO_INDEX: return pThis->pSinkOutput; break; - case MC_INDEX: return pThis->pSinkMicIn; break; + case AC97SOUNDSOURCE_PI_INDEX: return pThis->pSinkLineIn; break; + case AC97SOUNDSOURCE_PO_INDEX: return pThis->pSinkOutput; break; + case AC97SOUNDSOURCE_MC_INDEX: return pThis->pSinkMicIn; break; default: break; } @@ -480,9 +481,9 @@ pRegs->bd.ctl_len = RT_H2LE_U32(u32[1]); #endif - pRegs->picb = pRegs->bd.ctl_len & BD_MAX_LEN_MASK; + pRegs->picb = pRegs->bd.ctl_len & AC97_BD_MAX_LEN_MASK; LogFlowFunc(("bd %2d addr=%#x ctl=%#06x len=%#x(%d bytes)\n", pRegs->civ, pRegs->bd.addr, pRegs->bd.ctl_len >> 16, - pRegs->bd.ctl_len & BD_MAX_LEN_MASK, - (pRegs->bd.ctl_len & BD_MAX_LEN_MASK) << 1)); /** @todo r=andy Assumes 16bit samples. */ + pRegs->bd.ctl_len & AC97_BD_MAX_LEN_MASK, + (pRegs->bd.ctl_len & AC97_BD_MAX_LEN_MASK) << 1)); /** @todo r=andy Assumes 16bit samples. */ } @@ -498,8 +499,8 @@ int iIRQL; - uint32_t new_mask = new_sr & SR_INT_MASK; - uint32_t old_mask = pRegs->sr & SR_INT_MASK; - - static uint32_t const masks[] = { GS_PIINT, GS_POINT, GS_MINT }; + uint32_t new_mask = new_sr & AC97_SR_INT_MASK; + uint32_t old_mask = pRegs->sr & AC97_SR_INT_MASK; + + static uint32_t const masks[] = { AC97_GS_PIINT, AC97_GS_POINT, AC97_GS_MINT }; if (new_mask ^ old_mask) @@ -511,10 +512,10 @@ iIRQL = 0; } - else if ((new_mask & SR_LVBCI) && (pRegs->cr & CR_LVBIE)) + else if ((new_mask & AC97_SR_LVBCI) && (pRegs->cr & AC97_CR_LVBIE)) { fSignal = true; iIRQL = 1; } - else if ((new_mask & SR_BCIS) && (pRegs->cr & CR_IOCE)) + else if ((new_mask & AC97_SR_BCIS) && (pRegs->cr & AC97_CR_IOCE)) { fSignal = true; @@ -526,5 +527,5 @@ LogFlowFunc(("IOC%d, LVB%d, sr=%#x, fSignal=%RTbool, IRQL=%d\n", - pRegs->sr & SR_BCIS, pRegs->sr & SR_LVBCI, pRegs->sr, fSignal, iIRQL)); + pRegs->sr & AC97_SR_BCIS, pRegs->sr & AC97_SR_LVBCI, pRegs->sr, fSignal, iIRQL)); if (fSignal) @@ -596,9 +597,9 @@ pRegs->lvi = 0; - ichac97StreamUpdateStatus(pThis, pStream, SR_DCH); /** @todo Do we need to do that? */ + ichac97StreamUpdateStatus(pThis, pStream, AC97_SR_DCH); /** @todo Do we need to do that? */ pRegs->picb = 0; pRegs->piv = 0; - pRegs->cr = pRegs->cr & CR_DONT_CLEAR_MASK; + pRegs->cr = pRegs->cr & AC97_CR_DONT_CLEAR_MASK; pRegs->bd_valid = 0; @@ -640,7 +641,7 @@ LogFlowFuncEnter(); - ichac97StreamInit(pThis, &pThis->StreamLineIn, PI_INDEX); - ichac97StreamInit(pThis, &pThis->StreamMicIn, MC_INDEX); - ichac97StreamInit(pThis, &pThis->StreamOut, PO_INDEX); + ichac97StreamInit(pThis, &pThis->StreamLineIn, AC97SOUNDSOURCE_PI_INDEX); + ichac97StreamInit(pThis, &pThis->StreamMicIn, AC97SOUNDSOURCE_MC_INDEX); + ichac97StreamInit(pThis, &pThis->StreamOut, AC97SOUNDSOURCE_PO_INDEX); return VINF_SUCCESS; @@ -845,5 +846,5 @@ AssertPtrReturn(pThis, VERR_INVALID_POINTER); AssertPtrReturn(pStream, VERR_INVALID_POINTER); - AssertReturn(u8Strm <= LAST_INDEX, VERR_INVALID_PARAMETER); + AssertReturn(u8Strm <= AC97SOUNDSOURCE_LAST_INDEX, VERR_INVALID_PARAMETER); AssertPtrReturn(pCfg, VERR_INVALID_POINTER); @@ -856,13 +857,13 @@ switch (pStream->u8Strm) { - case PI_INDEX: + case AC97SOUNDSOURCE_PI_INDEX: rc = ichac97CreateIn(pThis, "ac97.pi", PDMAUDIORECSOURCE_LINE, pCfg); break; - case MC_INDEX: + case AC97SOUNDSOURCE_MC_INDEX: rc = ichac97CreateIn(pThis, "ac97.mc", PDMAUDIORECSOURCE_MIC, pCfg); break; - case PO_INDEX: + case AC97SOUNDSOURCE_PO_INDEX: rc = ichac97CreateOut(pThis, "ac97.po", pCfg); break; @@ -889,5 +890,5 @@ switch (u8Strm) { - case PI_INDEX: + case AC97SOUNDSOURCE_PI_INDEX: streamCfg.uHz = ichac97MixerGet(pThis, AC97_PCM_LR_ADC_Rate); streamCfg.enmDir = PDMAUDIODIR_IN; @@ -895,5 +896,5 @@ break; - case MC_INDEX: + case AC97SOUNDSOURCE_MC_INDEX: streamCfg.uHz = ichac97MixerGet(pThis, AC97_MIC_ADC_Rate); streamCfg.enmDir = PDMAUDIODIR_IN; @@ -901,5 +902,5 @@ break; - case PO_INDEX: + case AC97SOUNDSOURCE_PO_INDEX: streamCfg.uHz = ichac97MixerGet(pThis, AC97_PCM_Front_DAC_Rate); streamCfg.enmDir = PDMAUDIODIR_OUT; @@ -1086,10 +1087,10 @@ switch (i) { - case REC_MIC: return PDMAUDIORECSOURCE_MIC; - case REC_CD: return PDMAUDIORECSOURCE_CD; - case REC_VIDEO: return PDMAUDIORECSOURCE_VIDEO; - case REC_AUX: return PDMAUDIORECSOURCE_AUX; - case REC_LINE_IN: return PDMAUDIORECSOURCE_LINE; - case REC_PHONE: return PDMAUDIORECSOURCE_PHONE; + case AC97_REC_MIC: return PDMAUDIORECSOURCE_MIC; + case AC97_REC_CD: return PDMAUDIORECSOURCE_CD; + case AC97_REC_VIDEO: return PDMAUDIORECSOURCE_VIDEO; + case AC97_REC_AUX: return PDMAUDIORECSOURCE_AUX; + case AC97_REC_LINE_IN: return PDMAUDIORECSOURCE_LINE; + case AC97_REC_PHONE: return PDMAUDIORECSOURCE_PHONE; default: break; @@ -1104,10 +1105,10 @@ switch (rs) { - case PDMAUDIORECSOURCE_MIC: return REC_MIC; - case PDMAUDIORECSOURCE_CD: return REC_CD; - case PDMAUDIORECSOURCE_VIDEO: return REC_VIDEO; - case PDMAUDIORECSOURCE_AUX: return REC_AUX; - case PDMAUDIORECSOURCE_LINE: return REC_LINE_IN; - case PDMAUDIORECSOURCE_PHONE: return REC_PHONE; + case PDMAUDIORECSOURCE_MIC: return AC97_REC_MIC; + case PDMAUDIORECSOURCE_CD: return AC97_REC_CD; + case PDMAUDIORECSOURCE_VIDEO: return AC97_REC_VIDEO; + case PDMAUDIORECSOURCE_AUX: return AC97_REC_AUX; + case PDMAUDIORECSOURCE_LINE: return AC97_REC_LINE_IN; + case PDMAUDIORECSOURCE_PHONE: return AC97_REC_PHONE; default: break; @@ -1115,11 +1116,11 @@ LogFlowFunc(("Unknown audio recording source %d using MIC\n", rs)); - return REC_MIC; + return AC97_REC_MIC; } static void ichac97RecordSelect(PAC97STATE pThis, uint32_t val) { - uint8_t rs = val & REC_MASK; - uint8_t ls = (val >> 8) & REC_MASK; + uint8_t rs = val & AC97_REC_MASK; + uint8_t ls = (val >> 8) & AC97_REC_MASK; PDMAUDIORECSOURCE ars = ichac97IndextoRecSource(rs); PDMAUDIORECSOURCE als = ichac97IndextoRecSource(ls); @@ -1160,5 +1161,5 @@ ichac97MixerSet(pThis, AC97_MIC_ADC_Rate , 0xbb80); - if (pThis->uCodecModel == Codec_AD1980) + if (pThis->uCodecModel == AC97_CODEC_AD1980) { /* Analog Devices 1980 (AD1980) */ @@ -1168,5 +1169,5 @@ ichac97MixerSet(pThis, AC97_Headphone_Volume_Mute , 0x8000); } - else if (pThis->uCodecModel == Codec_AD1981B) + else if (pThis->uCodecModel == AC97_CODEC_AD1981B) { /* Analog Devices 1981B (AD1981B) */ @@ -1337,6 +1338,6 @@ /* Select audio sink to process. */ - AssertMsg(pStream->u8Strm != PO_INDEX, ("Can't read from output\n")); - PAUDMIXSINK pSink = pStream->u8Strm == MC_INDEX ? pThis->pSinkMicIn : pThis->pSinkLineIn; + AssertMsg(pStream->u8Strm != AC97SOUNDSOURCE_PO_INDEX, ("Can't read from output\n")); + PAUDMIXSINK pSink = pStream->u8Strm == AC97SOUNDSOURCE_MC_INDEX ? pThis->pSinkMicIn : pThis->pSinkLineIn; AssertPtr(pSink); @@ -1494,11 +1495,11 @@ PAC97BMREGS pRegs = &pStream->Regs; - if (pRegs->sr & SR_DCH) /* Controller halted? */ - { - if (pRegs->cr & CR_RPBM) /* Bus master operation starts. */ + if (pRegs->sr & AC97_SR_DCH) /* Controller halted? */ + { + if (pRegs->cr & AC97_CR_RPBM) /* Bus master operation starts. */ { switch (pStream->u8Strm) { - case PO_INDEX: + case AC97SOUNDSOURCE_PO_INDEX: ichac97WriteBUP(pThis, cbToProcess); break; @@ -1515,5 +1516,5 @@ /* BCIS flag still set? Skip iteration. */ - if (pRegs->sr & SR_BCIS) + if (pRegs->sr & AC97_SR_BCIS) { Log3Func(("[SD%RU8] BCIS set\n", pStream->u8Strm)); @@ -1544,5 +1545,5 @@ if (pRegs->civ == pRegs->lvi) { - pRegs->sr |= SR_DCH; /** @todo r=andy Also set CELV? */ + pRegs->sr |= AC97_SR_DCH; /** @todo r=andy Also set CELV? */ pThis->bup_flag = 0; @@ -1551,5 +1552,5 @@ } - pRegs->sr &= ~SR_CELV; + pRegs->sr &= ~AC97_SR_CELV; pRegs->civ = pRegs->piv; pRegs->piv = (pRegs->piv + 1) % 32; /** @todo r=andy Define for max BDLEs? */ @@ -1562,5 +1563,5 @@ switch (pStream->u8Strm) { - case PO_INDEX: + case AC97SOUNDSOURCE_PO_INDEX: { cbToTransfer = RT_MIN((uint32_t)(pRegs->picb << 1), cbLeft); /** @todo r=andy Assumes 16bit samples. */ @@ -1579,6 +1580,6 @@ } - case PI_INDEX: - case MC_INDEX: + case AC97SOUNDSOURCE_PI_INDEX: + case AC97SOUNDSOURCE_MC_INDEX: { cbToTransfer = RT_MIN((uint32_t)(pRegs->picb << 1), cbLeft); /** @todo r=andy Assumes 16bit samples. */ @@ -1607,9 +1608,9 @@ if (!pRegs->picb) { - uint32_t new_sr = pRegs->sr & ~SR_CELV; - - if (pRegs->bd.ctl_len & BD_IOC) + uint32_t new_sr = pRegs->sr & ~AC97_SR_CELV; + + if (pRegs->bd.ctl_len & AC97_BD_IOC) { - new_sr |= SR_BCIS; + new_sr |= AC97_SR_BCIS; } @@ -1619,6 +1620,6 @@ LogFunc(("Underrun CIV (%RU8) == LVI (%RU8)\n", pRegs->civ, pRegs->lvi)); - new_sr |= SR_LVBCI | SR_DCH | SR_CELV; - pThis->bup_flag = (pRegs->bd.ctl_len & BD_BUP) ? BUP_LAST : 0; + new_sr |= AC97_SR_LVBCI | AC97_SR_DCH | AC97_SR_CELV; + pThis->bup_flag = (pRegs->bd.ctl_len & AC97_BD_BUP) ? BUP_LAST : 0; rc = VINF_EOF; @@ -1668,5 +1669,5 @@ switch (uPortIdx) { - case CAS: + case AC97_CAS: /* Codec Access Semaphore Register */ LogFlowFunc(("CAS %d\n", pThis->cas)); @@ -1774,12 +1775,12 @@ AC97_PORT2IDX(uPortIdx), *pu32Val, pRegs->picb, pRegs->piv, pRegs->cr)); break; - case GLOB_CNT: + case AC97_GLOB_CNT: /* Global Control */ *pu32Val = pThis->glob_cnt; LogFlowFunc(("glob_cnt -> %#x\n", *pu32Val)); break; - case GLOB_STA: + case AC97_GLOB_STA: /* Global Status */ - *pu32Val = pThis->glob_sta | GS_S0CR; + *pu32Val = pThis->glob_sta | AC97_GS_S0CR; LogFlowFunc(("glob_sta -> %#x\n", *pu32Val)); break; @@ -1822,7 +1823,7 @@ case MC_LVI: /* Last Valid Index */ - if ((pRegs->cr & CR_RPBM) && (pRegs->sr & SR_DCH)) + if ((pRegs->cr & AC97_CR_RPBM) && (pRegs->sr & AC97_SR_DCH)) { - pRegs->sr &= ~(SR_DCH | SR_CELV); + pRegs->sr &= ~(AC97_SR_DCH | AC97_SR_CELV); pRegs->civ = pRegs->piv; pRegs->piv = (pRegs->piv + 1) % 32; @@ -1838,5 +1839,5 @@ { /* Control Register */ - if (u32Val & CR_RR) /* Busmaster reset */ + if (u32Val & AC97_CR_RR) /* Busmaster reset */ { ichac97StreamResetBMRegs(pThis, pStream); @@ -1844,9 +1845,9 @@ else { - pRegs->cr = u32Val & CR_VALID_MASK; - if (!(pRegs->cr & CR_RPBM)) + pRegs->cr = u32Val & AC97_CR_VALID_MASK; + if (!(pRegs->cr & AC97_CR_RPBM)) { ichac97StreamSetActive(pThis, pStream, false /* fActive */); - pRegs->sr |= SR_DCH; + pRegs->sr |= AC97_SR_DCH; } else @@ -1857,5 +1858,5 @@ ichac97StreamFetchBDLE(pThis, pStream); - pRegs->sr &= ~SR_DCH; + pRegs->sr &= ~AC97_SR_DCH; ichac97StreamSetActive(pThis, pStream, true /* fActive */); } @@ -1868,6 +1869,6 @@ case MC_SR: /* Status Register */ - pRegs->sr |= u32Val & ~(SR_RO_MASK | SR_WCLEAR_MASK); - ichac97StreamUpdateStatus(pThis, pStream, pRegs->sr & ~(u32Val & SR_WCLEAR_MASK)); + pRegs->sr |= u32Val & ~(AC97_SR_RO_MASK | AC97_SR_WCLEAR_MASK); + ichac97StreamUpdateStatus(pThis, pStream, pRegs->sr & ~(u32Val & AC97_SR_WCLEAR_MASK)); LogFlowFunc(("SR[%d] <- %#x (sr %#x)\n", AC97_PORT2IDX(uPortIdx), u32Val, pRegs->sr)); break; @@ -1887,6 +1888,6 @@ case MC_SR: /* Status Register */ - pRegs->sr |= u32Val & ~(SR_RO_MASK | SR_WCLEAR_MASK); - ichac97StreamUpdateStatus(pThis, pStream, pRegs->sr & ~(u32Val & SR_WCLEAR_MASK)); + pRegs->sr |= u32Val & ~(AC97_SR_RO_MASK | AC97_SR_WCLEAR_MASK); + ichac97StreamUpdateStatus(pThis, pStream, pRegs->sr & ~(u32Val & AC97_SR_WCLEAR_MASK)); LogFlowFunc(("SR[%d] <- %#x (sr %#x)\n", AC97_PORT2IDX(uPortIdx), u32Val, pRegs->sr)); break; @@ -1909,18 +1910,18 @@ LogFlowFunc(("BDBAR[%d] <- %#x (bdbar %#x)\n", AC97_PORT2IDX(uPortIdx), u32Val, pRegs->bdbar)); break; - case GLOB_CNT: + case AC97_GLOB_CNT: /* Global Control */ - if (u32Val & GC_WR) + if (u32Val & AC97_GC_WR) ichac97WarmReset(pThis); - if (u32Val & GC_CR) + if (u32Val & AC97_GC_CR) ichac97ColdReset(pThis); - if (!(u32Val & (GC_WR | GC_CR))) - pThis->glob_cnt = u32Val & GC_VALID_MASK; + if (!(u32Val & (AC97_GC_WR | AC97_GC_CR))) + pThis->glob_cnt = u32Val & AC97_GC_VALID_MASK; LogFlowFunc(("glob_cnt <- %#x (glob_cnt %#x)\n", u32Val, pThis->glob_cnt)); break; - case GLOB_STA: + case AC97_GLOB_STA: /* Global Status */ - pThis->glob_sta &= ~(u32Val & GS_WCLEAR_MASK); - pThis->glob_sta |= (u32Val & ~(GS_WCLEAR_MASK | GS_RO_MASK)) & GS_VALID_MASK; + pThis->glob_sta &= ~(u32Val & AC97_GS_WCLEAR_MASK); + pThis->glob_sta |= (u32Val & ~(AC97_GS_WCLEAR_MASK | AC97_GS_RO_MASK)) & AC97_GS_VALID_MASK; LogFlowFunc(("glob_sta <- %#x (glob_sta %#x)\n", u32Val, pThis->glob_sta)); break; @@ -2017,7 +2018,7 @@ break; case AC97_Master_Volume_Mute: - if (pThis->uCodecModel == Codec_AD1980) + if (pThis->uCodecModel == AC97_CODEC_AD1980) { - if (ichac97MixerGet(pThis, AC97_AD_Misc) & AD_MISC_LOSEL) + if (ichac97MixerGet(pThis, AC97_AD_Misc) & AC97_AD_MISC_LOSEL) break; /* Register controls surround (rear), do nothing. */ } @@ -2025,7 +2026,7 @@ break; case AC97_Headphone_Volume_Mute: - if (pThis->uCodecModel == Codec_AD1980) + if (pThis->uCodecModel == AC97_CODEC_AD1980) { - if (ichac97MixerGet(pThis, AC97_AD_Misc) & AD_MISC_HPSEL) + if (ichac97MixerGet(pThis, AC97_AD_Misc) & AC97_AD_MISC_HPSEL) { /* Register controls PCM (front) outputs. */ @@ -2051,5 +2052,5 @@ break; case AC97_Extended_Audio_Ctrl_Stat: - if (!(u32Val & EACS_VRA)) + if (!(u32Val & AC97_EACS_VRA)) { ichac97MixerSet(pThis, AC97_PCM_Front_DAC_Rate, 48000); @@ -2059,5 +2060,5 @@ ichac97StreamReInit(pThis, &pThis->StreamLineIn); } - if (!(u32Val & EACS_VRM)) + if (!(u32Val & AC97_EACS_VRM)) { ichac97MixerSet(pThis, AC97_MIC_ADC_Rate, 48000); @@ -2068,5 +2069,5 @@ break; case AC97_PCM_Front_DAC_Rate: - if (ichac97MixerGet(pThis, AC97_Extended_Audio_Ctrl_Stat) & EACS_VRA) + if (ichac97MixerGet(pThis, AC97_Extended_Audio_Ctrl_Stat) & AC97_EACS_VRA) { ichac97MixerSet(pThis, index, u32Val); @@ -2078,5 +2079,5 @@ break; case AC97_MIC_ADC_Rate: - if (ichac97MixerGet(pThis, AC97_Extended_Audio_Ctrl_Stat) & EACS_VRM) + if (ichac97MixerGet(pThis, AC97_Extended_Audio_Ctrl_Stat) & AC97_EACS_VRM) { ichac97MixerSet(pThis, index, u32Val); @@ -2088,5 +2089,5 @@ break; case AC97_PCM_LR_ADC_Rate: - if (ichac97MixerGet(pThis, AC97_Extended_Audio_Ctrl_Stat) & EACS_VRA) + if (ichac97MixerGet(pThis, AC97_Extended_Audio_Ctrl_Stat) & AC97_EACS_VRA) { ichac97MixerSet(pThis, index, u32Val); @@ -2157,7 +2158,7 @@ switch (uID) { - case PI_INDEX: return &pThis->StreamLineIn; - case MC_INDEX: return &pThis->StreamMicIn; - case PO_INDEX: return &pThis->StreamOut; + case AC97SOUNDSOURCE_PI_INDEX: return &pThis->StreamLineIn; + case AC97SOUNDSOURCE_MC_INDEX: return &pThis->StreamMicIn; + case AC97SOUNDSOURCE_PO_INDEX: return &pThis->StreamOut; default: break; } @@ -2209,9 +2210,9 @@ SSMR3PutMem(pSSM, pThis->mixer_data, sizeof(pThis->mixer_data)); - uint8_t active[LAST_INDEX]; - - active[PI_INDEX] = ichac97StreamIsActive(pThis, &pThis->StreamLineIn) ? 1 : 0; - active[PO_INDEX] = ichac97StreamIsActive(pThis, &pThis->StreamOut) ? 1 : 0; - active[MC_INDEX] = ichac97StreamIsActive(pThis, &pThis->StreamMicIn) ? 1 : 0; + uint8_t active[AC97SOUNDSOURCE_LAST_INDEX]; + + active[AC97SOUNDSOURCE_PI_INDEX] = ichac97StreamIsActive(pThis, &pThis->StreamLineIn) ? 1 : 0; + active[AC97SOUNDSOURCE_PO_INDEX] = ichac97StreamIsActive(pThis, &pThis->StreamOut) ? 1 : 0; + active[AC97SOUNDSOURCE_MC_INDEX] = ichac97StreamIsActive(pThis, &pThis->StreamMicIn) ? 1 : 0; SSMR3PutMem(pSSM, active, sizeof(active)); @@ -2267,5 +2268,5 @@ /** @todo r=andy Stream IDs are hardcoded to certain streams. */ - uint8_t uaStrmsActive[LAST_INDEX]; + uint8_t uaStrmsActive[AC97SOUNDSOURCE_LAST_INDEX]; SSMR3GetMem(pSSM, uaStrmsActive, sizeof(uaStrmsActive)); @@ -2277,6 +2278,6 @@ V_(AC97_Mic_Volume_Mute, PDMAUDIOMIXERCTL_MIC_IN); # undef V_ - if (pThis->uCodecModel == Codec_AD1980) - if (ichac97MixerGet(pThis, AC97_AD_Misc) & AD_MISC_HPSEL) + if (pThis->uCodecModel == AC97_CODEC_AD1980) + if (ichac97MixerGet(pThis, AC97_AD_Misc) & AC97_AD_MISC_HPSEL) ichac97MixerSetVolume(pThis, AC97_Headphone_Volume_Mute, PDMAUDIOMIXERCTL_VOLUME_MASTER, ichac97MixerGet(pThis, AC97_Headphone_Volume_Mute)); @@ -2286,9 +2287,9 @@ { /** @todo r=andy Stream IDs are hardcoded to certain streams. */ - rc = ichac97StreamSetActive(pThis, &pThis->StreamLineIn, RT_BOOL(uaStrmsActive[PI_INDEX])); + rc = ichac97StreamSetActive(pThis, &pThis->StreamLineIn, RT_BOOL(uaStrmsActive[AC97SOUNDSOURCE_PI_INDEX])); if (RT_SUCCESS(rc)) - rc = ichac97StreamSetActive(pThis, &pThis->StreamMicIn, RT_BOOL(uaStrmsActive[MC_INDEX])); + rc = ichac97StreamSetActive(pThis, &pThis->StreamMicIn, RT_BOOL(uaStrmsActive[AC97SOUNDSOURCE_MC_INDEX])); if (RT_SUCCESS(rc)) - rc = ichac97StreamSetActive(pThis, &pThis->StreamOut, RT_BOOL(uaStrmsActive[PO_INDEX])); + rc = ichac97StreamSetActive(pThis, &pThis->StreamOut, RT_BOOL(uaStrmsActive[AC97SOUNDSOURCE_PO_INDEX])); } @@ -2615,9 +2616,9 @@ bool fChipAD1980 = false; if (!strcmp(szCodec, "STAC9700")) - pThis->uCodecModel = Codec_STAC9700; + pThis->uCodecModel = AC97_CODEC_STAC9700; else if (!strcmp(szCodec, "AD1980")) - pThis->uCodecModel = Codec_AD1980; + pThis->uCodecModel = AC97_CODEC_AD1980; else if (!strcmp(szCodec, "AD1981B")) - pThis->uCodecModel = Codec_AD1981B; + pThis->uCodecModel = AC97_CODEC_AD1981B; else { @@ -2651,10 +2652,10 @@ PCIDevSetInterruptPin (&pThis->PciDev, 0x01); /* 3d ro - INTA#. */ Assert(pThis->PciDev.config[0x3d] == 0x01); - if (pThis->uCodecModel == Codec_AD1980) + if (pThis->uCodecModel == AC97_CODEC_AD1980) { PCIDevSetSubSystemVendorId(&pThis->PciDev, 0x1028); /* 2c ro - Dell.) */ PCIDevSetSubSystemId (&pThis->PciDev, 0x0177); /* 2e ro. */ } - else if (pThis->uCodecModel == Codec_AD1981B) + else if (pThis->uCodecModel == AC97_CODEC_AD1981B) { PCIDevSetSubSystemVendorId(&pThis->PciDev, 0x1028); /* 2c ro - Dell.) */