Index: /trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-basic-2-c.c
===================================================================
--- /trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-basic-2-c.c	(revision 60444)
+++ /trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-basic-2-c.c	(revision 60445)
@@ -40,4 +40,5 @@
 //BS3TESTMODE_PROTOTYPES_CMN(bs3CpuBasic2_iret);
 BS3TESTMODE_PROTOTYPES_MODE(bs3CpuBasic2_iret);
+BS3TESTMODE_PROTOTYPES_MODE(bs3CpuBasic2_sidt);
 
 
@@ -48,7 +49,8 @@
 {
     //BS3TESTMODEENTRY_MODE("tss / gate / esp", bs3CpuBasic2_TssGateEsp),
-    BS3TESTMODEENTRY_MODE("raise xcpt #1", bs3CpuBasic2_RaiseXcpt1),
+    //BS3TESTMODEENTRY_MODE("raise xcpt #1", bs3CpuBasic2_RaiseXcpt1),
     //BS3TESTMODEENTRY_CMN("iret", bs3CpuBasic2_iret),
     //BS3TESTMODEENTRY_MODE("iret", bs3CpuBasic2_iret),
+    BS3TESTMODEENTRY_MODE("sidt", bs3CpuBasic2_sidt),
 };
 
Index: /trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-basic-2-template.c
===================================================================
--- /trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-basic-2-template.c	(revision 60444)
+++ /trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-basic-2-template.c	(revision 60445)
@@ -94,4 +94,6 @@
 extern BS3_DECL(void) TMPL_NM(bs3CpuBasic2_Int83)(void);
 extern BS3_DECL(void) TMPL_NM(bs3CpuBasic2_ud2)(void);
+extern BS3_DECL(void) TMPL_NM(bs3CpuBasic2_sidt_bx_ud2)(void);
+extern BS3_DECL(void) TMPL_NM(bs3CpuBasic2_lidt_bx_ud2)(void);
 #ifndef DOXYGEN_RUNNING
 # define g_bs3CpuBasic2_ud2_FlatAddr BS3_DATA_NM(g_bs3CpuBasic2_ud2_FlatAddr)
@@ -1297,4 +1299,43 @@
 }
 
+
+#define bs3CpuBasic2_sidt_Common BS3_CMN_NM(bs3CpuBasic2_sidt_Common)
+void bs3CpuBasic2_sidt_Common(void)
+{
+    BS3TRAPFRAME        TrapCtx;
+    BS3REGCTX           Ctx;
+    BS3REGCTX           TmpCtx;
+    uint8_t             abBuf[16];
+    uint8_t BS3_FAR    *pbBuf = abBuf;
+
+    /* make sure they're allocated  */
+    Bs3MemZero(&Ctx, sizeof(Ctx));
+    Bs3MemZero(&TmpCtx, sizeof(TmpCtx));
+    Bs3MemZero(&TrapCtx, sizeof(TrapCtx));
+    Bs3MemZero(&abBuf, sizeof(abBuf));
+
+    /* Create a context, give this routine some more stack space, point the context
+       at our SIDT [xBX] + UD2 combo, and point DS:xBX at abBuf. */
+    Bs3RegCtxSave(&Ctx);
+    Ctx.rsp.u -= 0x80;
+    Ctx.rip.u  = (uintptr_t)BS3_FP_OFF(&TMPL_NM(bs3CpuBasic2_sidt_bx_ud2));
+# if TMPL_BITS == 32
+    g_uBs3TrapEipHint = Ctx.rip.u32;
+# endif
+    Ctx.rbx.u = BS3_FP_OFF(pbBuf);
+# if TMPL_BITS == 16
+    Ctx.ds    = BS3_FP_SEG(pbBuf);
+# endif
+
+    /*
+     * Check that it works at all.
+     */
+    Bs3MemZero(&abBuf, sizeof(abBuf));
+    Bs3TrapSetJmpAndRestore(&Ctx, &TrapCtx);
+    g_usBs3TestStep = 0;
+    //bs3CpuBasic2_CompareIntCtx1(&TrapCtx, &Ctx, 0x80 /*bXcpt*/);
+
+}
+
 #endif /* once for each bitcount */
 
@@ -1454,5 +1495,5 @@
 }
 
-#endif
+#endif /* PE16 || PE32 */
 
 
@@ -1524,6 +1565,4 @@
 
 
-
-
 BS3_DECL(uint8_t) TMPL_NM(bs3CpuBasic2_iret)(uint8_t bMode)
 {
@@ -1536,4 +1575,25 @@
 
 
+BS3_DECL(uint8_t) TMPL_NM(bs3CpuBasic2_sidt)(uint8_t bMode)
+{
+    g_pszTestMode = TMPL_NM(g_szBs3ModeName);
+    g_bTestMode   = bMode;
+    g_f16BitSys   = BS3_MODE_IS_16BIT_SYS(TMPL_MODE);
+
+    BS3_ASSERT(bMode == TMPL_MODE);
+
+    /*
+     * Pass to common worker which is only compiled once per mode.
+     */
+    bs3CpuBasic2_sidt_Common();
+
+    /*
+     * Re-initialize the IDT.
+     */
+    TMPL_NM(Bs3TrapInit)();
+    return 0;
+}
+
+
 #endif /* BS3_INSTANTIATING_MODE */
 
Index: /trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-basic-2-template.mac
===================================================================
--- /trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-basic-2-template.mac	(revision 60444)
+++ /trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-basic-2-template.mac	(revision 60445)
@@ -81,5 +81,6 @@
 BS3_PROC_BEGIN_MODE bs3CpuBasic2_Int80
         int     80h
-        ud2
+.again: ud2
+        jmp     .again
 BS3_PROC_END_MODE   bs3CpuBasic2_Int80
 
@@ -87,5 +88,6 @@
 BS3_PROC_BEGIN_MODE bs3CpuBasic2_Int81
         int     81h
-        ud2
+.again: ud2
+        jmp     .again
 BS3_PROC_END_MODE   bs3CpuBasic2_Int81
 
@@ -93,5 +95,6 @@
 BS3_PROC_BEGIN_MODE bs3CpuBasic2_Int82
         int     82h
-        ud2
+.again: ud2
+        jmp     .again
 BS3_PROC_END_MODE   bs3CpuBasic2_Int82
 
@@ -99,6 +102,21 @@
 BS3_PROC_BEGIN_MODE bs3CpuBasic2_Int83
         int     83h
-        ud2
+.again: ud2
+        jmp     .again
 BS3_PROC_END_MODE   bs3CpuBasic2_Int83
+
+
+BS3_PROC_BEGIN_MODE bs3CpuBasic2_sidt_bx_ud2
+        sidt    [xBX]
+.again: ud2
+        jmp     .again
+BS3_PROC_END_MODE   bs3CpuBasic2_sidt_bx_ud2
+
+
+BS3_PROC_BEGIN_MODE bs3CpuBasic2_lidt_bx_ud2
+        lidt    [xBX]
+.again: ud2
+        jmp     .again
+BS3_PROC_END_MODE   bs3CpuBasic2_lidt_bx_ud2