Changeset 58912 in vbox
- Timestamp:
- Nov 29, 2015 8:08:14 PM (9 years ago)
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 3 edited
-
VMMR0/HMR0.cpp (modified) (8 diffs)
-
VMMR0/HMVMXR0.cpp (modified) (2 diffs)
-
include/HMInternal.h (modified) (1 diff)
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMR0/HMR0.cpp
r58126 r58912 618 618 for (unsigned i = 0; i < RT_ELEMENTS(g_HmR0.aCpuInfo); i++) 619 619 { 620 g_HmR0.aCpuInfo[i].hMemObj = NIL_RTR0MEMOBJ; 621 g_HmR0.aCpuInfo[i].idCpu = NIL_RTCPUID; 620 g_HmR0.aCpuInfo[i].idCpu = NIL_RTCPUID; 621 g_HmR0.aCpuInfo[i].hMemObj = NIL_RTR0MEMOBJ; 622 g_HmR0.aCpuInfo[i].HCPhysMemObj = NIL_RTHCPHYS; 623 g_HmR0.aCpuInfo[i].pvMemObj = NULL; 622 624 } 623 625 … … 769 771 { 770 772 RTR0MemObjFree(g_HmR0.aCpuInfo[i].hMemObj, false); 771 g_HmR0.aCpuInfo[i].hMemObj = NIL_RTR0MEMOBJ; 773 g_HmR0.aCpuInfo[i].hMemObj = NIL_RTR0MEMOBJ; 774 g_HmR0.aCpuInfo[i].HCPhysMemObj = NIL_RTHCPHYS; 775 g_HmR0.aCpuInfo[i].pvMemObj = NULL; 772 776 } 773 777 } … … 854 858 { 855 859 AssertLogRelMsgReturn(pCpu->hMemObj != NIL_RTR0MEMOBJ, ("hmR0EnableCpu failed idCpu=%u.\n", idCpu), VERR_HM_IPE_1); 856 void *pvCpuPage = RTR0MemObjAddress(pCpu->hMemObj);857 RTHCPHYS HCPhysCpuPage = RTR0MemObjGetPagePhysAddr(pCpu->hMemObj, 0 /* iPage */);858 859 860 if (g_HmR0.vmx.fSupported) 860 rc = g_HmR0.pfnEnableCpu(pCpu, pVM, p vCpuPage, HCPhysCpuPage, false, &g_HmR0.vmx.Msrs);861 rc = g_HmR0.pfnEnableCpu(pCpu, pVM, pCpu->pvMemObj, pCpu->HCPhysMemObj, false, &g_HmR0.vmx.Msrs); 861 862 else 862 rc = g_HmR0.pfnEnableCpu(pCpu, pVM, p vCpuPage, HCPhysCpuPage, false, NULL /* pvArg */);863 rc = g_HmR0.pfnEnableCpu(pCpu, pVM, pCpu->pvMemObj, pCpu->HCPhysMemObj, false, NULL /* pvArg */); 863 864 } 864 865 if (RT_SUCCESS(rc)) … … 914 915 { 915 916 Assert(g_HmR0.aCpuInfo[i].hMemObj == NIL_RTR0MEMOBJ); 917 Assert(g_HmR0.aCpuInfo[i].HCPhysMemObj == NIL_RTHCPHYS); 918 Assert(g_HmR0.aCpuInfo[i].pvMemObj == NULL); 916 919 Assert(!g_HmR0.aCpuInfo[i].fConfigured); 917 920 Assert(!g_HmR0.aCpuInfo[i].cTlbFlushes); … … 949 952 if (RTMpIsCpuPossible(RTMpCpuIdFromSetIndex(i))) 950 953 { 954 /** @todo NUMA */ 951 955 rc = RTR0MemObjAllocCont(&g_HmR0.aCpuInfo[i].hMemObj, PAGE_SIZE, false /* executable R0 mapping */); 952 956 AssertLogRelRCReturn(rc, rc); 953 957 954 void *pvR0 = RTR0MemObjAddress(g_HmR0.aCpuInfo[i].hMemObj); Assert(pvR0); 955 ASMMemZeroPage(pvR0); 958 g_HmR0.aCpuInfo[i].HCPhysMemObj = RTR0MemObjGetPagePhysAddr(g_HmR0.aCpuInfo[i].hMemObj, 0); 959 Assert(g_HmR0.aCpuInfo[i].HCPhysMemObj != NIL_RTHCPHYS); 960 Assert(!(g_HmR0.aCpuInfo[i].HCPhysMemObj & PAGE_OFFSET_MASK)); 961 962 g_HmR0.aCpuInfo[i].pvMemObj = RTR0MemObjAddress(g_HmR0.aCpuInfo[i].hMemObj); 963 AssertPtr(g_HmR0.aCpuInfo[i].pvMemObj); 964 ASMMemZeroPage(g_HmR0.aCpuInfo[i].pvMemObj); 956 965 } 957 966 } … … 1012 1021 if (pCpu->hMemObj == NIL_RTR0MEMOBJ) 1013 1022 return pCpu->fConfigured ? VERR_NO_MEMORY : VINF_SUCCESS /* not initialized. */; 1023 AssertPtr(pCpu->pvMemObj); 1024 Assert(pCpu->HCPhysMemObj != NIL_RTHCPHYS); 1014 1025 1015 1026 int rc; 1016 1027 if (pCpu->fConfigured) 1017 1028 { 1018 void *pvCpuPage = RTR0MemObjAddress(pCpu->hMemObj); 1019 RTHCPHYS HCPhysCpuPage = RTR0MemObjGetPagePhysAddr(pCpu->hMemObj, 0); 1020 1021 rc = g_HmR0.pfnDisableCpu(pCpu, pvCpuPage, HCPhysCpuPage); 1029 rc = g_HmR0.pfnDisableCpu(pCpu, pCpu->pvMemObj, pCpu->HCPhysMemObj); 1022 1030 AssertRCReturn(rc, rc); 1023 1031 … … 1699 1707 /* Ok, disable VT-x. */ 1700 1708 PHMGLOBALCPUINFO pCpu = HMR0GetCurrentCpu(); 1701 AssertReturn(pCpu && pCpu->hMemObj != NIL_RTR0MEMOBJ , VERR_HM_IPE_2);1709 AssertReturn(pCpu && pCpu->hMemObj != NIL_RTR0MEMOBJ && pCpu->pvMemObj && pCpu->HCPhysMemObj != NIL_RTHCPHYS, VERR_HM_IPE_2); 1702 1710 1703 1711 *pfVTxDisabled = true; 1704 void *pvCpuPage = RTR0MemObjAddress(pCpu->hMemObj); 1705 RTHCPHYS HCPhysCpuPage = RTR0MemObjGetPagePhysAddr(pCpu->hMemObj, 0); 1706 return VMXR0DisableCpu(pCpu, pvCpuPage, HCPhysCpuPage); 1712 return VMXR0DisableCpu(pCpu, pCpu->pvMemObj, pCpu->HCPhysMemObj); 1707 1713 } 1708 1714 … … 1731 1737 1732 1738 PHMGLOBALCPUINFO pCpu = HMR0GetCurrentCpu(); 1733 AssertReturnVoid(pCpu && pCpu->hMemObj != NIL_RTR0MEMOBJ); 1734 1735 void *pvCpuPage = RTR0MemObjAddress(pCpu->hMemObj); 1736 RTHCPHYS HCPhysCpuPage = RTR0MemObjGetPagePhysAddr(pCpu->hMemObj, 0); 1737 VMXR0EnableCpu(pCpu, pVM, pvCpuPage, HCPhysCpuPage, false, &g_HmR0.vmx.Msrs); 1739 AssertReturnVoid(pCpu && pCpu->hMemObj != NIL_RTR0MEMOBJ && pCpu->pvMemObj && pCpu->HCPhysMemObj != NIL_RTHCPHYS); 1740 1741 VMXR0EnableCpu(pCpu, pVM, pCpu->pvMemObj, pCpu->HCPhysMemObj, false, &g_HmR0.vmx.Msrs); 1738 1742 } 1739 1743 } -
trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp
r58658 r58912 5090 5090 5091 5091 PHMGLOBALCPUINFO pCpu = HMR0GetCurrentCpu(); 5092 RTHCPHYS HCPhysCpuPage = RTR0MemObjGetPagePhysAddr(pCpu->hMemObj, 0);5092 RTHCPHYS HCPhysCpuPage = pCpu->HCPhysMemObj; 5093 5093 5094 5094 /* Clear VMCS. Marking it inactive, clearing implementation-specific data and writing VMCS data back to memory. */ … … 5149 5149 5150 5150 PHMGLOBALCPUINFO pCpu = HMR0GetCurrentCpu(); 5151 RTHCPHYS HCPhysCpuPage = RTR0MemObjGetPagePhysAddr(pCpu->hMemObj, 0);5151 RTHCPHYS HCPhysCpuPage = pCpu->HCPhysMemObj; 5152 5152 5153 5153 #ifdef VBOX_WITH_CRASHDUMP_MAGIC -
trunk/src/VBox/VMM/include/HMInternal.h
r58546 r58912 266 266 /** The VM_HSAVE_AREA (AMD-V) / VMXON region (Intel) memory backing. */ 267 267 RTR0MEMOBJ hMemObj; 268 /** The physical address of the first page in hMemObj (it's a 269 * physcially contigous allocation if it spans multiple pages). */ 270 RTHCPHYS HCPhysMemObj; 271 /** The address of the memory (for pfnEnable). */ 272 void *pvMemObj; 268 273 /** Current ASID (AMD-V) / VPID (Intel). */ 269 274 uint32_t uCurrentAsid;
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