VirtualBox

Changeset 58912 in vbox


Ignore:
Timestamp:
Nov 29, 2015 8:08:14 PM (9 years ago)
Author:
vboxsync
Message:

HMGLOBALCPUINFO: Cache the RTR0MemObjGetPagePhysAddr and RTR0MemObjAddress results as they aren't necessiarly all that fast.

Location:
trunk/src/VBox/VMM
Files:
3 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/VMM/VMMR0/HMR0.cpp

    r58126 r58912  
    618618    for (unsigned i = 0; i < RT_ELEMENTS(g_HmR0.aCpuInfo); i++)
    619619    {
    620         g_HmR0.aCpuInfo[i].hMemObj = NIL_RTR0MEMOBJ;
    621         g_HmR0.aCpuInfo[i].idCpu   = NIL_RTCPUID;
     620        g_HmR0.aCpuInfo[i].idCpu        = NIL_RTCPUID;
     621        g_HmR0.aCpuInfo[i].hMemObj      = NIL_RTR0MEMOBJ;
     622        g_HmR0.aCpuInfo[i].HCPhysMemObj = NIL_RTHCPHYS;
     623        g_HmR0.aCpuInfo[i].pvMemObj     = NULL;
    622624    }
    623625
     
    769771            {
    770772                RTR0MemObjFree(g_HmR0.aCpuInfo[i].hMemObj, false);
    771                 g_HmR0.aCpuInfo[i].hMemObj = NIL_RTR0MEMOBJ;
     773                g_HmR0.aCpuInfo[i].hMemObj      = NIL_RTR0MEMOBJ;
     774                g_HmR0.aCpuInfo[i].HCPhysMemObj = NIL_RTHCPHYS;
     775                g_HmR0.aCpuInfo[i].pvMemObj     = NULL;
    772776            }
    773777        }
     
    854858    {
    855859        AssertLogRelMsgReturn(pCpu->hMemObj != NIL_RTR0MEMOBJ, ("hmR0EnableCpu failed idCpu=%u.\n", idCpu), VERR_HM_IPE_1);
    856         void    *pvCpuPage     = RTR0MemObjAddress(pCpu->hMemObj);
    857         RTHCPHYS HCPhysCpuPage = RTR0MemObjGetPagePhysAddr(pCpu->hMemObj, 0 /* iPage */);
    858 
    859860        if (g_HmR0.vmx.fSupported)
    860             rc = g_HmR0.pfnEnableCpu(pCpu, pVM, pvCpuPage, HCPhysCpuPage, false, &g_HmR0.vmx.Msrs);
     861            rc = g_HmR0.pfnEnableCpu(pCpu, pVM, pCpu->pvMemObj, pCpu->HCPhysMemObj, false, &g_HmR0.vmx.Msrs);
    861862        else
    862             rc = g_HmR0.pfnEnableCpu(pCpu, pVM, pvCpuPage, HCPhysCpuPage, false, NULL /* pvArg */);
     863            rc = g_HmR0.pfnEnableCpu(pCpu, pVM, pCpu->pvMemObj, pCpu->HCPhysMemObj, false, NULL /* pvArg */);
    863864    }
    864865    if (RT_SUCCESS(rc))
     
    914915    {
    915916        Assert(g_HmR0.aCpuInfo[i].hMemObj == NIL_RTR0MEMOBJ);
     917        Assert(g_HmR0.aCpuInfo[i].HCPhysMemObj == NIL_RTHCPHYS);
     918        Assert(g_HmR0.aCpuInfo[i].pvMemObj == NULL);
    916919        Assert(!g_HmR0.aCpuInfo[i].fConfigured);
    917920        Assert(!g_HmR0.aCpuInfo[i].cTlbFlushes);
     
    949952            if (RTMpIsCpuPossible(RTMpCpuIdFromSetIndex(i)))
    950953            {
     954                /** @todo NUMA */
    951955                rc = RTR0MemObjAllocCont(&g_HmR0.aCpuInfo[i].hMemObj, PAGE_SIZE, false /* executable R0 mapping */);
    952956                AssertLogRelRCReturn(rc, rc);
    953957
    954                 void *pvR0 = RTR0MemObjAddress(g_HmR0.aCpuInfo[i].hMemObj); Assert(pvR0);
    955                 ASMMemZeroPage(pvR0);
     958                g_HmR0.aCpuInfo[i].HCPhysMemObj = RTR0MemObjGetPagePhysAddr(g_HmR0.aCpuInfo[i].hMemObj, 0);
     959                Assert(g_HmR0.aCpuInfo[i].HCPhysMemObj != NIL_RTHCPHYS);
     960                Assert(!(g_HmR0.aCpuInfo[i].HCPhysMemObj & PAGE_OFFSET_MASK));
     961
     962                g_HmR0.aCpuInfo[i].pvMemObj     = RTR0MemObjAddress(g_HmR0.aCpuInfo[i].hMemObj);
     963                AssertPtr(g_HmR0.aCpuInfo[i].pvMemObj);
     964                ASMMemZeroPage(g_HmR0.aCpuInfo[i].pvMemObj);
    956965            }
    957966        }
     
    10121021    if (pCpu->hMemObj == NIL_RTR0MEMOBJ)
    10131022        return pCpu->fConfigured ? VERR_NO_MEMORY : VINF_SUCCESS /* not initialized. */;
     1023    AssertPtr(pCpu->pvMemObj);
     1024    Assert(pCpu->HCPhysMemObj != NIL_RTHCPHYS);
    10141025
    10151026    int rc;
    10161027    if (pCpu->fConfigured)
    10171028    {
    1018         void    *pvCpuPage     = RTR0MemObjAddress(pCpu->hMemObj);
    1019         RTHCPHYS HCPhysCpuPage = RTR0MemObjGetPagePhysAddr(pCpu->hMemObj, 0);
    1020 
    1021         rc = g_HmR0.pfnDisableCpu(pCpu, pvCpuPage, HCPhysCpuPage);
     1029        rc = g_HmR0.pfnDisableCpu(pCpu, pCpu->pvMemObj, pCpu->HCPhysMemObj);
    10221030        AssertRCReturn(rc, rc);
    10231031
     
    16991707    /* Ok, disable VT-x. */
    17001708    PHMGLOBALCPUINFO pCpu = HMR0GetCurrentCpu();
    1701     AssertReturn(pCpu && pCpu->hMemObj != NIL_RTR0MEMOBJ, VERR_HM_IPE_2);
     1709    AssertReturn(pCpu && pCpu->hMemObj != NIL_RTR0MEMOBJ && pCpu->pvMemObj && pCpu->HCPhysMemObj != NIL_RTHCPHYS, VERR_HM_IPE_2);
    17021710
    17031711    *pfVTxDisabled = true;
    1704     void    *pvCpuPage     = RTR0MemObjAddress(pCpu->hMemObj);
    1705     RTHCPHYS HCPhysCpuPage = RTR0MemObjGetPagePhysAddr(pCpu->hMemObj, 0);
    1706     return VMXR0DisableCpu(pCpu, pvCpuPage, HCPhysCpuPage);
     1712    return VMXR0DisableCpu(pCpu, pCpu->pvMemObj, pCpu->HCPhysMemObj);
    17071713}
    17081714
     
    17311737
    17321738        PHMGLOBALCPUINFO pCpu = HMR0GetCurrentCpu();
    1733         AssertReturnVoid(pCpu && pCpu->hMemObj != NIL_RTR0MEMOBJ);
    1734 
    1735         void           *pvCpuPage     = RTR0MemObjAddress(pCpu->hMemObj);
    1736         RTHCPHYS        HCPhysCpuPage = RTR0MemObjGetPagePhysAddr(pCpu->hMemObj, 0);
    1737         VMXR0EnableCpu(pCpu, pVM, pvCpuPage, HCPhysCpuPage, false, &g_HmR0.vmx.Msrs);
     1739        AssertReturnVoid(pCpu && pCpu->hMemObj != NIL_RTR0MEMOBJ && pCpu->pvMemObj && pCpu->HCPhysMemObj != NIL_RTHCPHYS);
     1740
     1741        VMXR0EnableCpu(pCpu, pVM, pCpu->pvMemObj, pCpu->HCPhysMemObj, false, &g_HmR0.vmx.Msrs);
    17381742    }
    17391743}
  • trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp

    r58658 r58912  
    50905090
    50915091    PHMGLOBALCPUINFO pCpu = HMR0GetCurrentCpu();
    5092     RTHCPHYS HCPhysCpuPage = RTR0MemObjGetPagePhysAddr(pCpu->hMemObj, 0);
     5092    RTHCPHYS HCPhysCpuPage = pCpu->HCPhysMemObj;
    50935093
    50945094    /* Clear VMCS. Marking it inactive, clearing implementation-specific data and writing VMCS data back to memory. */
     
    51495149
    51505150    PHMGLOBALCPUINFO pCpu = HMR0GetCurrentCpu();
    5151     RTHCPHYS HCPhysCpuPage = RTR0MemObjGetPagePhysAddr(pCpu->hMemObj, 0);
     5151    RTHCPHYS HCPhysCpuPage = pCpu->HCPhysMemObj;
    51525152
    51535153#ifdef VBOX_WITH_CRASHDUMP_MAGIC
  • trunk/src/VBox/VMM/include/HMInternal.h

    r58546 r58912  
    266266    /** The VM_HSAVE_AREA (AMD-V) / VMXON region (Intel) memory backing. */
    267267    RTR0MEMOBJ          hMemObj;
     268    /** The physical address of the first page in hMemObj (it's a
     269     *  physcially contigous allocation if it spans multiple pages). */
     270    RTHCPHYS            HCPhysMemObj;
     271    /** The address of the memory (for pfnEnable). */
     272    void               *pvMemObj;
    268273    /** Current ASID (AMD-V) / VPID (Intel). */
    269274    uint32_t            uCurrentAsid;
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