Index: /trunk/src/VBox/VMM/VMMAll/IEMAllCImpl.cpp.h
===================================================================
--- /trunk/src/VBox/VMM/VMMAll/IEMAllCImpl.cpp.h	(revision 58604)
+++ /trunk/src/VBox/VMM/VMMAll/IEMAllCImpl.cpp.h	(revision 58605)
@@ -17,4 +17,5 @@
 
 
+#define IEM_IMPLEMENTS_CALLGATE
 /** @name Misc Helpers
  * @{
@@ -4907,5 +4908,7 @@
          * CR3 is relatively simple, although AMD and Intel have different
          * accounts of how setting reserved bits are handled.  We take intel's
-         * word for the lower bits and AMD's for the high bits (63:52).
+         * word for the lower bits and AMD's for the high bits (63:52).  The
+         * lower reserved bits are ignored and left alone; OpenBSD 5.8 relies
+         * on this.
          */
         /** @todo Testcase: Setting reserved bits in CR3, especially before
@@ -4923,12 +4926,10 @@
             if (   (pCtx->cr4 & X86_CR4_PAE)
                 && (pCtx->msrEFER & MSR_K6_EFER_LME))
-                fValid = UINT64_C(0x000ffffffffff014);
-            else if (pCtx->cr4 & X86_CR4_PAE)
-                fValid = UINT64_C(0xfffffff4);
+                fValid = UINT64_C(0x000fffffffffffff);
             else
-                fValid = UINT64_C(0xfffff014);
+                fValid = UINT64_C(0xffffffff);
             if (uNewCrX & ~fValid)
             {
-                Log(("Automatically clearing reserved bits in CR3 load: NewCR3=%#llx ClearedBits=%#llx\n",
+                Log(("Automatically clearing reserved MBZ bits in CR3 load: NewCR3=%#llx ClearedBits=%#llx\n",
                      uNewCrX, uNewCrX & ~fValid));
                 uNewCrX &= fValid;