Changeset 58605 in vbox
- Timestamp:
- Nov 6, 2015 1:25:50 PM (9 years ago)
- File:
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- 1 edited
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trunk/src/VBox/VMM/VMMAll/IEMAllCImpl.cpp.h (modified) (3 diffs)
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trunk/src/VBox/VMM/VMMAll/IEMAllCImpl.cpp.h
r57562 r58605 17 17 18 18 19 #define IEM_IMPLEMENTS_CALLGATE 19 20 /** @name Misc Helpers 20 21 * @{ … … 4907 4908 * CR3 is relatively simple, although AMD and Intel have different 4908 4909 * accounts of how setting reserved bits are handled. We take intel's 4909 * word for the lower bits and AMD's for the high bits (63:52). 4910 * word for the lower bits and AMD's for the high bits (63:52). The 4911 * lower reserved bits are ignored and left alone; OpenBSD 5.8 relies 4912 * on this. 4910 4913 */ 4911 4914 /** @todo Testcase: Setting reserved bits in CR3, especially before … … 4923 4926 if ( (pCtx->cr4 & X86_CR4_PAE) 4924 4927 && (pCtx->msrEFER & MSR_K6_EFER_LME)) 4925 fValid = UINT64_C(0x000ffffffffff014); 4926 else if (pCtx->cr4 & X86_CR4_PAE) 4927 fValid = UINT64_C(0xfffffff4); 4928 fValid = UINT64_C(0x000fffffffffffff); 4928 4929 else 4929 fValid = UINT64_C(0xfffff 014);4930 fValid = UINT64_C(0xffffffff); 4930 4931 if (uNewCrX & ~fValid) 4931 4932 { 4932 Log(("Automatically clearing reserved bits in CR3 load: NewCR3=%#llx ClearedBits=%#llx\n",4933 Log(("Automatically clearing reserved MBZ bits in CR3 load: NewCR3=%#llx ClearedBits=%#llx\n", 4933 4934 uNewCrX, uNewCrX & ~fValid)); 4934 4935 uNewCrX &= fValid;
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