Index: /trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp	(revision 58544)
+++ /trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp	(revision 58545)
@@ -612,5 +612,5 @@
 static void hmR0SvmSetMsrPermission(PVMCPU pVCpu, unsigned uMsr, SVMMSREXITREAD enmRead, SVMMSREXITWRITE enmWrite)
 {
-    unsigned ulBit;
+    unsigned uBit;
     uint8_t *pbMsrBitmap = (uint8_t *)pVCpu->hm.s.svm.pvMsrBitmap;
 
@@ -626,5 +626,5 @@
     {
         /* Pentium-compatible MSRs. */
-        ulBit = uMsr * 2;
+        uBit = uMsr * 2;
     }
     else if (   uMsr >= 0xC0000000
@@ -632,5 +632,5 @@
     {
         /* AMD Sixth Generation x86 Processor MSRs. */
-        ulBit = (uMsr - 0xC0000000) * 2;
+        uBit = (uMsr - 0xC0000000) * 2;
         pbMsrBitmap += 0x800;
     }
@@ -639,5 +639,5 @@
     {
         /* AMD Seventh and Eighth Generation Processor MSRs. */
-        ulBit = (uMsr - 0xC0001000) * 2;
+        uBit = (uMsr - 0xC0001000) * 2;
         pbMsrBitmap += 0x1000;
     }
@@ -648,14 +648,14 @@
     }
 
-    Assert(ulBit < 0x3fff /* 16 * 1024 - 1 */);
+    Assert(uBit < 0x3fff /* 16 * 1024 - 1 */);
     if (enmRead == SVMMSREXIT_INTERCEPT_READ)
-        ASMBitSet(pbMsrBitmap, ulBit);
+        ASMBitSet(pbMsrBitmap, uBit);
     else
-        ASMBitClear(pbMsrBitmap, ulBit);
+        ASMBitClear(pbMsrBitmap, uBit);
 
     if (enmWrite == SVMMSREXIT_INTERCEPT_WRITE)
-        ASMBitSet(pbMsrBitmap, ulBit + 1);
+        ASMBitSet(pbMsrBitmap, uBit + 1);
     else
-        ASMBitClear(pbMsrBitmap, ulBit + 1);
+        ASMBitClear(pbMsrBitmap, uBit + 1);
 
     PSVMVMCB pVmcb = (PSVMVMCB)pVCpu->hm.s.svm.pvVmcb;