Changeset 57979 in vbox
- Timestamp:
- Oct 1, 2015 8:25:21 AM (9 years ago)
- Location:
- trunk/src/VBox
- Files:
-
- 8 edited
-
Devices/PC/DevACPI.cpp (modified) (7 diffs)
-
Devices/PC/vbox.dsl (modified) (2 diffs)
-
Devices/Parallel/DevParallel.cpp (modified) (5 diffs)
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Main/idl/VirtualBox.xidl (modified) (1 diff)
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Main/include/ParallelPortImpl.h (modified) (2 diffs)
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Main/src-client/ConsoleImpl2.cpp (modified) (3 diffs)
-
Main/src-server/MachineImpl.cpp (modified) (1 diff)
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Main/src-server/ParallelPortImpl.cpp (modified) (3 diffs)
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/PC/DevACPI.cpp
r57358 r57979 183 183 SYSTEM_INFO_INDEX_SERIAL1_IOBASE = 24, 184 184 SYSTEM_INFO_INDEX_SERIAL1_IRQ = 25, 185 SYSTEM_INFO_INDEX_END = 26, 185 SYSTEM_INFO_INDEX_PARALLEL0_IOBASE = 26, 186 SYSTEM_INFO_INDEX_PARALLEL0_IRQ = 27, 187 SYSTEM_INFO_INDEX_PARALLEL1_IOBASE = 28, 188 SYSTEM_INFO_INDEX_PARALLEL1_IRQ = 29, 189 SYSTEM_INFO_INDEX_END = 30, 186 190 SYSTEM_INFO_INDEX_INVALID = 0x80, 187 191 SYSTEM_INFO_INDEX_VALID = 0x200 … … 313 317 /** Serial 1 IO port base */ 314 318 RTIOPORT uSerial1IoPortBase; 319 320 /** @name Parallel port config bits 321 * @{ */ 322 /** Parallel 0 IRQ number */ 323 uint8_t uParallel0Irq; 324 /** Parallel 1 IRQ number */ 325 uint8_t uParallel1Irq; 326 /** Parallel 0 IO port base */ 327 RTIOPORT uParallel0IoPortBase; 328 /** Parallel 1 IO port base */ 329 RTIOPORT uParallel1IoPortBase; 330 /** @} */ 331 332 uint32_t u32Alignment1; 333 315 334 /** ACPI port base interface. */ 316 335 PDMIBASE IBase; … … 322 341 PPDMDEVINSRC pDevInsRC; 323 342 324 uint32_t Alignment 1;343 uint32_t Alignment2; 325 344 /** Pointer to the driver base interface. */ 326 345 R3PTRTYPE(PPDMIBASE) pDrvBase; … … 345 364 /** ACPI custom OEM Rev */ 346 365 uint32_t u32OemRevision; 347 uint32_t Alignment 2;366 uint32_t Alignment3; 348 367 349 368 /** The custom table binary data. */ … … 1319 1338 break; 1320 1339 1340 case SYSTEM_INFO_INDEX_PARALLEL0_IOBASE: 1341 *pu32 = pThis->uParallel0IoPortBase; 1342 break; 1343 1344 case SYSTEM_INFO_INDEX_PARALLEL0_IRQ: 1345 *pu32 = pThis->uParallel0Irq; 1346 break; 1347 1348 case SYSTEM_INFO_INDEX_PARALLEL1_IOBASE: 1349 *pu32 = pThis->uParallel1IoPortBase; 1350 break; 1351 1352 case SYSTEM_INFO_INDEX_PARALLEL1_IRQ: 1353 *pu32 = pThis->uParallel1Irq; 1354 break; 1355 1321 1356 case SYSTEM_INFO_INDEX_END: 1322 1357 /** @todo why isn't this setting any output value? */ … … 3057 3092 "CustomTable\0" 3058 3093 "SLICTable\0" 3094 "Parallel0IoPortBase\0" 3095 "Parallel1IoPortBase\0" 3096 "Parallel0Irq\0" 3097 "Parallel1Irq\0" 3059 3098 )) 3060 3099 return PDMDEV_SET_ERROR(pDevIns, VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES, … … 3194 3233 return PDMDEV_SET_ERROR(pDevIns, rc, 3195 3234 N_("Configuration error: Failed to read \"Serial1IoPortBase\"")); 3235 3236 /* 3237 * Query settings for both parallel ports, if the CFGM keys don't exist pretend that 3238 * the corresponding parallel port is not enabled. 3239 */ 3240 rc = CFGMR3QueryU8Def(pCfg, "Parallel0Irq", &pThis->uSerial0Irq, 0); 3241 if (RT_FAILURE(rc)) 3242 return PDMDEV_SET_ERROR(pDevIns, rc, 3243 N_("Configuration error: Failed to read \"Parallel0Irq\"")); 3244 3245 rc = CFGMR3QueryU16Def(pCfg, "Parallel0IoPortBase", &pThis->uParallel0IoPortBase, 0); 3246 if (RT_FAILURE(rc)) 3247 return PDMDEV_SET_ERROR(pDevIns, rc, 3248 N_("Configuration error: Failed to read \"Parallel0IoPortBase\"")); 3249 3250 rc = CFGMR3QueryU8Def(pCfg, "Parallel1Irq", &pThis->uParallel1Irq, 0); 3251 if (RT_FAILURE(rc)) 3252 return PDMDEV_SET_ERROR(pDevIns, rc, 3253 N_("Configuration error: Failed to read \"Parallel1Irq\"")); 3254 3255 rc = CFGMR3QueryU16Def(pCfg, "Parallel1IoPortBase", &pThis->uParallel1IoPortBase, 0); 3256 if (RT_FAILURE(rc)) 3257 return PDMDEV_SET_ERROR(pDevIns, rc, 3258 N_("Configuration error: Failed to read \"Parallel1IoPortBase\"")); 3196 3259 3197 3260 /* Try to attach the other CPUs */ -
trunk/src/VBox/Devices/PC/vbox.dsl
r56292 r57979 154 154 SL1B, 32, // Serial1 base IO address 155 155 SL1I, 32, // Serial1 IRQ 156 PP0B, 32, // Parallel0 base IO address 157 PP0I, 32, // Parallel0 IRQ 158 PP1B, 32, // Parallel1 base IO address 159 PP1I, 32, // Parallel1 IRQ 156 160 Offset (0x80), 157 161 ININ, 32, … … 667 671 } 668 672 669 // Parallel port 670 Device ( LPT)673 // Parallel port 0 674 Device (^LPT0) 671 675 { 672 676 Name (_HID, EisaId ("PNP0400")) 677 Name (_UID, 0x01) 673 678 Method (_STA, 0, NotSerialized) 674 679 { 675 Return (0x0F) 676 } 677 Name (_CRS, ResourceTemplate () 678 { 679 IO (Decode16, 0x0378, 0x0378, 0x08, 0x08) 680 IO (Decode16, 0x0778, 0x0778, 0x08, 0x08) 681 IRQNoFlags () {7} 680 If (LEqual (PP0B, Zero)) 681 { 682 Return (0x00) 683 } 684 Else 685 { 686 Return (0x0F) 687 } 688 } 689 Name (CRS, ResourceTemplate () 690 { 691 IO (Decode16, 0x0378, 0x0378, 0x08, 0x08, _Y18) 692 IRQNoFlags (_Y19) {7} 682 693 }) 683 } 694 Method (_CRS, 0, NotSerialized) 695 { 696 CreateWordField (CRS, \_SB.PCI0.LPT0._Y18._MIN, PMI0) 697 CreateWordField (CRS, \_SB.PCI0.LPT0._Y18._MAX, PMA0) 698 CreateWordField (CRS, \_SB.PCI0.LPT0._Y19._INT, PIQ0) 699 Store (PP0B, PMI0) 700 Store (PP0B, PMA0) 701 ShiftLeft (0x01, PP0I, PIQ0) 702 Return (CRS) 703 } 704 } 705 706 // Parallel port 1 707 Device (^LPT1) 708 { 709 Name (_HID, EisaId ("PNP0400")) 710 Name (_UID, 0x02) 711 Method (_STA, 0, NotSerialized) 712 { 713 If (LEqual (PP1B, Zero)) 714 { 715 Return (0x00) 716 } 717 Else 718 { 719 Return (0x0F) 720 } 721 } 722 Name (CRS, ResourceTemplate () 723 { 724 IO (Decode16, 0x0278, 0x0278, 0x08, 0x08, _Y20) 725 IRQNoFlags (_Y21) {5} 726 }) 727 Method (_CRS, 0, NotSerialized) 728 { 729 CreateWordField (CRS, \_SB.PCI0.LPT1._Y20._MIN, PMI1) 730 CreateWordField (CRS, \_SB.PCI0.LPT1._Y20._MAX, PMA1) 731 CreateWordField (CRS, \_SB.PCI0.LPT1._Y21._INT, PIQ1) 732 Store (PP1B, PMI1) 733 Store (PP1B, PMA1) 734 ShiftLeft (0x01, PP1I, PIQ1) 735 Return (CRS) 736 } 737 } 738 684 739 685 740 // Serial port 0 -
trunk/src/VBox/Devices/Parallel/DevParallel.cpp
r57358 r57979 357 357 return VINF_IOM_R3_IOPORT_WRITE; 358 358 #else 359 /* Set data direction. */ 360 if (u8 & LPT_CONTROL_ENABLE_BIDIRECT) 361 rc = pThis->pDrvHostParallelConnector->pfnSetPortDirection(pThis->pDrvHostParallelConnector, false /* fForward */); 359 if (RT_LIKELY(pThis->pDrvHostParallelConnector)) 360 { 361 /* Set data direction. */ 362 if (u8 & LPT_CONTROL_ENABLE_BIDIRECT) 363 rc = pThis->pDrvHostParallelConnector->pfnSetPortDirection(pThis->pDrvHostParallelConnector, false /* fForward */); 364 else 365 rc = pThis->pDrvHostParallelConnector->pfnSetPortDirection(pThis->pDrvHostParallelConnector, true /* fForward */); 366 AssertRC(rc); 367 368 u8 &= ~LPT_CONTROL_ENABLE_BIDIRECT; /* Clear bit. */ 369 370 rc = pThis->pDrvHostParallelConnector->pfnWriteControl(pThis->pDrvHostParallelConnector, u8); 371 AssertRC(rc); 372 } 362 373 else 363 rc = pThis->pDrvHostParallelConnector->pfnSetPortDirection(pThis->pDrvHostParallelConnector, true /* fForward */); 364 AssertRC(rc); 365 u8 &= ~LPT_CONTROL_ENABLE_BIDIRECT; /* Clear bit. */ 366 367 rc = pThis->pDrvHostParallelConnector->pfnWriteControl(pThis->pDrvHostParallelConnector, u8); 368 AssertRC(rc); 374 u8 &= ~LPT_CONTROL_ENABLE_BIDIRECT; /* Clear bit. */ 375 369 376 pThis->regControl = u8; 370 377 #endif … … 462 469 case 2: 463 470 #ifndef IN_RING3 464 rc = VINF_IOM_R3_IOPORT_READ;471 rc = VINF_IOM_R3_IOPORT_READ; 465 472 #else 466 rc = pThis->pDrvHostParallelConnector->pfnReadControl(pThis->pDrvHostParallelConnector, &pThis->regControl); 467 AssertRC(rc); 468 pThis->regControl |= LPT_CONTROL_BIT6 | LPT_CONTROL_BIT7; 473 if (RT_LIKELY(pThis->pDrvHostParallelConnector)) 474 { 475 rc = pThis->pDrvHostParallelConnector->pfnReadControl(pThis->pDrvHostParallelConnector, &pThis->regControl); 476 AssertRC(rc); 477 pThis->regControl |= LPT_CONTROL_BIT6 | LPT_CONTROL_BIT7; 478 } 479 469 480 *pu32 = pThis->regControl; 470 481 #endif … … 766 777 { 767 778 pThis->pDrvHostParallelConnector = PDMIBASE_QUERY_INTERFACE(pThis->pDrvBase, PDMIHOSTPARALLELCONNECTOR); 779 780 /* Set compatibility mode */ 781 //pThis->pDrvHostParallelConnector->pfnSetMode(pThis->pDrvHostParallelConnector, PDM_PARALLEL_PORT_MODE_COMPAT); 782 /* Get status of control register */ 783 pThis->pDrvHostParallelConnector->pfnReadControl(pThis->pDrvHostParallelConnector, &pThis->regControl); 784 768 785 AssertMsgReturn(pThis->pDrvHostParallelConnector, 769 786 ("Configuration error: instance %d has no host parallel interface!\n", iInstance), … … 782 799 N_("Parallel device %d cannot attach to host driver"), iInstance); 783 800 } 784 785 /* Set compatibility mode */786 //pThis->pDrvHostParallelConnector->pfnSetMode(pThis->pDrvHostParallelConnector, PDM_PARALLEL_PORT_MODE_COMPAT);787 /* Get status of control register */788 pThis->pDrvHostParallelConnector->pfnReadControl(pThis->pDrvHostParallelConnector, &pThis->regControl);789 801 790 802 return VINF_SUCCESS; … … 811 823 PDM_DEVREG_CLASS_PARALLEL, 812 824 /* cMaxInstances */ 813 1,825 2, 814 826 /* cbInstance */ 815 827 sizeof(PARALLELPORT), -
trunk/src/VBox/Main/idl/VirtualBox.xidl
r57524 r57979 17255 17255 Host parallel device name. If this parallel port is enabled, setting a 17256 17256 @c null or an empty string as this attribute's value will result in 17257 an error.17257 the parallel port behaving as if not connected to any device. 17258 17258 </desc> 17259 17259 </attribute> -
trunk/src/VBox/Main/include/ParallelPortImpl.h
r49871 r57979 51 51 void i_commit(); 52 52 void i_copyFrom(ParallelPort *aThat); 53 void i_applyDefaults(); 53 54 54 55 private: … … 65 66 HRESULT setPath(const com::Utf8Str &aPath); 66 67 67 HRESULT i_checkSetPath(const Utf8Str &str);68 69 68 struct Data; 70 69 Data *m; -
trunk/src/VBox/Main/src-client/ConsoleImpl2.cpp
r57809 r57979 2641 2641 * Parallel (LPT) Ports 2642 2642 */ 2643 /* parallel enabled mask to be passed to dev ACPI */ 2644 uint16_t auParallelIoPortBase[SchemaDefs::ParallelPortCount] = {0}; 2645 uint8_t auParallelIrq[SchemaDefs::ParallelPortCount] = {0}; 2643 2646 InsertConfigNode(pDevices, "parallel", &pDev); 2644 2647 for (ULONG ulInstance = 0; ulInstance < SchemaDefs::ParallelPortCount; ++ulInstance) … … 2660 2663 hrc = parallelPort->COMGETTER(IRQ)(&ulIRQ); H(); 2661 2664 InsertConfigInteger(pCfg, "IRQ", ulIRQ); 2665 auParallelIrq[ulInstance] = (uint8_t)ulIRQ; 2662 2666 ULONG ulIOBase; 2663 2667 hrc = parallelPort->COMGETTER(IOBase)(&ulIOBase); H(); 2664 2668 InsertConfigInteger(pCfg, "IOBase", ulIOBase); 2665 InsertConfigNode(pInst, "LUN#0", &pLunL0); 2666 InsertConfigString(pLunL0, "Driver", "HostParallel"); 2667 InsertConfigNode(pLunL0, "Config", &pLunL1); 2669 auParallelIoPortBase[ulInstance] = (uint16_t)ulIOBase; 2670 2668 2671 hrc = parallelPort->COMGETTER(Path)(bstr.asOutParam()); H(); 2669 InsertConfigString(pLunL1, "DevicePath", bstr); 2672 if (!bstr.isEmpty()) 2673 { 2674 InsertConfigNode(pInst, "LUN#0", &pLunL0); 2675 InsertConfigString(pLunL0, "Driver", "HostParallel"); 2676 InsertConfigNode(pLunL0, "Config", &pLunL1); 2677 InsertConfigString(pLunL1, "DevicePath", bstr); 2678 } 2670 2679 } 2671 2680 … … 3091 3100 InsertConfigInteger(pCfg, "Serial1IoPortBase", auSerialIoPortBase[1]); 3092 3101 InsertConfigInteger(pCfg, "Serial1Irq", auSerialIrq[1]); 3102 3103 InsertConfigInteger(pCfg, "Parallel0IoPortBase", auParallelIoPortBase[0]); 3104 InsertConfigInteger(pCfg, "Parallel0Irq", auParallelIrq[0]); 3105 3106 InsertConfigInteger(pCfg, "Parallel1IoPortBase", auParallelIoPortBase[1]); 3107 InsertConfigInteger(pCfg, "Parallel1Irq", auParallelIrq[1]); 3093 3108 3094 3109 InsertConfigNode(pInst, "LUN#0", &pLunL0); -
trunk/src/VBox/Main/src-server/MachineImpl.cpp
r57832 r57979 353 353 for (ULONG slot = 0; slot < RT_ELEMENTS(mSerialPorts); ++slot) 354 354 mSerialPorts[slot]->i_applyDefaults(aOsType); 355 356 /* Apply parallel port defaults */ 357 for (ULONG slot = 0; slot < RT_ELEMENTS(mParallelPorts); ++slot) 358 mParallelPorts[slot]->i_applyDefaults(); 355 359 356 360 /* Let the OS type select 64-bit ness. */ -
trunk/src/VBox/Main/src-server/ParallelPortImpl.cpp
r54971 r57979 215 215 if (m->bd->fEnabled != !!aEnabled) 216 216 { 217 if (aEnabled &&218 m->bd->strPath.isEmpty())219 return setError(E_INVALIDARG,220 tr("Cannot enable the parallel port %d because the port path is empty or null"),221 m->bd->ulSlot);222 223 217 m->bd.backup(); 224 218 m->bd->fEnabled = !!aEnabled; … … 352 346 if (aPath != m->bd->strPath) 353 347 { 354 HRESULT rc = i_checkSetPath(aPath);355 if (FAILED(rc)) return rc;356 357 348 m->bd.backup(); 358 349 m->bd->strPath = aPath; … … 498 489 499 490 /** 500 * Validates COMSETTER(Path) arguments. 501 */ 502 HRESULT ParallelPort::i_checkSetPath(const Utf8Str &str) 503 { 504 AssertReturn(isWriteLockOnCurrentThread(), E_FAIL); 505 506 if ( m->bd->fEnabled 507 && str.isEmpty() 508 ) 509 return setError(E_INVALIDARG, 510 tr("Path of the parallel port %d may not be empty or null " 511 "when the port is enabled"), 512 m->bd->ulSlot); 513 514 return S_OK; 515 } 516 491 * Applies the defaults for the given parallel port. 492 */ 493 void ParallelPort::i_applyDefaults() 494 { 495 /* sanity */ 496 AutoCaller autoCaller(this); 497 AssertComRCReturnVoid (autoCaller.rc()); 498 499 AutoWriteLock alock(this COMMA_LOCKVAL_SRC_POS); 500 501 /* Set some more defaults based on the slot. */ 502 switch (m->bd->ulSlot) 503 { 504 case 0: 505 { 506 m->bd->ulIOBase = 0x378; 507 m->bd->ulIRQ = 7; 508 break; 509 } 510 case 1: 511 { 512 m->bd->ulIOBase = 0x278; 513 m->bd->ulIRQ = 5; 514 break; 515 } 516 default: break; 517 } 518 } 517 519 518 520 /* vi: set tabstop=4 shiftwidth=4 expandtab: */
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