Changeset 57886 in vbox
- Timestamp:
- Sep 24, 2015 5:40:34 PM (9 years ago)
- File:
-
- 1 edited
-
trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp (modified) (6 diffs)
Legend:
- Unmodified
- Added
- Removed
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trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp
r57860 r57886 4629 4629 rc |= hmR0VmxAddAutoLoadStoreMsr(pVCpu, MSR_K8_KERNEL_GS_BASE, pMixedCtx->msrKERNELGSBASE, false, NULL); 4630 4630 AssertRCReturn(rc, rc); 4631 # ifdef DEBUG4631 # ifdef LOG_ENABLED 4632 4632 PVMXAUTOMSR pMsr = (PVMXAUTOMSR)pVCpu->hm.s.vmx.pvGuestMsr; 4633 4633 for (uint32_t i = 0; i < pVCpu->hm.s.vmx.cMsrs; i++, pMsr++) … … 9117 9117 9118 9118 9119 #ifdef DEBUG9119 #ifdef VBOX_STRICT 9120 9120 /* Is there some generic IPRT define for this that are not in Runtime/internal/\* ?? */ 9121 9121 # define HMVMX_ASSERT_PREEMPT_CPUID_VAR() \ … … 9123 9123 9124 9124 # define HMVMX_ASSERT_PREEMPT_CPUID() \ 9125 do \ 9126 { \ 9127 RTCPUID const idAssertCpuNow = RTThreadPreemptIsEnabled(NIL_RTTHREAD) ? NIL_RTCPUID : RTMpCpuId(); \ 9128 AssertMsg(idAssertCpu == idAssertCpuNow, ("VMX %#x, %#x\n", idAssertCpu, idAssertCpuNow)); \ 9129 } while (0) 9125 do { \ 9126 RTCPUID const idAssertCpuNow = RTThreadPreemptIsEnabled(NIL_RTTHREAD) ? NIL_RTCPUID : RTMpCpuId(); \ 9127 AssertMsg(idAssertCpu == idAssertCpuNow, ("VMX %#x, %#x\n", idAssertCpu, idAssertCpuNow)); \ 9128 } while (0) 9130 9129 9131 9130 # define HMVMX_VALIDATE_EXIT_HANDLER_PARAMS() \ 9132 do { \9133 AssertPtr(pVCpu); \9134 AssertPtr(pMixedCtx); \9135 AssertPtr(pVmxTransient); \9136 Assert(pVmxTransient->fVMEntryFailed == false); \9137 Assert(ASMIntAreEnabled()); \9138 HMVMX_ASSERT_PREEMPT_SAFE(); \9139 HMVMX_ASSERT_PREEMPT_CPUID_VAR(); \9140 Log4Func(("vcpu[%RU32] -v-v-v-v-v-v-v-v-v-v-v-v-v-v-v-v-v-v-v-v-v-v-v-v-v-v-v-v-v-v-v-v-v\n", pVCpu->idCpu)); \9141 HMVMX_ASSERT_PREEMPT_SAFE(); \9142 if (VMMR0IsLogFlushDisabled(pVCpu)) \9143 HMVMX_ASSERT_PREEMPT_CPUID(); \9144 HMVMX_STOP_EXIT_DISPATCH_PROF(); \9145 } while (0)9131 do { \ 9132 AssertPtr(pVCpu); \ 9133 AssertPtr(pMixedCtx); \ 9134 AssertPtr(pVmxTransient); \ 9135 Assert(pVmxTransient->fVMEntryFailed == false); \ 9136 Assert(ASMIntAreEnabled()); \ 9137 HMVMX_ASSERT_PREEMPT_SAFE(); \ 9138 HMVMX_ASSERT_PREEMPT_CPUID_VAR(); \ 9139 Log4Func(("vcpu[%RU32] -v-v-v-v-v-v-v-v-v-v-v-v-v-v-v-v-v-v-v-v-v-v-v-v-v-v-v-v-v-v-v-v-v\n", pVCpu->idCpu)); \ 9140 HMVMX_ASSERT_PREEMPT_SAFE(); \ 9141 if (VMMR0IsLogFlushDisabled(pVCpu)) \ 9142 HMVMX_ASSERT_PREEMPT_CPUID(); \ 9143 HMVMX_STOP_EXIT_DISPATCH_PROF(); \ 9144 } while (0) 9146 9145 9147 9146 # define HMVMX_VALIDATE_EXIT_XCPT_HANDLER_PARAMS() \ 9148 do { \9149 Log4Func(("\n")); \9150 } while (0)9151 #else /* Release builds*/9147 do { \ 9148 Log4Func(("\n")); \ 9149 } while (0) 9150 #else /* nonstrict builds: */ 9152 9151 # define HMVMX_VALIDATE_EXIT_HANDLER_PARAMS() \ 9153 do { \9154 HMVMX_STOP_EXIT_DISPATCH_PROF(); \9155 NOREF(pVCpu); NOREF(pMixedCtx); NOREF(pVmxTransient); \9156 } while (0)9152 do { \ 9153 HMVMX_STOP_EXIT_DISPATCH_PROF(); \ 9154 NOREF(pVCpu); NOREF(pMixedCtx); NOREF(pVmxTransient); \ 9155 } while (0) 9157 9156 # define HMVMX_VALIDATE_EXIT_XCPT_HANDLER_PARAMS() do { } while (0) 9158 9157 #endif … … 11100 11099 } 11101 11100 11102 #ifdef DEBUG11101 #ifdef VBOX_STRICT 11103 11102 if (rcStrict == VINF_IOM_R3_IOPORT_READ) 11104 11103 Assert(!fIOWrite); … … 11107 11106 else 11108 11107 { 11109 /** @todo r=bird: This is missing a bunch of VINF_EM_FIRST..VINF_EM_LAST11110 * statuses, that the VMM device and some others may return. See11111 * IOM_SUCCESS() for guidance. */11108 #if 0 /** @todo r=bird: This is missing a bunch of VINF_EM_FIRST..VINF_EM_LAST 11109 * statuses, that the VMM device and some others may return. See 11110 * IOM_SUCCESS() for guidance. */ 11112 11111 AssertMsg( RT_FAILURE(rcStrict) 11113 11112 || rcStrict == VINF_SUCCESS … … 11117 11116 || rcStrict == VINF_EM_RAW_TO_R3 11118 11117 || rcStrict == VINF_TRPM_XCPT_DISPATCHED, ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict))); 11118 #endif 11119 11119 } 11120 11120 #endif
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