Index: /trunk/src/VBox/VMM/VMMR3/CPUMR3CpuId.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMR3/CPUMR3CpuId.cpp	(revision 55861)
+++ /trunk/src/VBox/VMM/VMMR3/CPUMR3CpuId.cpp	(revision 55862)
@@ -3094,4 +3094,7 @@
                         pCurLeaf->uEax &= RT_LO_U32(fGuestXcr0Mask);
                         pCurLeaf->uEdx &= RT_HI_U32(fGuestXcr0Mask);
+                        AssertLogRelMsgReturn((pCurLeaf->uEax & (XSAVE_C_X87 | XSAVE_C_SSE)) == (XSAVE_C_X87 | XSAVE_C_SSE),
+                                              ("CPUID(0xd/0).EAX missing mandatory X87 or SSE bits: %#RX32", pCurLeaf->uEax),
+                                              VERR_CPUM_IPE_1);
                         cbXSaveMax = pCurLeaf->uEcx;
                         AssertLogRelMsgReturn(cbXSaveMax <= CPUM_MAX_XSAVE_AREA_SIZE && cbXSaveMax >= CPUM_MIN_XSAVE_AREA_SIZE,
@@ -4852,4 +4855,5 @@
      *          EDX - Reserved, but is set to zero if invalid sub-leaf index.
      */
+    uint64_t fGuestXcr0Mask = 0;
     PCPUMCPUIDLEAF pCurLeaf = cpumR3CpuIdGetLeaf(paLeaves, cLeaves, UINT32_C(0x0000000d), 0);
     if (   pCurLeaf
@@ -4860,9 +4864,12 @@
             || pCurLeaf->uEdx) )
     {
-        uint64_t fGuestXcr0Mask = RT_MAKE_U64(pCurLeaf->uEax, pCurLeaf->uEdx);
+        fGuestXcr0Mask = RT_MAKE_U64(pCurLeaf->uEax, pCurLeaf->uEdx);
         if (fGuestXcr0Mask & ~pVM->cpum.s.fXStateHostMask)
             return SSMR3SetLoadError(pSSM, VERR_SSM_LOAD_CPUID_MISMATCH, RT_SRC_POS,
                                      N_("CPUID(0xd/0).EDX:EAX mismatch: %#llx saved, %#llx supported by the current host (XCR0 bits)"),
                                      fGuestXcr0Mask, pVM->cpum.s.fXStateHostMask);
+        if ((fGuestXcr0Mask & (XSAVE_C_X87 | XSAVE_C_SSE)) != (XSAVE_C_X87 | XSAVE_C_SSE))
+            return SSMR3SetLoadError(pSSM, VERR_SSM_LOAD_CPUID_MISMATCH, RT_SRC_POS,
+                                     N_("CPUID(0xd/0).EDX:EAX missing mandatory X87 or SSE bits: %#RX64"), fGuestXcr0Mask);
 
         /* We don't support any additional features yet. */
@@ -4876,10 +4883,4 @@
                                      RT_MAKE_U64(pCurLeaf->uEdx, pCurLeaf->uEcx));
 
-
-        if (pVM->cpum.s.fXStateGuestMask != fGuestXcr0Mask)
-        {
-            LogRel(("CPUM: fXStateGuestMask=%#lx -> %#llx\n", pVM->cpum.s.fXStateGuestMask, fGuestXcr0Mask));
-            pVM->cpum.s.fXStateGuestMask = fGuestXcr0Mask;
-        }
 
         for (uint32_t uSubLeaf = 2; uSubLeaf < 64; uSubLeaf++)
@@ -4902,4 +4903,25 @@
             }
         }
+    }
+    /* Clear leaf 0xd just in case we're loading an old state... */
+    else if (pCurLeaf)
+    {
+        AssertLogRel(uVersion <= CPUM_SAVED_STATE_VERSION_PUT_STRUCT);
+        for (uint32_t uSubLeaf = 0; uSubLeaf < 64; uSubLeaf++)
+        {
+            pCurLeaf = cpumR3CpuIdGetLeaf(paLeaves, cLeaves, UINT32_C(0x0000000d), uSubLeaf);
+            if (pCurLeaf)
+                pCurLeaf->uEax = pCurLeaf->uEbx = pCurLeaf->uEcx = pCurLeaf->uEdx = 0;
+        }
+    }
+
+    /* Update the fXStateGuestMask value for the VM. */
+    if (pVM->cpum.s.fXStateGuestMask != fGuestXcr0Mask)
+    {
+        LogRel(("CPUM: fXStateGuestMask=%#llx -> %#llx\n", pVM->cpum.s.fXStateGuestMask, fGuestXcr0Mask));
+        pVM->cpum.s.fXStateGuestMask = fGuestXcr0Mask;
+        if (!fGuestXcr0Mask && (aGuestCpuIdStd[1].uEcx & X86_CPUID_FEATURE_ECX_XSAVE))
+            return SSMR3SetLoadError(pSSM, VERR_SSM_LOAD_CPUID_MISMATCH, RT_SRC_POS,
+                                     N_("Internal Processing Error: XSAVE feature bit enabled, but leaf 0xd is empty."));
     }
 
