Index: /trunk/src/VBox/HostDrivers/Support/testcase/tstGIP-2.cpp
===================================================================
--- /trunk/src/VBox/HostDrivers/Support/testcase/tstGIP-2.cpp	(revision 53350)
+++ /trunk/src/VBox/HostDrivers/Support/testcase/tstGIP-2.cpp	(revision 53351)
@@ -53,5 +53,7 @@
         { "--hex",              'h', RTGETOPT_REQ_NOTHING },
         { "--decimal",          'd', RTGETOPT_REQ_NOTHING },
-        { "--spin",             's', RTGETOPT_REQ_NOTHING }
+        { "--spin",             's', RTGETOPT_REQ_NOTHING },
+        { "--reference",        'r', RTGETOPT_REQ_UINT64 },  /* reference value of CpuHz, display the
+                                                              * CpuHz deviation in a separate column. */
     };
 
@@ -60,4 +62,5 @@
     bool fSpin = false;
     int ch;
+    uint64_t uCpuHzRef = 0;
     RTGETOPTUNION ValueUnion;
     RTGETOPTSTATE GetState;
@@ -81,4 +84,8 @@
             case 's':
                 fSpin = true;
+                break;
+
+            case 'r':
+                uCpuHzRef = ValueUnion.u64;
                 break;
 
@@ -107,6 +114,7 @@
                      g_pSUPGlobalInfoPage->u32Version);
             RTPrintf(fHex
-                     ? "tstGIP-2:     it: u64NanoTS        delta     u64TSC           UpIntTSC H  TransId      CpuHz      TSC Interval History...\n"
-                     : "tstGIP-2:     it: u64NanoTS        delta     u64TSC             UpIntTSC H    TransId      CpuHz      TSC Interval History...\n");
+                     ? "tstGIP-2:     it: u64NanoTS        delta     u64TSC           UpIntTSC H  TransId      CpuHz      %sTSC Interval History...\n"
+                     : "tstGIP-2:     it: u64NanoTS        delta     u64TSC             UpIntTSC H    TransId      CpuHz      %sTSC Interval History...\n",
+                     uCpuHzRef ? "  CpuHzDev  " : "");
             static SUPGIPCPU s_aaCPUs[2][256];
             for (uint32_t i = 0; i < cIterations; i++)
@@ -122,9 +130,20 @@
                         &&  g_pSUPGlobalInfoPage->aCPUs[iCpu].u64CpuHz != _4G + 1)
                     {
+                        char szCpuHzDeviation[32];
                         PSUPGIPCPU pPrevCpu = &s_aaCPUs[!(i & 1)][iCpu];
                         PSUPGIPCPU pCpu = &s_aaCPUs[i & 1][iCpu];
+                        if (uCpuHzRef)
+                        {
+                            int64_t iCpuHzDeviation = pCpu->u64CpuHz - uCpuHzRef;
+                            if (RT_ABS(iCpuHzDeviation) > 999999999)
+                                RTStrPrintf(szCpuHzDeviation, sizeof(szCpuHzDeviation), "%10s  ", "?");
+                            else
+                                RTStrPrintf(szCpuHzDeviation, sizeof(szCpuHzDeviation), "%10RI64  ", iCpuHzDeviation);
+                        }
+                        else
+                            szCpuHzDeviation[0] = '\0';
                         RTPrintf(fHex
-                                 ? "tstGIP-2: %4d/%d: %016llx %09llx %016llx %08x %d %08x %15llu %08x %08x %08x %08x %08x %08x %08x %08x (%d)\n"
-                                 : "tstGIP-2: %4d/%d: %016llu %09llu %016llu %010u %d %010u %15llu %08x %08x %08x %08x %08x %08x %08x %08x (%d)\n",
+                                 ? "tstGIP-2: %4d/%d: %016llx %09llx %016llx %08x %d %08x %15llu %s%08x %08x %08x %08x %08x %08x %08x %08x (%d)\n"
+                                 : "tstGIP-2: %4d/%d: %016llu %09llu %016llu %010u %d %010u %15llu %s%08x %08x %08x %08x %08x %08x %08x %08x (%d)\n",
                                  i, iCpu,
                                  pCpu->u64NanoTS,
@@ -135,4 +154,5 @@
                                  pCpu->u32TransactionId,
                                  pCpu->u64CpuHz,
+                                 szCpuHzDeviation,
                                  pCpu->au32TSCHistory[0],
                                  pCpu->au32TSCHistory[1],