Index: /trunk/include/VBox/vmm/cpum.h =================================================================== --- /trunk/include/VBox/vmm/cpum.h (revision 50589) +++ /trunk/include/VBox/vmm/cpum.h (revision 50590) @@ -677,5 +677,19 @@ VMMDECL(uint32_t) CPUMGetGuestCodeBits(PVMCPU pVCpu); VMMDECL(DISCPUMODE) CPUMGetGuestDisMode(PVMCPU pVCpu); -VMMDECL(uint64_t) CPUMGetGuestBusFrequency(PVM pVM); +VMMDECL(uint64_t) CPUMGetGuestScalableBusFrequency(PVM pVM); + +/** @name Typical scalable bus frequency values. + * @{ */ +/** Special internal value indicating that we don't know the frequency. + * @internal */ +#define CPUM_SBUSFREQ_UNKNOWN UINT64_C(1) +#define CPUM_SBUSFREQ_100MHZ UINT64_C(100000000) +#define CPUM_SBUSFREQ_133MHZ UINT64_C(133333333) +#define CPUM_SBUSFREQ_167MHZ UINT64_C(166666666) +#define CPUM_SBUSFREQ_200MHZ UINT64_C(200000000) +#define CPUM_SBUSFREQ_267MHZ UINT64_C(266666666) +#define CPUM_SBUSFREQ_333MHZ UINT64_C(333333333) +#define CPUM_SBUSFREQ_400MHZ UINT64_C(400000000) +/** @} */ Index: /trunk/src/VBox/Devices/EFI/DevEFI.cpp =================================================================== --- /trunk/src/VBox/Devices/EFI/DevEFI.cpp (revision 50589) +++ /trunk/src/VBox/Devices/EFI/DevEFI.cpp (revision 50590) @@ -2242,5 +2242,5 @@ pThis->u64TscFrequency = TMCpuTicksPerSecond(PDMDevHlpGetVM(pDevIns)); pThis->u64CpuFrequency = pThis->u64TscFrequency; - pThis->u64FsbFrequency = CPUMGetGuestBusFrequency(PDMDevHlpGetVM(pDevIns)); + pThis->u64FsbFrequency = CPUMGetGuestScalableBusFrequency(PDMDevHlpGetVM(pDevIns)); /* Index: /trunk/src/VBox/VMM/VMMAll/CPUMAllMsrs.cpp =================================================================== --- /trunk/src/VBox/VMM/VMMAll/CPUMAllMsrs.cpp (revision 50589) +++ /trunk/src/VBox/VMM/VMMAll/CPUMAllMsrs.cpp (revision 50590) @@ -182,4 +182,19 @@ /** @callback_method_impl{FNCPUMRDMSR} */ +static DECLCALLBACK(int) cpumMsrRd_Ia32PlatformId(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t *puValue) +{ + uint64_t uValue = pRange->uValue; + if (uValue & 0x1f00) + { + /* Max allowed bus ratio present. */ + /** @todo Implement scaled BUS frequency. */ + } + + *puValue = uValue; + return VINF_SUCCESS; +} + + +/** @callback_method_impl{FNCPUMRDMSR} */ static DECLCALLBACK(int) cpumMsrRd_Ia32ApicBase(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t *puValue) { @@ -714,6 +729,18 @@ static DECLCALLBACK(int) cpumMsrRd_Ia32PerfStatus(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t *puValue) { - /** @todo implement IA32_PERFSTATUS. */ - *puValue = pRange->uValue; + uint64_t uValue = pRange->uValue; + + /* Always provide the max bus ratio for now. XNU expects it. */ + uValue &= ~((UINT64_C(0x1f) << 40) | RT_BIT_64(46)); + + PVM pVM = pVCpu->CTX_SUFF(pVM); + uint64_t uScalableBusHz = CPUMGetGuestScalableBusFrequency(pVM); + uint64_t uTscHz = TMCpuTicksPerSecond(pVM); + uint8_t uTscRatio = (uint8_t)((uTscHz + uScalableBusHz / 2) / uScalableBusHz); + if (uTscRatio > 0x1f) + uTscRatio = 0x1f; + uValue |= (uint64_t)uTscRatio << 40; + + *puValue = uValue; return VINF_SUCCESS; } @@ -1530,57 +1557,123 @@ static DECLCALLBACK(int) cpumMsrRd_IntelP4EbcFrequencyId(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t *puValue) { + uint64_t uValue; + PVM pVM = pVCpu->CTX_SUFF(pVM); + uint64_t uScalableBusHz = CPUMGetGuestScalableBusFrequency(pVM); + if (pVM->cpum.s.GuestFeatures.uModel >= 2) + { + if (uScalableBusHz <= CPUM_SBUSFREQ_100MHZ && pVM->cpum.s.GuestFeatures.uModel <= 2) + { + uScalableBusHz = CPUM_SBUSFREQ_100MHZ; + uValue = 0; + } + else if (uScalableBusHz <= CPUM_SBUSFREQ_133MHZ) + { + uScalableBusHz = CPUM_SBUSFREQ_133MHZ; + uValue = 1; + } + else if (uScalableBusHz <= CPUM_SBUSFREQ_167MHZ) + { + uScalableBusHz = CPUM_SBUSFREQ_167MHZ; + uValue = 3; + } + else if (uScalableBusHz <= CPUM_SBUSFREQ_200MHZ) + { + uScalableBusHz = CPUM_SBUSFREQ_200MHZ; + uValue = 2; + } + else if (uScalableBusHz <= CPUM_SBUSFREQ_267MHZ && pVM->cpum.s.GuestFeatures.uModel > 2) + { + uScalableBusHz = CPUM_SBUSFREQ_267MHZ; + uValue = 0; + } + else + { + uScalableBusHz = CPUM_SBUSFREQ_333MHZ; + uValue = 6; + } + uValue <<= 16; + + uint64_t uTscHz = TMCpuTicksPerSecond(pVM); + uint8_t uTscRatio = (uint8_t)((uTscHz + uScalableBusHz / 2) / uScalableBusHz); + uValue |= (uint32_t)uTscRatio << 24; + + uValue |= pRange->uValue & ~UINT64_C(0xff0f0000); + } + else + { + /* Probably more stuff here, but intel doesn't want to tell us. */ + uValue = pRange->uValue; + uValue &= ~(RT_BIT_64(21) | RT_BIT_64(22) | RT_BIT_64(23)); /* 100 MHz is only documented value */ + } + + *puValue = uValue; + return VINF_SUCCESS; +} + + +/** @callback_method_impl{FNCPUMWRMSR} */ +static DECLCALLBACK(int) cpumMsrWr_IntelP4EbcFrequencyId(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t uValue, uint64_t uRawValue) +{ /** @todo P4 bus frequency config */ - *puValue = pRange->uValue; - return VINF_SUCCESS; -} - - -/** @callback_method_impl{FNCPUMWRMSR} */ -static DECLCALLBACK(int) cpumMsrWr_IntelP4EbcFrequencyId(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t uValue, uint64_t uRawValue) -{ - /** @todo P4 bus frequency config */ - return VINF_SUCCESS; -} - - -/** @callback_method_impl{FNCPUMRDMSR} */ -static DECLCALLBACK(int) cpumMsrRd_IntelPlatformInfo100MHz(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t *puValue) -{ - PVM pVM = pVCpu->CTX_SUFF(pVM); - + return VINF_SUCCESS; +} + + +/** @callback_method_impl{FNCPUMRDMSR} */ +static DECLCALLBACK(int) cpumMsrRd_IntelP6FsbFrequency(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t *puValue) +{ + /* Convert the scalable bus frequency to the encoding in the intel manual (for core+). */ + uint64_t uScalableBusHz = CPUMGetGuestScalableBusFrequency(pVCpu->CTX_SUFF(pVM)); + if (uScalableBusHz <= CPUM_SBUSFREQ_100MHZ) + *puValue = 5; + else if (uScalableBusHz <= CPUM_SBUSFREQ_133MHZ) + *puValue = 1; + else if (uScalableBusHz <= CPUM_SBUSFREQ_167MHZ) + *puValue = 3; + else if (uScalableBusHz <= CPUM_SBUSFREQ_200MHZ) + *puValue = 2; + else if (uScalableBusHz <= CPUM_SBUSFREQ_267MHZ) + *puValue = 0; + else if (uScalableBusHz <= CPUM_SBUSFREQ_333MHZ) + *puValue = 4; + else /*if (uScalableBusHz <= CPUM_SBUSFREQ_400MHZ)*/ + *puValue = 6; + + *puValue |= pRange->uValue & ~UINT64_C(0x7); + + return VINF_SUCCESS; +} + + +/** @callback_method_impl{FNCPUMRDMSR} */ +static DECLCALLBACK(int) cpumMsrRd_IntelPlatformInfo(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t *puValue) +{ /* Just indicate a fixed TSC, no turbo boost, no programmable anything. */ - uint64_t uTscHz = TMCpuTicksPerSecond(pVM); - uint8_t uTsc100MHz = (uint8_t)(uTscHz / UINT32_C(100000000)); - *puValue = ((uint32_t)uTsc100MHz << 8) /* TSC invariant frequency. */ - | ((uint64_t)uTsc100MHz << 40); /* The max turbo frequency. */ + PVM pVM = pVCpu->CTX_SUFF(pVM); + uint64_t uScalableBusHz = CPUMGetGuestScalableBusFrequency(pVM); + uint64_t uTscHz = TMCpuTicksPerSecond(pVM); + uint8_t uTscRatio = (uint8_t)((uTscHz + uScalableBusHz / 2) / uScalableBusHz); + uint64_t uValue = ((uint32_t)uTscRatio << 8) /* TSC invariant frequency. */ + | ((uint64_t)uTscRatio << 40); /* The max turbo frequency. */ /* Ivy bridge has a minimum operating ratio as well. */ if (true) /** @todo detect sandy bridge. */ - *puValue |= (uint64_t)uTsc100MHz << 48; - - return VINF_SUCCESS; -} - - -/** @callback_method_impl{FNCPUMRDMSR} */ -static DECLCALLBACK(int) cpumMsrRd_IntelPlatformInfo133MHz(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t *puValue) -{ - /* Just indicate a fixed TSC, no turbo boost, no programmable anything. */ - uint64_t uTscHz = TMCpuTicksPerSecond(pVCpu->CTX_SUFF(pVM)); - uint8_t uTsc133MHz = (uint8_t)(uTscHz / UINT32_C(133333333)); - *puValue = ((uint32_t)uTsc133MHz << 8) /* TSC invariant frequency. */ - | ((uint64_t)uTsc133MHz << 40); /* The max turbo frequency. */ - return VINF_SUCCESS; -} - - -/** @callback_method_impl{FNCPUMRDMSR} */ -static DECLCALLBACK(int) cpumMsrRd_IntelFlexRatio100MHz(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t *puValue) + uValue |= (uint64_t)uTscRatio << 48; + + *puValue = uValue; + return VINF_SUCCESS; +} + + +/** @callback_method_impl{FNCPUMRDMSR} */ +static DECLCALLBACK(int) cpumMsrRd_IntelFlexRatio(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t *puValue) { uint64_t uValue = pRange->uValue & ~UINT64_C(0x1ff00); - uint64_t uTscHz = TMCpuTicksPerSecond(pVCpu->CTX_SUFF(pVM)); - uint8_t uTsc100MHz = (uint8_t)(uTscHz / UINT32_C(100000000)); - uValue |= (uint32_t)uTsc100MHz << 8; + PVM pVM = pVCpu->CTX_SUFF(pVM); + uint64_t uScalableBusHz = CPUMGetGuestScalableBusFrequency(pVM); + uint64_t uTscHz = TMCpuTicksPerSecond(pVM); + uint8_t uTscRatio = (uint8_t)((uTscHz + uScalableBusHz / 2) / uScalableBusHz); + uValue |= (uint32_t)uTscRatio << 8; *puValue = uValue; @@ -1590,27 +1683,5 @@ /** @callback_method_impl{FNCPUMWRMSR} */ -static DECLCALLBACK(int) cpumMsrWr_IntelFlexRatio100MHz(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t uValue, uint64_t uRawValue) -{ - /** @todo implement writing MSR_FLEX_RATIO. */ - return VINF_SUCCESS; -} - - -/** @callback_method_impl{FNCPUMRDMSR} */ -static DECLCALLBACK(int) cpumMsrRd_IntelFlexRatio133MHz(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t *puValue) -{ - uint64_t uValue = pRange->uValue & ~UINT64_C(0x1ff00); - - uint64_t uTscHz = TMCpuTicksPerSecond(pVCpu->CTX_SUFF(pVM)); - uint8_t uTsc133MHz = (uint8_t)(uTscHz / UINT32_C(133333333)); - uValue |= (uint32_t)uTsc133MHz << 8; - - *puValue = uValue; - return VINF_SUCCESS; -} - - -/** @callback_method_impl{FNCPUMWRMSR} */ -static DECLCALLBACK(int) cpumMsrWr_IntelFlexRatio133MHz(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t uValue, uint64_t uRawValue) +static DECLCALLBACK(int) cpumMsrWr_IntelFlexRatio(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t uValue, uint64_t uRawValue) { /** @todo implement writing MSR_FLEX_RATIO. */ @@ -4309,4 +4380,5 @@ cpumMsrRd_Ia32P5McType, cpumMsrRd_Ia32TimestampCounter, + cpumMsrRd_Ia32PlatformId, cpumMsrRd_Ia32ApicBase, cpumMsrRd_Ia32FeatureControl, @@ -4388,8 +4460,7 @@ cpumMsrRd_IntelP4EbcSoftPowerOn, cpumMsrRd_IntelP4EbcFrequencyId, - cpumMsrRd_IntelPlatformInfo100MHz, - cpumMsrRd_IntelPlatformInfo133MHz, - cpumMsrRd_IntelFlexRatio100MHz, - cpumMsrRd_IntelFlexRatio133MHz, + cpumMsrRd_IntelP6FsbFrequency, + cpumMsrRd_IntelPlatformInfo, + cpumMsrRd_IntelFlexRatio, cpumMsrRd_IntelPkgCStConfigControl, cpumMsrRd_IntelPmgIoCaptureBase, @@ -4627,6 +4698,5 @@ cpumMsrWr_IntelP4EbcSoftPowerOn, cpumMsrWr_IntelP4EbcFrequencyId, - cpumMsrWr_IntelFlexRatio100MHz, - cpumMsrWr_IntelFlexRatio133MHz, + cpumMsrWr_IntelFlexRatio, cpumMsrWr_IntelPkgCStConfigControl, cpumMsrWr_IntelPmgIoCaptureBase, @@ -5000,4 +5070,5 @@ CPUM_ASSERT_RD_MSR_FN(Ia32P5McType); CPUM_ASSERT_RD_MSR_FN(Ia32TimestampCounter); + CPUM_ASSERT_RD_MSR_FN(Ia32PlatformId); CPUM_ASSERT_RD_MSR_FN(Ia32ApicBase); CPUM_ASSERT_RD_MSR_FN(Ia32FeatureControl); @@ -5078,8 +5149,7 @@ CPUM_ASSERT_RD_MSR_FN(IntelP4EbcSoftPowerOn); CPUM_ASSERT_RD_MSR_FN(IntelP4EbcFrequencyId); - CPUM_ASSERT_RD_MSR_FN(IntelPlatformInfo100MHz); - CPUM_ASSERT_RD_MSR_FN(IntelPlatformInfo133MHz); - CPUM_ASSERT_RD_MSR_FN(IntelFlexRatio100MHz); - CPUM_ASSERT_RD_MSR_FN(IntelFlexRatio133MHz); + CPUM_ASSERT_RD_MSR_FN(IntelP6FsbFrequency); + CPUM_ASSERT_RD_MSR_FN(IntelPlatformInfo); + CPUM_ASSERT_RD_MSR_FN(IntelFlexRatio); CPUM_ASSERT_RD_MSR_FN(IntelPkgCStConfigControl); CPUM_ASSERT_RD_MSR_FN(IntelPmgIoCaptureBase); @@ -5306,6 +5376,5 @@ CPUM_ASSERT_WR_MSR_FN(IntelP4EbcSoftPowerOn); CPUM_ASSERT_WR_MSR_FN(IntelP4EbcFrequencyId); - CPUM_ASSERT_WR_MSR_FN(IntelFlexRatio100MHz); - CPUM_ASSERT_WR_MSR_FN(IntelFlexRatio133MHz); + CPUM_ASSERT_WR_MSR_FN(IntelFlexRatio); CPUM_ASSERT_WR_MSR_FN(IntelPkgCStConfigControl); CPUM_ASSERT_WR_MSR_FN(IntelPmgIoCaptureBase); @@ -5453,23 +5522,18 @@ /** - * Gets the bus frequency. + * Gets the scalable bus frequency. * * The bus frequency is used as a base in several MSRs that gives the CPU and * other frequency ratios. * - * @returns Bus frequency in Hz. + * @returns Scalable bus frequency in Hz. Will not return CPUM_SBUSFREQ_UNKNOWN. * @param pVM Pointer to the shared VM structure. */ -VMMDECL(uint64_t) CPUMGetGuestBusFrequency(PVM pVM) -{ - if (CPUMMICROARCH_IS_INTEL_CORE7(pVM->cpum.s.GuestFeatures.enmMicroarch)) - { - return pVM->cpum.s.GuestFeatures.enmMicroarch >= kCpumMicroarch_Intel_Core7_SandyBridge - ? UINT64_C(100000000) /* 100MHz */ - : UINT64_C(133333333); /* 133MHz */ - } - - /* 133MHz */ - return UINT64_C(133333333); +VMMDECL(uint64_t) CPUMGetGuestScalableBusFrequency(PVM pVM) +{ + uint64_t uFreq = pVM->cpum.s.GuestInfo.uScalableBusFreq; + if (uFreq == CPUM_SBUSFREQ_UNKNOWN) + uFreq = CPUM_SBUSFREQ_100MHZ; + return uFreq; } Index: /trunk/src/VBox/VMM/VMMR3/CPUM.cpp =================================================================== --- /trunk/src/VBox/VMM/VMMR3/CPUM.cpp (revision 50589) +++ /trunk/src/VBox/VMM/VMMR3/CPUM.cpp (revision 50590) @@ -988,4 +988,12 @@ AssertLogRelRCReturn(rc, rc); + /* + * Adjust the scalable bus frequency according to the CPUID information + * we're now using. + */ + if (CPUMMICROARCH_IS_INTEL_CORE7(pVM->cpum.s.GuestFeatures.enmMicroarch)) + pCPUM->GuestInfo.uScalableBusFreq = pCPUM->GuestFeatures.enmMicroarch >= kCpumMicroarch_Intel_Core7_SandyBridge + ? UINT64_C(100000000) /* 100MHz */ + : UINT64_C(133333333); /* 133MHz */ /* Index: /trunk/src/VBox/VMM/VMMR3/CPUMR3Db.cpp =================================================================== --- /trunk/src/VBox/VMM/VMMR3/CPUMR3Db.cpp (revision 50589) +++ /trunk/src/VBox/VMM/VMMR3/CPUMR3Db.cpp (revision 50590) @@ -49,4 +49,6 @@ /** The microarchitecture. */ CPUMMICROARCH enmMicroarch; + /** Scalable bus frequency used for reporting other frequencies. */ + uint64_t uScalableBusFreq; /** Flags (TBD). */ uint32_t fFlags; @@ -668,4 +670,5 @@ pInfo->iFirstExtCpuIdLeaf = 0; /* Set by caller. */ pInfo->uPadding = 0; + pInfo->uScalableBusFreq = pEntry->uScalableBusFreq; pInfo->paCpuIdLeavesR0 = NIL_RTR0PTR; pInfo->paMsrRangesR0 = NIL_RTR0PTR; Index: /trunk/src/VBox/VMM/VMMR3/cpus/AMD_Athlon_64_3200.h =================================================================== --- /trunk/src/VBox/VMM/VMMR3/cpus/AMD_Athlon_64_3200.h (revision 50589) +++ /trunk/src/VBox/VMM/VMMR3/cpus/AMD_Athlon_64_3200.h (revision 50590) @@ -205,4 +205,5 @@ /*.uStepping = */ 8, /*.enmMicroarch = */ kCpumMicroarch_AMD_K8_130nm, + /*.uScalableBusFreq = */ CPUM_SBUSFREQ_UNKNOWN, /*.fFlags = */ 0, /*.cMaxPhysAddrWidth= */ 40, Index: /trunk/src/VBox/VMM/VMMR3/cpus/AMD_FX_8150_Eight_Core.h =================================================================== --- /trunk/src/VBox/VMM/VMMR3/cpus/AMD_FX_8150_Eight_Core.h (revision 50589) +++ /trunk/src/VBox/VMM/VMMR3/cpus/AMD_FX_8150_Eight_Core.h (revision 50590) @@ -364,4 +364,5 @@ /*.uStepping = */ 2, /*.enmMicroarch = */ kCpumMicroarch_AMD_15h_Bulldozer, + /*.uScalableBusFreq = */ CPUM_SBUSFREQ_UNKNOWN, /*.fFlags = */ 0, /*.cMaxPhysAddrWidth= */ 48, Index: /trunk/src/VBox/VMM/VMMR3/cpus/AMD_Phenom_II_X6_1100T.h =================================================================== --- /trunk/src/VBox/VMM/VMMR3/cpus/AMD_Phenom_II_X6_1100T.h (revision 50589) +++ /trunk/src/VBox/VMM/VMMR3/cpus/AMD_Phenom_II_X6_1100T.h (revision 50590) @@ -253,4 +253,5 @@ /*.uStepping = */ 0, /*.enmMicroarch = */ kCpumMicroarch_AMD_K10, + /*.uScalableBusFreq = */ CPUM_SBUSFREQ_UNKNOWN, /*.fFlags = */ 0, /*.cMaxPhysAddrWidth= */ 48, Index: /trunk/src/VBox/VMM/VMMR3/cpus/Intel_Core_i5_3570.h =================================================================== --- /trunk/src/VBox/VMM/VMMR3/cpus/Intel_Core_i5_3570.h (revision 50589) +++ /trunk/src/VBox/VMM/VMMR3/cpus/Intel_Core_i5_3570.h (revision 50590) @@ -64,5 +64,5 @@ MFX(0x00000006, "IA32_MONITOR_FILTER_LINE_SIZE", Ia32MonitorFilterLineSize, Ia32MonitorFilterLineSize, 0, 0, UINT64_C(0xffffffffffff0000)), /* value=0x40 */ MFN(0x00000010, "IA32_TIME_STAMP_COUNTER", Ia32TimestampCounter, Ia32TimestampCounter), /* value=0x4293`b0a3f54a */ - MVO(0x00000017, "IA32_PLATFORM_ID", UINT64_C(0x4000000000000)), + MFV(0x00000017, "IA32_PLATFORM_ID", Ia32PlatformId, ReadOnly, UINT64_C(0x4000000000000)), MFX(0x0000001b, "IA32_APIC_BASE", Ia32ApicBase, Ia32ApicBase, UINT32_C(0xfee00c00), 0, UINT64_C(0xfffffff0000002ff)), MFX(0x0000002a, "EBL_CR_POWERON", IntelEblCrPowerOn, ReadOnly, 0, 0, 0), /* value=0x0 */ @@ -78,5 +78,5 @@ MFO(0x0000009b, "IA32_SMM_MONITOR_CTL", Ia32SmmMonitorCtl), /* value=0x0 */ RSN(0x000000c1, 0x000000c8, "IA32_PMCn", Ia32PmcN, Ia32PmcN, 0x0, ~(uint64_t)UINT32_MAX, 0), - MFO(0x000000ce, "MSR_PLATFORM_INFO", IntelPlatformInfo100MHz), /* value=0x81010'e0012200*/ + MFO(0x000000ce, "MSR_PLATFORM_INFO", IntelPlatformInfo), /* value=0x81010'e0012200*/ MFX(0x000000e2, "MSR_PKG_CST_CONFIG_CONTROL", IntelPkgCStConfigControl, IntelPkgCStConfigControl, 0, 0, UINT64_C(0xffffffffe1ffffff)), /* value=0x1e008403 */ MFX(0x000000e4, "MSR_PMG_IO_CAPTURE_BASE", IntelPmgIoCaptureBase, IntelPmgIoCaptureBase, 0, 0, UINT64_C(0xfffffffffff80000)), /* value=0x10414 */ @@ -99,5 +99,5 @@ MFX(0x0000017a, "IA32_MCG_STATUS", Ia32McgStatus, Ia32McgStatus, 0, 0, UINT64_C(0xfffffffffffffff8)), /* value=0x0 */ RSN(0x00000186, 0x0000018d, "IA32_PERFEVTSELn", Ia32PerfEvtSelN, Ia32PerfEvtSelN, 0x0, 0, UINT64_C(0xffffffff00080000)), - MFX(0x00000194, "CLOCK_FLEX_MAX", IntelFlexRatio100MHz, IntelFlexRatio100MHz, 0x190000, 0x1e00ff, UINT64_C(0xffffffffffe00000)), + MFX(0x00000194, "CLOCK_FLEX_MAX", IntelFlexRatio, IntelFlexRatio, 0x190000, 0x1e00ff, UINT64_C(0xffffffffffe00000)), MFX(0x00000198, "IA32_PERF_STATUS", Ia32PerfStatus, ReadOnly, UINT64_C(0x1d2400001000), 0, 0), /* value=0x1d24`00001000 */ MFX(0x00000199, "IA32_PERF_CTL", Ia32PerfCtl, Ia32PerfCtl, 0x1000, 0, 0), /* Might bite. value=0x1000 */ @@ -320,4 +320,5 @@ /*.uStepping = */ 9, /*.enmMicroarch = */ kCpumMicroarch_Intel_Core7_IvyBridge, + /*.uScalableBusFreq = */ CPUM_SBUSFREQ_100MHZ, /*.fFlags = */ 0, /*.cMaxPhysAddrWidth= */ 36, Index: /trunk/src/VBox/VMM/VMMR3/cpus/Intel_Core_i7_3820QM.h =================================================================== --- /trunk/src/VBox/VMM/VMMR3/cpus/Intel_Core_i7_3820QM.h (revision 50589) +++ /trunk/src/VBox/VMM/VMMR3/cpus/Intel_Core_i7_3820QM.h (revision 50590) @@ -64,5 +64,5 @@ MFX(0x00000006, "IA32_MONITOR_FILTER_LINE_SIZE", Ia32MonitorFilterLineSize, Ia32MonitorFilterLineSize, 0, 0, UINT64_C(0xffffffffffff0000)), /* value=0x40 */ MFX(0x00000010, "IA32_TIME_STAMP_COUNTER", Ia32TimestampCounter, Ia32TimestampCounter, 0, 0, 0), - MVO(0x00000017, "IA32_PLATFORM_ID", UINT64_C(0x10000000000000)), + MFV(0x00000017, "IA32_PLATFORM_ID", Ia32PlatformId, ReadOnly, UINT64_C(0x10000000000000)), MFX(0x0000001b, "IA32_APIC_BASE", Ia32ApicBase, Ia32ApicBase, UINT32_C(0xfee00900), 0, UINT64_C(0xfffffff0000002ff)), MFX(0x0000002a, "EBL_CR_POWERON", IntelEblCrPowerOn, ReadOnly, 0, 0, 0), /* value=0x0 */ @@ -362,4 +362,5 @@ /*.uStepping = */ 9, /*.enmMicroarch = */ kCpumMicroarch_Intel_Core7_IvyBridge, + /*.uScalableBusFreq = */ CPUM_SBUSFREQ_UNKNOWN, /*.fFlags = */ 0, /*.cMaxPhysAddrWidth= */ 36, Index: /trunk/src/VBox/VMM/VMMR3/cpus/Intel_Core_i7_3960X.h =================================================================== --- /trunk/src/VBox/VMM/VMMR3/cpus/Intel_Core_i7_3960X.h (revision 50589) +++ /trunk/src/VBox/VMM/VMMR3/cpus/Intel_Core_i7_3960X.h (revision 50590) @@ -73,5 +73,5 @@ MFX(0x00000006, "IA32_MONITOR_FILTER_LINE_SIZE", Ia32MonitorFilterLineSize, Ia32MonitorFilterLineSize, 0, 0, UINT64_C(0xffffffffffff0000)), /* value=0x40 */ MFN(0x00000010, "IA32_TIME_STAMP_COUNTER", Ia32TimestampCounter, Ia32TimestampCounter), /* value=0x177ab4`48466b19 */ - MVO(0x00000017, "IA32_PLATFORM_ID", UINT64_C(0x8000000000000)), + MFV(0x00000017, "IA32_PLATFORM_ID", Ia32PlatformId, ReadOnly, UINT64_C(0x8000000000000)), MFX(0x0000001b, "IA32_APIC_BASE", Ia32ApicBase, Ia32ApicBase, UINT32_C(0xfee00800), 0, UINT64_C(0xffffc000000002ff)), MFX(0x0000002a, "EBL_CR_POWERON", IntelEblCrPowerOn, ReadOnly, 0, 0, 0), /* value=0x0 */ @@ -86,5 +86,5 @@ MFO(0x0000009b, "IA32_SMM_MONITOR_CTL", Ia32SmmMonitorCtl), /* value=0x0 */ RSN(0x000000c1, 0x000000c4, "IA32_PMCn", Ia32PmcN, Ia32PmcN, 0x0, ~(uint64_t)UINT32_MAX, 0), - MFO(0x000000ce, "MSR_PLATFORM_INFO", IntelPlatformInfo100MHz), /* value=0xc00'70012100*/ + MFO(0x000000ce, "MSR_PLATFORM_INFO", IntelPlatformInfo), /* value=0xc00'70012100*/ MFX(0x000000e2, "MSR_PKG_CST_CONFIG_CONTROL", IntelPkgCStConfigControl, IntelPkgCStConfigControl, 0, 0, UINT64_C(0xffffffffe1ffffff)), /* value=0x1e008400 */ MFX(0x000000e4, "MSR_PMG_IO_CAPTURE_BASE", IntelPmgIoCaptureBase, IntelPmgIoCaptureBase, 0, 0, UINT64_C(0xfffffffffff80000)), /* value=0x20414 */ @@ -103,5 +103,5 @@ MFX(0x0000017f, "I7_SB_ERROR_CONTROL", IntelI7SandyErrorControl, IntelI7SandyErrorControl, 0, 0xc, UINT64_C(0xffffffffffffffe1)), /* value=0x0 */ RSN(0x00000186, 0x00000189, "IA32_PERFEVTSELn", Ia32PerfEvtSelN, Ia32PerfEvtSelN, 0x0, 0, UINT64_C(0xffffffff00080000)), - MFX(0x00000194, "CLOCK_FLEX_MAX", IntelFlexRatio100MHz, IntelFlexRatio100MHz, 0xf2100, 0xe0000, UINT64_C(0xfffffffffff00000)), + MFX(0x00000194, "CLOCK_FLEX_MAX", IntelFlexRatio, IntelFlexRatio, 0xf2100, 0xe0000, UINT64_C(0xfffffffffff00000)), MFX(0x00000198, "IA32_PERF_STATUS", Ia32PerfStatus, ReadOnly, UINT64_C(0x288300002400), 0, 0), /* value=0x2883`00002400 */ MFX(0x00000199, "IA32_PERF_CTL", Ia32PerfCtl, Ia32PerfCtl, 0x2700, 0, 0), /* Might bite. value=0x2700 */ @@ -350,4 +350,5 @@ /*.uStepping = */ 6, /*.enmMicroarch = */ kCpumMicroarch_Intel_Core7_SandyBridge, + /*.uScalableBusFreq = */ CPUM_SBUSFREQ_100MHZ, /*.fFlags = */ 0, /*.cMaxPhysAddrWidth= */ 46, Index: /trunk/src/VBox/VMM/VMMR3/cpus/Intel_Pentium_4_3_00GHz.h =================================================================== --- /trunk/src/VBox/VMM/VMMR3/cpus/Intel_Pentium_4_3_00GHz.h (revision 50589) +++ /trunk/src/VBox/VMM/VMMR3/cpus/Intel_Pentium_4_3_00GHz.h (revision 50590) @@ -58,5 +58,5 @@ MFX(0x00000006, "IA32_MONITOR_FILTER_LINE_SIZE", Ia32MonitorFilterLineSize, Ia32MonitorFilterLineSize, 0, UINT64_C(0xffffffffffff0000), 0), /* value=0x40 */ MFN(0x00000010, "IA32_TIME_STAMP_COUNTER", Ia32TimestampCounter, Ia32TimestampCounter), /* value=0x1ac`2077a134 */ - MVI(0x00000017, "IA32_PLATFORM_ID", UINT64_C(0x12000000000000)), + MFV(0x00000017, "IA32_PLATFORM_ID", Ia32PlatformId, ReadOnly, UINT64_C(0x12000000000000)), MFX(0x0000001b, "IA32_APIC_BASE", Ia32ApicBase, Ia32ApicBase, UINT32_C(0xfee00800), 0x600, UINT64_C(0xffffff00000000ff)), MFX(0x0000002a, "P4_EBC_HARD_POWERON", IntelP4EbcHardPowerOn, IntelP4EbcHardPowerOn, 0, UINT64_MAX, 0), /* value=0x0 */ @@ -258,4 +258,5 @@ /*.uStepping = */ 3, /*.enmMicroarch = */ kCpumMicroarch_Intel_NB_Prescott2M, + /*.uScalableBusFreq = */ CPUM_SBUSFREQ_UNKNOWN, /*.fFlags = */ 0, /*.cMaxPhysAddrWidth= */ 36, Index: /trunk/src/VBox/VMM/VMMR3/cpus/Intel_Pentium_M_processor_2_00GHz.h =================================================================== --- /trunk/src/VBox/VMM/VMMR3/cpus/Intel_Pentium_M_processor_2_00GHz.h (revision 50589) +++ /trunk/src/VBox/VMM/VMMR3/cpus/Intel_Pentium_M_processor_2_00GHz.h (revision 50590) @@ -48,5 +48,5 @@ MFI(0x00000001, "IA32_P5_MC_TYPE", Ia32P5McType), /* value=0x0 */ MFX(0x00000010, "IA32_TIME_STAMP_COUNTER", Ia32TimestampCounter, Ia32TimestampCounter, 0, ~(uint64_t)UINT32_MAX, 0), /* value=0x22`4d44782e */ - MVO(0x00000017, "IA32_PLATFORM_ID", UINT64_C(0x140000d0248a28)), + MFV(0x00000017, "IA32_PLATFORM_ID", Ia32PlatformId, ReadOnly, UINT64_C(0x140000d0248a28)), MVX(0x00000018, "P6_UNK_0000_0018", 0, 0, 0), MFX(0x0000001b, "IA32_APIC_BASE", Ia32ApicBase, Ia32ApicBase, UINT32_C(0xfee00100), UINT64_C(0xffffffff00000600), 0xff), @@ -89,5 +89,5 @@ MFX(0x000000c2, "IA32_PMC1", Ia32PmcN, Ia32PmcN, 0, ~(uint64_t)UINT32_MAX, 0), /* value=0x0 */ MVI(0x000000c7, "P6_UNK_0000_00c7", UINT64_C(0x5a000000ac000000)), - MVO(0x000000cd, "P6_UNK_0000_00cd", 0), + MFX(0x000000cd, "MSR_FSB_FREQ", IntelP6FsbFrequency, ReadOnly, 0, 0, 0), MVO(0x000000ce, "P6_UNK_0000_00ce", UINT64_C(0x2812140000000000)), MFX(0x000000fe, "IA32_MTRRCAP", Ia32MtrrCap, ReadOnly, 0x508, 0, 0), /* value=0x508 */ @@ -197,4 +197,5 @@ /*.uStepping = */ 6, /*.enmMicroarch = */ kCpumMicroarch_Intel_P6_M_Dothan, + /*.uScalableBusFreq = */ CPUM_SBUSFREQ_UNKNOWN, /*.fFlags = */ 0, /*.cMaxPhysAddrWidth= */ 32, Index: /trunk/src/VBox/VMM/VMMR3/cpus/Intel_Xeon_X5482_3_20GHz.h =================================================================== --- /trunk/src/VBox/VMM/VMMR3/cpus/Intel_Xeon_X5482_3_20GHz.h (revision 50589) +++ /trunk/src/VBox/VMM/VMMR3/cpus/Intel_Xeon_X5482_3_20GHz.h (revision 50590) @@ -61,5 +61,5 @@ MFX(0x00000006, "IA32_MONITOR_FILTER_LINE_SIZE", Ia32MonitorFilterLineSize, Ia32MonitorFilterLineSize, 0, 0, UINT64_C(0xffffffffffff0000)), /* value=0x40 */ MFN(0x00000010, "IA32_TIME_STAMP_COUNTER", Ia32TimestampCounter, Ia32TimestampCounter), /* value=0x1358`d28c2c60 */ - MVO(0x00000017, "IA32_PLATFORM_ID", UINT64_C(0x18000088e40822)), + MFV(0x00000017, "IA32_PLATFORM_ID", Ia32PlatformId, ReadOnly, UINT64_C(0x18000088e40822)), MFX(0x0000001b, "IA32_APIC_BASE", Ia32ApicBase, Ia32ApicBase, UINT32_C(0xfee00800), 0, UINT64_C(0xffffffc0000006ff)), MVX(0x00000021, "C2_UNK_0000_0021", 0, 0, UINT64_C(0xffffffffffffffc0)), @@ -83,5 +83,5 @@ RSN(0x000000c1, 0x000000c2, "IA32_PMCn", Ia32PmcN, Ia32PmcN, 0x0, ~(uint64_t)UINT32_MAX, 0), MVI(0x000000c7, "P6_UNK_0000_00c7", UINT64_C(0x2300000052000000)), - MVO(0x000000cd, "P6_UNK_0000_00cd", 0x806), + MFX(0x000000cd, "P6_MSR_FSB_FREQ", IntelP6FsbFrequency, ReadOnly, 0x806, 0, 0), MVO(0x000000ce, "P6_UNK_0000_00ce", UINT64_C(0x1208227f7f0710)), MVO(0x000000cf, "C2_UNK_0000_00cf", 0), @@ -226,4 +226,5 @@ /*.uStepping = */ 6, /*.enmMicroarch = */ kCpumMicroarch_Intel_Core2_Penryn, + /*.uScalableBusFreq = */ CPUM_SBUSFREQ_400MHZ, /*.fFlags = */ 0, /*.cMaxPhysAddrWidth= */ 38, Index: /trunk/src/VBox/VMM/VMMR3/cpus/Quad_Core_AMD_Opteron_2384.h =================================================================== --- /trunk/src/VBox/VMM/VMMR3/cpus/Quad_Core_AMD_Opteron_2384.h (revision 50589) +++ /trunk/src/VBox/VMM/VMMR3/cpus/Quad_Core_AMD_Opteron_2384.h (revision 50590) @@ -251,4 +251,5 @@ /*.uStepping = */ 2, /*.enmMicroarch = */ kCpumMicroarch_AMD_K10, + /*.uScalableBusFreq = */ CPUM_SBUSFREQ_UNKNOWN, /*.fFlags = */ 0, /*.cMaxPhysAddrWidth= */ 48, Index: /trunk/src/VBox/VMM/VMMR3/cpus/VIA_QuadCore_L4700_1_2_GHz.h =================================================================== --- /trunk/src/VBox/VMM/VMMR3/cpus/VIA_QuadCore_L4700_1_2_GHz.h (revision 50589) +++ /trunk/src/VBox/VMM/VMMR3/cpus/VIA_QuadCore_L4700_1_2_GHz.h (revision 50590) @@ -80,5 +80,5 @@ RSN(0x000000c1, 0x000000c3, "IA32_PMCn", Ia32PmcN, Ia32PmcN, 0x0, UINT64_C(0xffffff0000000000), 0), /* XXX: The range ended earlier than expected! */ RVI(0x000000c4, 0x000000cc, "ZERO_0000_00c4_THRU_0000_00cc", 0), - MVO(0x000000cd, "P6_UNK_0000_00cd", 0), + MFX(0x000000cd, "MSR_FSB_FREQ", IntelP6FsbFrequency, ReadOnly, 0, 0, 0), RVI(0x000000ce, 0x000000e1, "ZERO_0000_00ce_THRU_0000_00e1", 0), MFI(0x000000e2, "MSR_PKG_CST_CONFIG_CONTROL", IntelPkgCStConfigControl), /* value=0x6a204 */ @@ -385,4 +385,5 @@ /*.uStepping = */ 13, /*.enmMicroarch = */ kCpumMicroarch_VIA_Isaiah, + /*.uScalableBusFreq = */ CPUM_SBUSFREQ_267MHZ, /*??*/ /*.fFlags = */ 0, /*.cMaxPhysAddrWidth= */ 36, Index: /trunk/src/VBox/VMM/include/CPUMInternal.h =================================================================== --- /trunk/src/VBox/VMM/include/CPUMInternal.h (revision 50589) +++ /trunk/src/VBox/VMM/include/CPUMInternal.h (revision 50590) @@ -130,4 +130,5 @@ kCpumMsrRdFn_Ia32P5McType, kCpumMsrRdFn_Ia32TimestampCounter, + kCpumMsrRdFn_Ia32PlatformId, /**< Takes real CPU value for reference. */ kCpumMsrRdFn_Ia32ApicBase, kCpumMsrRdFn_Ia32FeatureControl, @@ -209,8 +210,7 @@ kCpumMsrRdFn_IntelP4EbcSoftPowerOn, kCpumMsrRdFn_IntelP4EbcFrequencyId, - kCpumMsrRdFn_IntelPlatformInfo100MHz, - kCpumMsrRdFn_IntelPlatformInfo133MHz, - kCpumMsrRdFn_IntelFlexRatio100MHz, /**< Takes real value as reference. */ - kCpumMsrRdFn_IntelFlexRatio133MHz, /**< Takes real value as reference. */ + kCpumMsrRdFn_IntelP6FsbFrequency, /**< Takes real value as reference. */ + kCpumMsrRdFn_IntelPlatformInfo, + kCpumMsrRdFn_IntelFlexRatio, /**< Takes real value as reference. */ kCpumMsrRdFn_IntelPkgCStConfigControl, kCpumMsrRdFn_IntelPmgIoCaptureBase, @@ -456,6 +456,5 @@ kCpumMsrWrFn_IntelP4EbcSoftPowerOn, kCpumMsrWrFn_IntelP4EbcFrequencyId, - kCpumMsrWrFn_IntelFlexRatio100MHz, - kCpumMsrWrFn_IntelFlexRatio133MHz, + kCpumMsrWrFn_IntelFlexRatio, kCpumMsrWrFn_IntelPkgCStConfigControl, kCpumMsrWrFn_IntelPmgIoCaptureBase, @@ -746,4 +745,6 @@ * Set to cCpuIdLeaves if none present. */ uint32_t iFirstExtCpuIdLeaf; + /** Alignment padding. */ + uint32_t uPadding; /** How to handle unknown CPUID leaves. */ CPUMUKNOWNCPUID enmUnknownCpuIdMethod; @@ -751,6 +752,6 @@ CPUMCPUID DefCpuId; - /** Alignment padding. */ - uint32_t uPadding; + /** Scalable bus frequency used for reporting other frequencies. */ + uint64_t uScalableBusFreq; /** Pointer to the MSR ranges (ring-0 pointer). */ Index: /trunk/src/VBox/VMM/include/CPUMInternal.mac =================================================================== --- /trunk/src/VBox/VMM/include/CPUMInternal.mac (revision 50589) +++ /trunk/src/VBox/VMM/include/CPUMInternal.mac (revision 50590) @@ -90,5 +90,5 @@ %endif - .GuestInfo resb RTHCPTR_CB*4 + RTRCPTR_CB*2 + 4*10 + .GuestInfo resb RTHCPTR_CB*4 + RTRCPTR_CB*2 + 4*12 .GuestFeatures resb 32 .HostFeatures resb 32 Index: /trunk/src/VBox/VMM/tools/VBoxCpuReport.cpp =================================================================== --- /trunk/src/VBox/VMM/tools/VBoxCpuReport.cpp (revision 50589) +++ /trunk/src/VBox/VMM/tools/VBoxCpuReport.cpp (revision 50590) @@ -71,4 +71,7 @@ /** The alternative debug stream. */ static PRTSTREAM g_pDebugOut; + +/** Snooping info storage for vbCpuRepGuessScalableBusFrequencyName. */ +static uint64_t g_uMsrIntelP6FsbFrequency = UINT64_MAX; @@ -694,5 +697,5 @@ case 0x000000c7: return g_enmMicroarch >= kCpumMicroarch_Intel_Core7_First ? "IA32_PMC6" : "P6_UNK_0000_00c7"; /* P6_M_Dothan. */ case 0x000000c8: return g_enmMicroarch >= kCpumMicroarch_Intel_Core7_First ? "IA32_PMC7" : NULL; - case 0x000000cd: return "P6_UNK_0000_00cd"; /* P6_M_Dothan. */ + case 0x000000cd: return "MSR_FSB_FREQ"; /* P6_M_Dothan. */ case 0x000000ce: return g_enmMicroarch >= kCpumMicroarch_Intel_Core7_First ? "IA32_PLATFORM_INFO" : "P6_UNK_0000_00ce"; /* P6_M_Dothan. */ case 0x000000cf: return "C2_UNK_0000_00cf"; /* Core2_Penryn. */ @@ -1801,4 +1804,5 @@ return "Ia32MonitorFilterLineSize"; case 0x00000010: return "Ia32TimestampCounter"; + case 0x00000017: *pfTakesValue = true; return "Ia32PlatformId"; case 0x0000001b: return "Ia32ApicBase"; case 0x0000002a: *pfTakesValue = true; return g_fIntelNetBurst ? "IntelP4EbcHardPowerOn" : "IntelEblCrPowerOn"; @@ -1843,9 +1847,6 @@ return NULL; - case 0x000000ce: return CPUMMICROARCH_IS_INTEL_CORE7(g_enmMicroarch) - ? (g_enmMicroarch >= kCpumMicroarch_Intel_Core7_SandyBridge - ? "IntelPlatformInfo100MHz" : "IntelPlatformInfo133MHz") - : NULL; - + case 0x000000cd: *pfTakesValue = true; return "IntelP6FsbFrequency"; + case 0x000000ce: return CPUMMICROARCH_IS_INTEL_CORE7(g_enmMicroarch) ? "IntelPlatformInfo" : NULL; case 0x000000e2: return "IntelPkgCStConfigControl"; case 0x000000e3: return "IntelCore2SmmCStMiscInfo"; @@ -1882,10 +1883,5 @@ case 0x00000187: return "Ia32PerfEvtSelN"; case 0x00000193: return /*g_fIntelNetBurst ? NULL :*/ NULL /* Core2_Penryn. */; - case 0x00000194: - if (g_fIntelNetBurst) - break; - *pfTakesValue = true; - return CPUMMICROARCH_IS_INTEL_CORE7(g_enmMicroarch) && g_enmMicroarch >= kCpumMicroarch_Intel_Core7_SandyBridge - ? "IntelFlexRatio100MHz" : "IntelFlexRatio133MHz"; + case 0x00000194: if (g_fIntelNetBurst) break; *pfTakesValue = true; return "IntelFlexRatio"; case 0x00000198: *pfTakesValue = true; return "Ia32PerfStatus"; case 0x00000199: *pfTakesValue = true; return "Ia32PerfCtl"; @@ -4097,4 +4093,10 @@ if (RT_FAILURE(rc)) return rc; + + /* + * A little ugly snooping. + */ + if (uMsr == 0x000000cd && !(fFlags & VBCPUREPMSR_F_WRITE_ONLY)) + g_uMsrIntelP6FsbFrequency = uValue; } @@ -4316,4 +4318,30 @@ +/** + * Takes a shot a the bus frequency name (last part). + * + * @returns Name suffix. + */ +static const char *vbCpuRepGuessScalableBusFrequencyName(void) +{ + if (CPUMMICROARCH_IS_INTEL_CORE7(g_enmMicroarch)) + return g_enmMicroarch >= kCpumMicroarch_Intel_Core7_SandyBridge ? "100MHZ" : "133MHZ"; + + if (g_uMsrIntelP6FsbFrequency != UINT64_MAX) + switch (g_uMsrIntelP6FsbFrequency & 0x7) + { + case 5: return "100MHZ"; + case 1: return "133MHZ"; + case 3: return "167MHZ"; + case 2: return "200MHZ"; + case 0: return "267MHZ"; + case 4: return "333MHZ"; + case 6: return "400MHZ"; + } + + return "UNKNOWN"; +} + + static int produceCpuReport(void) { @@ -4508,4 +4536,5 @@ " /*.uStepping = */ %u,\n" " /*.enmMicroarch = */ kCpumMicroarch_%s,\n" + " /*.uScalableBusFreq = */ CPUM_SBUSFREQ_%s,\n" " /*.fFlags = */ 0,\n" " /*.cMaxPhysAddrWidth= */ %u,\n" @@ -4530,4 +4559,5 @@ ASMGetCpuStepping(uEax), CPUMR3MicroarchName(enmMicroarch), + vbCpuRepGuessScalableBusFrequencyName(), vbCpuRepGetPhysAddrWidth(), szNameC,