Index: /trunk/include/VBox/vmm/cpum.h =================================================================== --- /trunk/include/VBox/vmm/cpum.h (revision 50583) +++ /trunk/include/VBox/vmm/cpum.h (revision 50584) @@ -677,4 +677,5 @@ VMMDECL(uint32_t) CPUMGetGuestCodeBits(PVMCPU pVCpu); VMMDECL(DISCPUMODE) CPUMGetGuestDisMode(PVMCPU pVCpu); +VMMDECL(uint64_t) CPUMGetGuestBusFrequency(PVM pVM); Index: /trunk/src/VBox/Devices/EFI/DevEFI.cpp =================================================================== --- /trunk/src/VBox/Devices/EFI/DevEFI.cpp (revision 50583) +++ /trunk/src/VBox/Devices/EFI/DevEFI.cpp (revision 50584) @@ -23,4 +23,5 @@ #include #include +#include #include #include @@ -2209,5 +2210,6 @@ N_("Configuration error: Querying \"BootArgs\" as a string failed")); - //strcpy(pThis->szBootArgs, "-v keepsyms=1 io=0xf"); + //strcpy(pThis->szBootArgs, "-v keepsyms=1 io=0xf debug=0x2a"); + //strcpy(pThis->szBootArgs, "-v keepsyms=1 debug=0x2a"); LogRel(("EFI: boot args = %s\n", pThis->szBootArgs)); @@ -2239,7 +2241,6 @@ */ pThis->u64TscFrequency = TMCpuTicksPerSecond(PDMDevHlpGetVM(pDevIns)); - /* Multiplier is read from MSR_IA32_PERF_STATUS, and now is hardcoded as 4. */ - pThis->u64FsbFrequency = pThis->u64TscFrequency / 4; pThis->u64CpuFrequency = pThis->u64TscFrequency; + pThis->u64FsbFrequency = CPUMGetGuestBusFrequency(PDMDevHlpGetVM(pDevIns)); /* Index: /trunk/src/VBox/VMM/VMMAll/CPUMAllMsrs.cpp =================================================================== --- /trunk/src/VBox/VMM/VMMAll/CPUMAllMsrs.cpp (revision 50583) +++ /trunk/src/VBox/VMM/VMMAll/CPUMAllMsrs.cpp (revision 50584) @@ -1571,4 +1571,48 @@ *puValue = ((uint32_t)uTsc133MHz << 8) /* TSC invariant frequency. */ | ((uint64_t)uTsc133MHz << 40); /* The max turbo frequency. */ + return VINF_SUCCESS; +} + + +/** @callback_method_impl{FNCPUMRDMSR} */ +static DECLCALLBACK(int) cpumMsrRd_IntelFlexRatio100MHz(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t *puValue) +{ + uint64_t uValue = pRange->uValue & ~UINT64_C(0x1ff00); + + uint64_t uTscHz = TMCpuTicksPerSecond(pVCpu->CTX_SUFF(pVM)); + uint8_t uTsc100MHz = (uint8_t)(uTscHz / UINT32_C(100000000)); + uValue |= (uint32_t)uTsc100MHz << 8; + + *puValue = uValue; + return VINF_SUCCESS; +} + + +/** @callback_method_impl{FNCPUMWRMSR} */ +static DECLCALLBACK(int) cpumMsrWr_IntelFlexRatio100MHz(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t uValue, uint64_t uRawValue) +{ + /** @todo implement writing MSR_FLEX_RATIO. */ + return VINF_SUCCESS; +} + + +/** @callback_method_impl{FNCPUMRDMSR} */ +static DECLCALLBACK(int) cpumMsrRd_IntelFlexRatio133MHz(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t *puValue) +{ + uint64_t uValue = pRange->uValue & ~UINT64_C(0x1ff00); + + uint64_t uTscHz = TMCpuTicksPerSecond(pVCpu->CTX_SUFF(pVM)); + uint8_t uTsc133MHz = (uint8_t)(uTscHz / UINT32_C(133333333)); + uValue |= (uint32_t)uTsc133MHz << 8; + + *puValue = uValue; + return VINF_SUCCESS; +} + + +/** @callback_method_impl{FNCPUMWRMSR} */ +static DECLCALLBACK(int) cpumMsrWr_IntelFlexRatio133MHz(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t uValue, uint64_t uRawValue) +{ + /** @todo implement writing MSR_FLEX_RATIO. */ return VINF_SUCCESS; } @@ -4346,4 +4390,6 @@ cpumMsrRd_IntelPlatformInfo100MHz, cpumMsrRd_IntelPlatformInfo133MHz, + cpumMsrRd_IntelFlexRatio100MHz, + cpumMsrRd_IntelFlexRatio133MHz, cpumMsrRd_IntelPkgCStConfigControl, cpumMsrRd_IntelPmgIoCaptureBase, @@ -4581,4 +4627,6 @@ cpumMsrWr_IntelP4EbcSoftPowerOn, cpumMsrWr_IntelP4EbcFrequencyId, + cpumMsrWr_IntelFlexRatio100MHz, + cpumMsrWr_IntelFlexRatio133MHz, cpumMsrWr_IntelPkgCStConfigControl, cpumMsrWr_IntelPmgIoCaptureBase, @@ -5032,4 +5080,6 @@ CPUM_ASSERT_RD_MSR_FN(IntelPlatformInfo100MHz); CPUM_ASSERT_RD_MSR_FN(IntelPlatformInfo133MHz); + CPUM_ASSERT_RD_MSR_FN(IntelFlexRatio100MHz); + CPUM_ASSERT_RD_MSR_FN(IntelFlexRatio133MHz); CPUM_ASSERT_RD_MSR_FN(IntelPkgCStConfigControl); CPUM_ASSERT_RD_MSR_FN(IntelPmgIoCaptureBase); @@ -5256,4 +5306,6 @@ CPUM_ASSERT_WR_MSR_FN(IntelP4EbcSoftPowerOn); CPUM_ASSERT_WR_MSR_FN(IntelP4EbcFrequencyId); + CPUM_ASSERT_WR_MSR_FN(IntelFlexRatio100MHz); + CPUM_ASSERT_WR_MSR_FN(IntelFlexRatio133MHz); CPUM_ASSERT_WR_MSR_FN(IntelPkgCStConfigControl); CPUM_ASSERT_WR_MSR_FN(IntelPmgIoCaptureBase); @@ -5400,4 +5452,27 @@ +/** + * Gets the bus frequency. + * + * The bus frequency is used as a base in several MSRs that gives the CPU and + * other frequency ratios. + * + * @returns Bus frequency in Hz. + * @param pVM Pointer to the shared VM structure. + */ +VMMDECL(uint64_t) CPUMGetGuestBusFrequency(PVM pVM) +{ + if (CPUMMICROARCH_IS_INTEL_CORE7(pVM->cpum.s.GuestFeatures.enmMicroarch)) + { + return pVM->cpum.s.GuestFeatures.enmMicroarch >= kCpumMicroarch_Intel_Core7_SandyBridge + ? UINT64_C(100000000) /* 100MHz */ + : UINT64_C(133333333); /* 133MHz */ + } + + /* 133MHz */ + return UINT64_C(133333333); +} + + #ifdef IN_RING0 Index: /trunk/src/VBox/VMM/VMMR3/cpus/Intel_Core_i5_3570.h =================================================================== --- /trunk/src/VBox/VMM/VMMR3/cpus/Intel_Core_i5_3570.h (revision 50583) +++ /trunk/src/VBox/VMM/VMMR3/cpus/Intel_Core_i5_3570.h (revision 50584) @@ -78,5 +78,5 @@ MFO(0x0000009b, "IA32_SMM_MONITOR_CTL", Ia32SmmMonitorCtl), /* value=0x0 */ RSN(0x000000c1, 0x000000c8, "IA32_PMCn", Ia32PmcN, Ia32PmcN, 0x0, ~(uint64_t)UINT32_MAX, 0), - MVO(0x000000ce, "P6_UNK_0000_00ce", UINT64_C(0x81010e0012200)), + MFO(0x000000ce, "MSR_PLATFORM_INFO", IntelPlatformInfo100MHz), /* value=0x81010'e0012200*/ MFX(0x000000e2, "MSR_PKG_CST_CONFIG_CONTROL", IntelPkgCStConfigControl, IntelPkgCStConfigControl, 0, 0, UINT64_C(0xffffffffe1ffffff)), /* value=0x1e008403 */ MFX(0x000000e4, "MSR_PMG_IO_CAPTURE_BASE", IntelPmgIoCaptureBase, IntelPmgIoCaptureBase, 0, 0, UINT64_C(0xfffffffffff80000)), /* value=0x10414 */ @@ -99,5 +99,5 @@ MFX(0x0000017a, "IA32_MCG_STATUS", Ia32McgStatus, Ia32McgStatus, 0, 0, UINT64_C(0xfffffffffffffff8)), /* value=0x0 */ RSN(0x00000186, 0x0000018d, "IA32_PERFEVTSELn", Ia32PerfEvtSelN, Ia32PerfEvtSelN, 0x0, 0, UINT64_C(0xffffffff00080000)), - MVX(0x00000194, "CLOCK_FLEX_MAX", 0x190000, 0x1e00ff, UINT64_C(0xffffffffffe00000)), + MFX(0x00000194, "CLOCK_FLEX_MAX", IntelFlexRatio100MHz, IntelFlexRatio100MHz, 0x190000, 0x1e00ff, UINT64_C(0xffffffffffe00000)), MFX(0x00000198, "IA32_PERF_STATUS", Ia32PerfStatus, ReadOnly, UINT64_C(0x1d2400001000), 0, 0), /* value=0x1d24`00001000 */ MFX(0x00000199, "IA32_PERF_CTL", Ia32PerfCtl, Ia32PerfCtl, 0x1000, 0, 0), /* Might bite. value=0x1000 */ Index: /trunk/src/VBox/VMM/VMMR3/cpus/Intel_Core_i7_3960X.h =================================================================== --- /trunk/src/VBox/VMM/VMMR3/cpus/Intel_Core_i7_3960X.h (revision 50583) +++ /trunk/src/VBox/VMM/VMMR3/cpus/Intel_Core_i7_3960X.h (revision 50584) @@ -86,5 +86,5 @@ MFO(0x0000009b, "IA32_SMM_MONITOR_CTL", Ia32SmmMonitorCtl), /* value=0x0 */ RSN(0x000000c1, 0x000000c4, "IA32_PMCn", Ia32PmcN, Ia32PmcN, 0x0, ~(uint64_t)UINT32_MAX, 0), - MVO(0x000000ce, "P6_UNK_0000_00ce", UINT64_C(0xc0070012100)), + MFO(0x000000ce, "MSR_PLATFORM_INFO", IntelPlatformInfo100MHz), /* value=0xc00'70012100*/ MFX(0x000000e2, "MSR_PKG_CST_CONFIG_CONTROL", IntelPkgCStConfigControl, IntelPkgCStConfigControl, 0, 0, UINT64_C(0xffffffffe1ffffff)), /* value=0x1e008400 */ MFX(0x000000e4, "MSR_PMG_IO_CAPTURE_BASE", IntelPmgIoCaptureBase, IntelPmgIoCaptureBase, 0, 0, UINT64_C(0xfffffffffff80000)), /* value=0x20414 */ @@ -103,5 +103,5 @@ MFX(0x0000017f, "I7_SB_ERROR_CONTROL", IntelI7SandyErrorControl, IntelI7SandyErrorControl, 0, 0xc, UINT64_C(0xffffffffffffffe1)), /* value=0x0 */ RSN(0x00000186, 0x00000189, "IA32_PERFEVTSELn", Ia32PerfEvtSelN, Ia32PerfEvtSelN, 0x0, 0, UINT64_C(0xffffffff00080000)), - MVX(0x00000194, "CLOCK_FLEX_MAX", 0xf2100, 0xe0000, UINT64_C(0xfffffffffff00000)), + MFX(0x00000194, "CLOCK_FLEX_MAX", IntelFlexRatio100MHz, IntelFlexRatio100MHz, 0xf2100, 0xe0000, UINT64_C(0xfffffffffff00000)), MFX(0x00000198, "IA32_PERF_STATUS", Ia32PerfStatus, ReadOnly, UINT64_C(0x288300002400), 0, 0), /* value=0x2883`00002400 */ MFX(0x00000199, "IA32_PERF_CTL", Ia32PerfCtl, Ia32PerfCtl, 0x2700, 0, 0), /* Might bite. value=0x2700 */ Index: /trunk/src/VBox/VMM/include/CPUMInternal.h =================================================================== --- /trunk/src/VBox/VMM/include/CPUMInternal.h (revision 50583) +++ /trunk/src/VBox/VMM/include/CPUMInternal.h (revision 50584) @@ -211,4 +211,6 @@ kCpumMsrRdFn_IntelPlatformInfo100MHz, kCpumMsrRdFn_IntelPlatformInfo133MHz, + kCpumMsrRdFn_IntelFlexRatio100MHz, /**< Takes real value as reference. */ + kCpumMsrRdFn_IntelFlexRatio133MHz, /**< Takes real value as reference. */ kCpumMsrRdFn_IntelPkgCStConfigControl, kCpumMsrRdFn_IntelPmgIoCaptureBase, @@ -454,4 +456,6 @@ kCpumMsrWrFn_IntelP4EbcSoftPowerOn, kCpumMsrWrFn_IntelP4EbcFrequencyId, + kCpumMsrWrFn_IntelFlexRatio100MHz, + kCpumMsrWrFn_IntelFlexRatio133MHz, kCpumMsrWrFn_IntelPkgCStConfigControl, kCpumMsrWrFn_IntelPmgIoCaptureBase, Index: /trunk/src/VBox/VMM/tools/VBoxCpuReport.cpp =================================================================== --- /trunk/src/VBox/VMM/tools/VBoxCpuReport.cpp (revision 50583) +++ /trunk/src/VBox/VMM/tools/VBoxCpuReport.cpp (revision 50584) @@ -695,5 +695,5 @@ case 0x000000c8: return g_enmMicroarch >= kCpumMicroarch_Intel_Core7_First ? "IA32_PMC7" : NULL; case 0x000000cd: return "P6_UNK_0000_00cd"; /* P6_M_Dothan. */ - case 0x000000ce: return "P6_UNK_0000_00ce"; /* P6_M_Dothan. */ + case 0x000000ce: return g_enmMicroarch >= kCpumMicroarch_Intel_Core7_First ? "IA32_PLATFORM_INFO" : "P6_UNK_0000_00ce"; /* P6_M_Dothan. */ case 0x000000cf: return "C2_UNK_0000_00cf"; /* Core2_Penryn. */ case 0x000000e0: return "C2_UNK_0000_00e0"; /* Core2_Penryn. */ @@ -1843,4 +1843,9 @@ return NULL; + case 0x000000ce: return CPUMMICROARCH_IS_INTEL_CORE7(g_enmMicroarch) + ? (g_enmMicroarch >= kCpumMicroarch_Intel_Core7_SandyBridge + ? "IntelPlatformInfo100MHz" : "IntelPlatformInfo133MHz") + : NULL; + case 0x000000e2: return "IntelPkgCStConfigControl"; case 0x000000e3: return "IntelCore2SmmCStMiscInfo"; @@ -1877,4 +1882,10 @@ case 0x00000187: return "Ia32PerfEvtSelN"; case 0x00000193: return /*g_fIntelNetBurst ? NULL :*/ NULL /* Core2_Penryn. */; + case 0x00000194: + if (g_fIntelNetBurst) + break; + *pfTakesValue = true; + return CPUMMICROARCH_IS_INTEL_CORE7(g_enmMicroarch) && g_enmMicroarch >= kCpumMicroarch_Intel_Core7_SandyBridge + ? "IntelFlexRatio100MHz" : "IntelFlexRatio133MHz"; case 0x00000198: *pfTakesValue = true; return "Ia32PerfStatus"; case 0x00000199: *pfTakesValue = true; return "Ia32PerfCtl";