Index: /trunk/src/VBox/VMM/VMMAll/CPUMAllRegs.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMAll/CPUMAllRegs.cpp	(revision 48307)
+++ /trunk/src/VBox/VMM/VMMAll/CPUMAllRegs.cpp	(revision 48308)
@@ -675,5 +675,5 @@
                 HyperCR0 &= ~X86_CR0_EM;
                 HyperCR0 |= cr0 & X86_CR0_EM;
-                Log(("CPUM New HyperCR0=%#x\n", HyperCR0));
+                Log(("CPUM: New HyperCR0=%#x\n", HyperCR0));
                 ASMSetCR0(HyperCR0);
             }
@@ -699,5 +699,5 @@
             HyperCR0 &= ~(X86_CR0_TS | X86_CR0_EM | X86_CR0_MP);
             HyperCR0 |= cr0 & (X86_CR0_TS | X86_CR0_EM | X86_CR0_MP);
-            Log(("CPUM New HyperCR0=%#x\n", HyperCR0));
+            Log(("CPUM: New HyperCR0=%#x\n", HyperCR0));
             ASMSetCR0(HyperCR0);
         }
@@ -1150,5 +1150,5 @@
             if (CPUMGetGuestCpuVendor(pVCpu->CTX_SUFF(pVM)) != CPUMCPUVENDOR_INTEL)
             {
-                Log(("MSR %#x is Intel, the virtual CPU isn't an Intel one -> #GP\n", idMsr));
+                Log(("CPUM: MSR %#x is Intel, the virtual CPU isn't an Intel one -> #GP\n", idMsr));
                 rc = VERR_CPUM_RAISE_GP_0;
                 break;
@@ -1194,5 +1194,5 @@
             if (CPUMGetGuestCpuVendor(pVCpu->CTX_SUFF(pVM)) != CPUMCPUVENDOR_AMD)
             {
-                Log(("MSR %#x is AMD, the virtual CPU isn't an Intel one -> #GP\n", idMsr));
+                Log(("CPUM: MSR %#x is AMD, the virtual CPU isn't an Intel one -> #GP\n", idMsr));
                 return VERR_CPUM_RAISE_GP_0;
             }
@@ -1299,5 +1299,5 @@
                     &&  (uValue & 0xff) != 6) )
             {
-                Log(("MSR_IA32_MTRR_DEF_TYPE: #GP(0) - writing reserved value (%#llx)\n", uValue));
+                Log(("CPUM: MSR_IA32_MTRR_DEF_TYPE: #GP(0) - writing reserved value (%#llx)\n", uValue));
                 return VERR_CPUM_RAISE_GP_0;
             }
@@ -1382,5 +1382,5 @@
                 &&  (pVCpu->cpum.s.Guest.cr0 & X86_CR0_PG))
             {
-                Log(("Illegal MSR_K6_EFER_LME change: paging is enabled!!\n"));
+                Log(("CPUM: Illegal MSR_K6_EFER_LME change: paging is enabled!!\n"));
                 return VERR_CPUM_RAISE_GP_0;
             }
@@ -1457,5 +1457,5 @@
             if (CPUMGetGuestCpuVendor(pVCpu->CTX_SUFF(pVM)) != CPUMCPUVENDOR_INTEL)
             {
-                Log(("MSR %#x is Intel, the virtual CPU isn't an Intel one -> #GP\n", idMsr));
+                Log(("CPUM: MSR %#x is Intel, the virtual CPU isn't an Intel one -> #GP\n", idMsr));
                 return VERR_CPUM_RAISE_GP_0;
             }
@@ -1471,5 +1471,5 @@
             if (CPUMGetGuestCpuVendor(pVCpu->CTX_SUFF(pVM)) != CPUMCPUVENDOR_AMD)
             {
-                Log(("MSR %#x is AMD, the virtual CPU isn't an Intel one -> #GP\n", idMsr));
+                Log(("CPUM: MSR %#x is AMD, the virtual CPU isn't an Intel one -> #GP\n", idMsr));
                 return VERR_CPUM_RAISE_GP_0;
             }
@@ -1922,5 +1922,5 @@
                 &&  pVM->cpum.s.enmGuestCpuVendor == CPUMCPUVENDOR_AMD)
                 pVM->cpum.s.aGuestCpuIdExt[1].edx |= X86_CPUID_AMD_FEATURE_EDX_APIC;
-            LogRel(("CPUMSetGuestCpuIdFeature: Enabled APIC\n"));
+            LogRel(("CPUM: SetGuestCpuIdFeature: Enabled APIC\n"));
             break;
 
@@ -1931,5 +1931,5 @@
             if (pVM->cpum.s.aGuestCpuIdStd[0].eax >= 1)
                 pVM->cpum.s.aGuestCpuIdStd[1].ecx |= X86_CPUID_FEATURE_ECX_X2APIC;
-            LogRel(("CPUMSetGuestCpuIdFeature: Enabled x2APIC\n"));
+            LogRel(("CPUM: SetGuestCpuIdFeature: Enabled x2APIC\n"));
             break;
 
@@ -1948,5 +1948,5 @@
             if (pVM->cpum.s.aGuestCpuIdStd[0].eax >= 1)
                 pVM->cpum.s.aGuestCpuIdStd[1].edx |= X86_CPUID_FEATURE_EDX_SEP;
-            LogRel(("CPUMSetGuestCpuIdFeature: Enabled sysenter/exit\n"));
+            LogRel(("CPUM: SetGuestCpuIdFeature: Enabled sysenter/exit\n"));
             break;
         }
@@ -1970,5 +1970,5 @@
 #endif
                 {
-                    LogRel(("WARNING: Can't turn on SYSCALL/SYSRET when the host doesn't support it!!\n"));
+                    LogRel(("CPUM: WARNING! Can't turn on SYSCALL/SYSRET when the host doesn't support it!\n"));
                     return;
                 }
@@ -1976,5 +1976,5 @@
             /* Valid for both Intel and AMD CPUs, although only in 64 bits mode for Intel. */
             pVM->cpum.s.aGuestCpuIdExt[1].edx |= X86_CPUID_EXT_FEATURE_EDX_SYSCALL;
-            LogRel(("CPUMSetGuestCpuIdFeature: Enabled syscall/ret\n"));
+            LogRel(("CPUM: SetGuestCpuIdFeature: Enabled syscall/ret\n"));
             break;
         }
@@ -1988,5 +1988,5 @@
             if (!(ASMCpuId_EDX(1) & X86_CPUID_FEATURE_EDX_PAE))
             {
-                LogRel(("WARNING: Can't turn on PAE when the host doesn't support it!!\n"));
+                LogRel(("CPUM: WARNING! Can't turn on PAE when the host doesn't support it!\n"));
                 return;
             }
@@ -1997,5 +1997,5 @@
                 &&  pVM->cpum.s.enmGuestCpuVendor == CPUMCPUVENDOR_AMD)
                 pVM->cpum.s.aGuestCpuIdExt[1].edx |= X86_CPUID_AMD_FEATURE_EDX_PAE;
-            LogRel(("CPUMSetGuestCpuIdFeature: Enabled PAE\n"));
+            LogRel(("CPUM: SetGuestCpuIdFeature: Enabled PAE\n"));
             break;
         }
@@ -2010,5 +2010,5 @@
                 ||  !(ASMCpuId_EDX(0x80000001) & X86_CPUID_EXT_FEATURE_EDX_LONG_MODE))
             {
-                LogRel(("WARNING: Can't turn on LONG MODE when the host doesn't support it!!\n"));
+                LogRel(("CPUM: WARNING! Can't turn on LONG MODE when the host doesn't support it!\n"));
                 return;
             }
@@ -2016,5 +2016,5 @@
             /* Valid for both Intel and AMD. */
             pVM->cpum.s.aGuestCpuIdExt[1].edx |= X86_CPUID_EXT_FEATURE_EDX_LONG_MODE;
-            LogRel(("CPUMSetGuestCpuIdFeature: Enabled LONG MODE\n"));
+            LogRel(("CPUM: SetGuestCpuIdFeature: Enabled LONG MODE\n"));
             break;
         }
@@ -2029,5 +2029,5 @@
                 ||  !(ASMCpuId_EDX(0x80000001) & X86_CPUID_EXT_FEATURE_EDX_NX))
             {
-                LogRel(("WARNING: Can't turn on NX/XD when the host doesn't support it!!\n"));
+                LogRel(("CPUM: WARNING! Can't turn on NX/XD when the host doesn't support it!\n"));
                 return;
             }
@@ -2035,5 +2035,5 @@
             /* Valid for both Intel and AMD. */
             pVM->cpum.s.aGuestCpuIdExt[1].edx |= X86_CPUID_EXT_FEATURE_EDX_NX;
-            LogRel(("CPUMSetGuestCpuIdFeature: Enabled NX\n"));
+            LogRel(("CPUM: SetGuestCpuIdFeature: Enabled NX\n"));
             break;
         }
@@ -2048,5 +2048,5 @@
                 ||  !(ASMCpuId_ECX(0x80000001) & X86_CPUID_EXT_FEATURE_ECX_LAHF_SAHF))
             {
-                LogRel(("WARNING: Can't turn on LAHF/SAHF when the host doesn't support it!!\n"));
+                LogRel(("CPUM: WARNING! Can't turn on LAHF/SAHF when the host doesn't support it!\n"));
                 return;
             }
@@ -2054,5 +2054,5 @@
             /* Valid for both Intel and AMD. */
             pVM->cpum.s.aGuestCpuIdExt[1].ecx |= X86_CPUID_EXT_FEATURE_ECX_LAHF_SAHF;
-            LogRel(("CPUMSetGuestCpuIdFeature: Enabled LAHF/SAHF\n"));
+            LogRel(("CPUM: SetGuestCpuIdFeature: Enabled LAHF/SAHF\n"));
             break;
         }
@@ -2065,5 +2065,5 @@
                 &&  pVM->cpum.s.enmGuestCpuVendor == CPUMCPUVENDOR_AMD)
                 pVM->cpum.s.aGuestCpuIdExt[1].edx |= X86_CPUID_AMD_FEATURE_EDX_PAT;
-            LogRel(("CPUMSetGuestCpuIdFeature: Enabled PAT\n"));
+            LogRel(("CPUM: SetGuestCpuIdFeature: Enabled PAT\n"));
             break;
         }
@@ -2080,5 +2080,5 @@
             {
                 if (!pVM->cpum.s.u8PortableCpuIdLevel)
-                    LogRel(("WARNING: Can't turn on RDTSCP when the host doesn't support it!!\n"));
+                    LogRel(("CPUM: WARNING! Can't turn on RDTSCP when the host doesn't support it!\n"));
                 return;
             }
@@ -2086,5 +2086,5 @@
             /* Valid for both Intel and AMD. */
             pVM->cpum.s.aGuestCpuIdExt[1].edx |= X86_CPUID_EXT_FEATURE_EDX_RDTSCP;
-            LogRel(("CPUMSetGuestCpuIdFeature: Enabled RDTSCP.\n"));
+            LogRel(("CPUM: SetGuestCpuIdFeature: Enabled RDTSCP.\n"));
             break;
         }
@@ -2096,5 +2096,5 @@
             if (pVM->cpum.s.aGuestCpuIdStd[0].eax >= 1)
                 pVM->cpum.s.aGuestCpuIdStd[1].ecx |= X86_CPUID_FEATURE_ECX_HVP;
-            LogRel(("CPUMSetGuestCpuIdFeature: Enabled Hypervisor Present bit\n"));
+            LogRel(("CPUM: SetGuestCpuIdFeature: Enabled Hypervisor Present bit\n"));
             break;
 
@@ -2182,5 +2182,5 @@
                 &&  pVM->cpum.s.enmGuestCpuVendor == CPUMCPUVENDOR_AMD)
                 pVM->cpum.s.aGuestCpuIdExt[1].edx &= ~X86_CPUID_AMD_FEATURE_EDX_APIC;
-            Log(("CPUMClearGuestCpuIdFeature: Disabled APIC\n"));
+            Log(("CPUM: ClearGuestCpuIdFeature: Disabled APIC\n"));
             break;
 
@@ -2191,5 +2191,5 @@
             if (pVM->cpum.s.aGuestCpuIdStd[0].eax >= 1)
                 pVM->cpum.s.aGuestCpuIdStd[1].ecx &= ~X86_CPUID_FEATURE_ECX_X2APIC;
-            Log(("CPUMClearGuestCpuIdFeature: Disabled x2APIC\n"));
+            Log(("CPUM: ClearGuestCpuIdFeature: Disabled x2APIC\n"));
             break;
 
@@ -2201,5 +2201,5 @@
                 &&  pVM->cpum.s.enmGuestCpuVendor == CPUMCPUVENDOR_AMD)
                 pVM->cpum.s.aGuestCpuIdExt[1].edx &= ~X86_CPUID_AMD_FEATURE_EDX_PAE;
-            Log(("CPUMClearGuestCpuIdFeature: Disabled PAE!\n"));
+            Log(("CPUM: ClearGuestCpuIdFeature: Disabled PAE!\n"));
             break;
         }
@@ -2212,5 +2212,5 @@
                 &&  pVM->cpum.s.enmGuestCpuVendor == CPUMCPUVENDOR_AMD)
                 pVM->cpum.s.aGuestCpuIdExt[1].edx &= ~X86_CPUID_AMD_FEATURE_EDX_PAT;
-            Log(("CPUMClearGuestCpuIdFeature: Disabled PAT!\n"));
+            Log(("CPUM: ClearGuestCpuIdFeature: Disabled PAT!\n"));
             break;
         }
@@ -2234,5 +2234,5 @@
             if (pVM->cpum.s.aGuestCpuIdExt[0].eax >= 0x80000001)
                 pVM->cpum.s.aGuestCpuIdExt[1].edx &= ~X86_CPUID_EXT_FEATURE_EDX_RDTSCP;
-            Log(("CPUMClearGuestCpuIdFeature: Disabled RDTSCP!\n"));
+            Log(("CPUM: ClearGuestCpuIdFeature: Disabled RDTSCP!\n"));
             break;
         }
