Index: /trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp =================================================================== --- /trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp (revision 46870) +++ /trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp (revision 46871) @@ -1691,8 +1691,9 @@ /* - * Correct the hidden CS granularity flag. Haven't seen it being wrong in any other + * Correct the hidden CS granularity bit. Haven't seen it being wrong in any other * register (yet). */ - /** @todo Verify this. */ + /** @todo SELM might need to be fixed as it too should not care about the + * granularity bit. See @bugref{6785}. */ if ( !pMixedCtx->cs.Attr.n.u1Granularity && pMixedCtx->cs.Attr.n.u1Present @@ -1702,4 +1703,5 @@ pMixedCtx->cs.Attr.n.u1Granularity = 1; } + #ifdef VBOX_STRICT # define HMSVM_ASSERT_SEG_GRANULARITY(reg) \ @@ -1708,5 +1710,5 @@ ? (pMixedCtx->reg.u32Limit & 0xfff) == 0xfff \ : pMixedCtx->reg.u32Limit <= UINT32_C(0xfffff)), \ - ("Invalid Segment Attributes %#x %#x %#llx\n", pMixedCtx->reg.u32Limit, \ + ("Invalid Segment Attributes Limit=%#RX32 Attr=%#RX32 Base=%#RX64\n", pMixedCtx->reg.u32Limit, \ pMixedCtx->reg.Attr.u, pMixedCtx->reg.u64Base)) @@ -1945,4 +1947,7 @@ * @param GCPtrFaultAddress The fault-address (CR2) in case it's a * page-fault. + * + * @remarks Statistics counter assumes this is a guest event being reflected to + * the guest i.e. 'StatInjectPendingReflect' is incremented always. */ DECLINLINE(void) hmR0SvmSetPendingEvent(PVMCPU pVCpu, PSVMEVENT pEvent, RTGCUINTPTR GCPtrFaultAddress) @@ -1957,4 +1962,6 @@ Log4(("hmR0SvmSetPendingEvent: u=%#RX64 u8Vector=%#x Type=%#x ErrorCodeValid=%RTbool ErrorCode=%#RX32\n", pEvent->u, pEvent->n.u8Vector, (uint8_t)pEvent->n.u3Type, !!pEvent->n.u1ErrorCodeValid, pEvent->n.u32ErrorCode)); + + STAM_COUNTER_INC(&pVCpu->hm.s.StatInjectPendingReflect); } @@ -2045,5 +2052,7 @@ Log4(("TRPM->HM event: u=%#RX64 u8Vector=%#x uErrorCodeValid=%RTbool uErrorCode=%#RX32\n", Event.u, Event.n.u8Vector, !!Event.n.u1ErrorCodeValid, Event.n.u32ErrorCode)); + hmR0SvmSetPendingEvent(pVCpu, &Event, GCPtrFaultAddress); + STAM_COUNTER_DEC(&pVCpu->hm.s.StatInjectPendingReflect); } @@ -2203,5 +2212,11 @@ hmR0SvmInjectEventVmcb(pVCpu, pVmcb, pCtx, &Event); pVCpu->hm.s.Event.fPending = false; - STAM_COUNTER_INC(&pVCpu->hm.s.StatIntReinject); + +#ifdef VBOX_WITH_STATISTICS + if (Event.n.u3Type == SVM_EVENT_EXTERNAL_IRQ) + STAM_COUNTER_INC(&pVCpu->hm.s.StatInjectInterrupt); + else + STAM_COUNTER_INC(&pVCpu->hm.s.StatInjectXcpt); +#endif } else @@ -2220,4 +2235,6 @@ hmR0SvmInjectEventVmcb(pVCpu, pVmcb, pCtx, &Event); VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_INTERRUPT_NMI); + + STAM_COUNTER_INC(&pVCpu->hm.s.StatInjectXcpt); } else @@ -2241,5 +2258,5 @@ hmR0SvmInjectEventVmcb(pVCpu, pVmcb, pCtx, &Event); - STAM_COUNTER_INC(&pVCpu->hm.s.StatIntInject); + STAM_COUNTER_INC(&pVCpu->hm.s.StatInjectInterrupt); } else @@ -2976,4 +2993,5 @@ * next instruction. */ /** @todo Investigate this later. */ + STAM_COUNTER_INC(&pVCpu->hm.s.StatExitGuestBP); break; @@ -3138,5 +3156,5 @@ /** - * Sets an debug (#DB) exception as pending-for-injection into the VM. + * Sets a debug (#DB) exception as pending-for-injection into the VM. * * @param pVCpu Pointer to the VMCPU. @@ -3367,4 +3385,12 @@ { uint8_t uExitVector = (uint8_t)(pSvmTransient->u64ExitCode - SVM_EXIT_EXCEPTION_0); + +#ifdef VBOX_STRICT + if ( hmR0SvmIsContributoryXcpt(uIdtVector) + && uExitVector == X86_XCPT_PF) + { + Log4(("IDT: Contributory #PF uCR2=%#RX64\n", pVCpu->idCpu, pCtx->cr2)); + } +#endif if ( uExitVector == X86_XCPT_PF && uIdtVector == X86_XCPT_PF) @@ -3415,4 +3441,6 @@ pVCpu->hm.s.Event.fPending = true; + hmR0SvmSetPendingEvent(pVCpu, &pVmcb->ctrl.ExitIntInfo, 0 /* GCPtrFaultAddress */); + /* If uExitVector is #PF, CR2 value will be updated from the VMCB if it's a guest #PF. See hmR0SvmExitXcptPF(). */ Log4(("IDT: Pending vectoring event %#RX64 ErrValid=%RTbool Err=%#RX32\n", pVmcb->ctrl.ExitIntInfo.u, @@ -4298,4 +4326,6 @@ else if (rc == VINF_EM_RAW_GUEST_TRAP) { + pVCpu->hm.s.Event.fPending = false; /* In case it's a contributory or vectoring #PF. */ + if (!pSvmTransient->fVectoringPF) { @@ -4303,5 +4333,4 @@ u32ErrCode = TRPMGetErrorCode(pVCpu); /* The error code might have been changed. */ TRPMResetTrap(pVCpu); - hmR0SvmSetPendingXcptPF(pVCpu, pCtx, u32ErrCode, uFaultAddress); } @@ -4310,5 +4339,4 @@ /* A guest page-fault occurred during delivery of a page-fault. Inject #DF. */ TRPMResetTrap(pVCpu); - pVCpu->hm.s.Event.fPending = false; /* Clear pending #PF to replace it with #DF. */ hmR0SvmSetPendingXcptDF(pVCpu); Log4(("#PF: Pending #DF due to vectoring #PF\n")); @@ -4367,4 +4395,6 @@ HMSVM_CHECK_EXIT_DUE_TO_EVENT_DELIVERY(); + STAM_COUNTER_INC(&pVCpu->hm.s.StatExitGuestMF); + int rc; if (!(pCtx->cr0 & X86_CR0_NE)) @@ -4372,13 +4402,9 @@ /* Old-style FPU error reporting needs some extra work. */ /** @todo don't fall back to the recompiler, but do it manually. */ - rc = VERR_EM_INTERPRETER; - } - else - { - hmR0SvmSetPendingXcptMF(pVCpu); - rc = VINF_SUCCESS; - } - STAM_COUNTER_INC(&pVCpu->hm.s.StatExitGuestMF); - return rc; + return VERR_EM_INTERPRETER; + } + + hmR0SvmSetPendingXcptMF(pVCpu); + return VINF_SUCCESS; } @@ -4403,11 +4429,5 @@ { /* Reflect the exception back to the guest. */ - SVMEVENT Event; - Event.u = 0; - Event.n.u1Valid = 1; - Event.n.u3Type = SVM_EVENT_EXCEPTION; - Event.n.u8Vector = X86_XCPT_DB; - hmR0SvmSetPendingEvent(pVCpu, &Event, 0 /* GCPtrFaultAddress */); - + hmR0SvmSetPendingXcptDB(pVCpu); rc = VINF_SUCCESS; } Index: /trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp =================================================================== --- /trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp (revision 46870) +++ /trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp (revision 46871) @@ -4711,4 +4711,8 @@ * @param GCPtrFaultAddress The fault-address (CR2) in case it's a * page-fault. + * + * @remarks Statistics counter assumes this is a guest event being injected or + * re-injected into the guest, i.e. 'StatInjectPendingReflect' is + * always incremented. */ DECLINLINE(void) hmR0VmxSetPendingEvent(PVMCPU pVCpu, uint32_t u32IntrInfo, uint32_t cbInstr, uint32_t u32ErrCode, @@ -4721,4 +4725,6 @@ pVCpu->hm.s.Event.cbInstr = cbInstr; pVCpu->hm.s.Event.GCPtrFaultAddress = GCPtrFaultAddress; + + STAM_COUNTER_INC(&pVCpu->hm.s.StatInjectPendingReflect); } @@ -4858,4 +4864,5 @@ Log4(("IDT: vcpu[%RU32] Pending vectoring event %#RX64 Err=%#RX32\n", pVCpu->idCpu, pVCpu->hm.s.Event.u64IntrInfo, pVCpu->hm.s.Event.u32ErrCode)); + break; } @@ -4867,4 +4874,5 @@ Log4(("IDT: vcpu[%RU32] Pending vectoring #DF %#RX64 uIdtVector=%#x uExitVector=%#x\n", pVCpu->idCpu, pVCpu->hm.s.Event.u64IntrInfo, uIdtVector, uExitVector)); + break; } @@ -5798,5 +5806,7 @@ Log4(("TRPM->HM event: u32IntrInfo=%#RX32 enmTrpmEvent=%d cbInstr=%u uErrCode=%#RX32 GCPtrFaultAddress=%#RGv\n", u32IntrInfo, enmTrpmEvent, cbInstr, uErrCode, GCPtrFaultAddress)); + hmR0VmxSetPendingEvent(pVCpu, u32IntrInfo, cbInstr, uErrCode, GCPtrFaultAddress); + STAM_COUNTER_DEC(&pVCpu->hm.s.StatInjectPendingReflect); } @@ -6096,5 +6106,11 @@ AssertRCReturn(rc, rc); pVCpu->hm.s.Event.fPending = false; - STAM_COUNTER_INC(&pVCpu->hm.s.StatIntReinject); + +#ifdef VBOX_WITH_STATISTICS + if (uIntrType == VMX_EXIT_INTERRUPTION_INFO_TYPE_EXT_INT) + STAM_COUNTER_INC(&pVCpu->hm.s.StatInjectInterrupt); + else + STAM_COUNTER_INC(&pVCpu->hm.s.StatInjectXcpt); +#endif } else @@ -6114,4 +6130,6 @@ AssertRCReturn(rc, rc); VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_INTERRUPT_NMI); + + STAM_COUNTER_INC(&pVCpu->hm.s.StatInjectXcpt); } else @@ -6137,5 +6155,6 @@ rc = hmR0VmxInjectEventVmcs(pVCpu, pMixedCtx, u32IntrInfo, 0 /* cbInstr */, 0 /* u32ErrCode */, 0 /* GCPtrFaultAddress */, &uIntrState); - STAM_COUNTER_INC(&pVCpu->hm.s.StatIntInject); + + STAM_COUNTER_INC(&pVCpu->hm.s.StatInjectInterrupt); } else @@ -8717,4 +8736,5 @@ return VERR_EM_INTERPRETER; } + hmR0VmxSetPendingEvent(pVCpu, VMX_VMCS_CTRL_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(pVmxTransient->uExitIntrInfo), pVmxTransient->cbInstr, pVmxTransient->uExitIntrErrorCode, 0 /* GCPtrFaultAddress */); Index: /trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp =================================================================== --- /trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp (revision 46870) +++ /trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp (revision 46871) @@ -593,5 +593,5 @@ Log(("Reinjecting event %08x %08x at %RGv\n", pVCpu->hm.s.Event.u64IntrInfo, pVCpu->hm.s.Event.u32ErrCode, (RTGCPTR)pCtx->rip)); - STAM_COUNTER_INC(&pVCpu->hm.s.StatIntReinject); + STAM_COUNTER_INC(&pVCpu->hm.s.StatInjectPendingReflect); Event.u = pVCpu->hm.s.Event.u64IntrInfo; hmR0SvmInjectEvent(pVCpu, pVmcb, pCtx, &Event); @@ -617,4 +617,5 @@ hmR0SvmInjectEvent(pVCpu, pVmcb, pCtx, &Event); + STAM_COUNTER_INC(&pVCpu->hm.s.StatInjectXcpt); return VINF_SUCCESS; } @@ -725,9 +726,13 @@ else Event.n.u3Type = SVM_EVENT_EXCEPTION; + + STAM_COUNTER_INC(&pVCpu->hm.s.StatInjectXcpt); } else + { Event.n.u3Type = SVM_EVENT_EXTERNAL_IRQ; - - STAM_COUNTER_INC(&pVCpu->hm.s.StatIntInject); + STAM_COUNTER_INC(&pVCpu->hm.s.StatInjectInterrupt); + } + hmR0SvmInjectEvent(pVCpu, pVmcb, pCtx, &Event); } /* if (interrupts can be dispatched) */ @@ -2224,6 +2229,6 @@ goto ResumeExecution; + case SVM_EXIT_INTR: STAM_COUNTER_INC(&pVCpu->hm.s.StatExitExtInt); /* no break */ case SVM_EXIT_FERR_FREEZE: - case SVM_EXIT_INTR: case SVM_EXIT_NMI: case SVM_EXIT_SMI: @@ -2806,5 +2811,4 @@ if (exitCode == SVM_EXIT_INTR) { - STAM_COUNTER_INC(&pVCpu->hm.s.StatPendingHostIrq); /* On the next entry we'll only sync the host context. */ pVCpu->hm.s.fContextUseFlags |= HM_CHANGED_HOST_CONTEXT; Index: /trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp =================================================================== --- /trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp (revision 46870) +++ /trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp (revision 46871) @@ -1095,5 +1095,5 @@ Log(("CPU%d: Reinjecting event %RX64 %08x at %RGv cr2=%RX64\n", pVCpu->idCpu, pVCpu->hm.s.Event.u64IntrInfo, pVCpu->hm.s.Event.u32ErrCode, (RTGCPTR)pCtx->rip, pCtx->cr2)); - STAM_COUNTER_INC(&pVCpu->hm.s.StatIntReinject); + STAM_COUNTER_INC(&pVCpu->hm.s.StatInjectPendingReflect); rc = hmR0VmxInjectEvent(pVM, pVCpu, pCtx, pVCpu->hm.s.Event.u64IntrInfo, 0, pVCpu->hm.s.Event.u32ErrCode); AssertRC(rc); @@ -1121,4 +1121,5 @@ AssertRC(rc); + STAM_COUNTER_INC(&pVCpu->hm.s.StatInjectXcpt); return VINF_SUCCESS; } @@ -1233,9 +1234,13 @@ else intInfo |= (VMX_EXIT_INTERRUPTION_INFO_TYPE_HW_XCPT << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT); + + STAM_COUNTER_INC(&pVCpu->hm.s.StatInjectXcpt); } else + { intInfo |= (VMX_EXIT_INTERRUPTION_INFO_TYPE_EXT_INT << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT); - - STAM_COUNTER_INC(&pVCpu->hm.s.StatIntInject); + STAM_COUNTER_INC(&pVCpu->hm.s.StatInjectInterrupt); + } + rc = hmR0VmxInjectEvent(pVM, pVCpu, pCtx, intInfo, 0, errCode); AssertRC(rc); @@ -5015,5 +5020,4 @@ && !VMX_EXIT_INTERRUPTION_INFO_IS_VALID(intInfo)) { - STAM_COUNTER_INC(&pVCpu->hm.s.StatPendingHostIrq); /* On the next entry we'll only sync the host context. */ pVCpu->hm.s.fContextUseFlags |= HM_CHANGED_HOST_CONTEXT; Index: /trunk/src/VBox/VMM/VMMR3/HM.cpp =================================================================== --- /trunk/src/VBox/VMM/VMMR3/HM.cpp (revision 46870) +++ /trunk/src/VBox/VMM/VMMR3/HM.cpp (revision 46871) @@ -222,8 +222,8 @@ EXIT_REASON(SVM_EXIT_EXCEPTION_1E , 94, "Exception Vector 30 (0x1E)."), EXIT_REASON(SVM_EXIT_EXCEPTION_1F , 95, "Exception Vector 31 (0x1F)."), - EXIT_REASON(SVM_EXIT_INTR , 96, "Physical maskable interrupt."), - EXIT_REASON(SVM_EXIT_NMI , 97, "Physical non-maskable interrupt."), - EXIT_REASON(SVM_EXIT_SMI , 98, "System management interrupt."), - EXIT_REASON(SVM_EXIT_INIT , 99, "Physical INIT signal."), + EXIT_REASON(SVM_EXIT_INTR , 96, "Physical maskable interrupt (host)."), + EXIT_REASON(SVM_EXIT_NMI , 97, "Physical non-maskable interrupt (host)."), + EXIT_REASON(SVM_EXIT_SMI , 98, "System management interrupt (host)."), + EXIT_REASON(SVM_EXIT_INIT , 99, "Physical INIT signal (host)."), EXIT_REASON(SVM_EXIT_VINTR ,100, "Virtual interrupt-window exit."), EXIT_REASON(SVM_EXIT_CR0_SEL_WRITE ,101, "Write to CR0 that changed any bits other than CR0.TS or CR0.MP."), @@ -689,11 +689,12 @@ HM_REG_COUNTER(&pVCpu->hm.s.StatSwitchGuestIrq, "/HM/CPU%d/Switch/IrqPending", "PDMGetInterrupt() cleared behind our back!?!."); + HM_REG_COUNTER(&pVCpu->hm.s.StatPendingHostIrq, "/HM/CPU%d/Switch/PendingHostIrq", "Exit to ring-3 due to pending host interrupt before executing guest code."); HM_REG_COUNTER(&pVCpu->hm.s.StatSwitchHmToR3FF, "/HM/CPU%d/Switch/HmToR3FF", "Exit to ring-3 due to pending timers, EMT rendezvous, critical section etc."); HM_REG_COUNTER(&pVCpu->hm.s.StatSwitchExitToR3, "/HM/CPU%d/Switch/ExitToR3", "Exit to ring-3 (total)."); HM_REG_COUNTER(&pVCpu->hm.s.StatSwitchLongJmpToR3, "/HM/CPU%d/Switch/LongJmpToR3", "Longjump to ring-3."); - HM_REG_COUNTER(&pVCpu->hm.s.StatIntInject, "/HM/CPU%d/Irq/Inject", "Injecting hardware interrupt into the guest."); - HM_REG_COUNTER(&pVCpu->hm.s.StatIntReinject, "/HM/CPU%d/Irq/Reinject", "Re-injecting an event into the guest."); - HM_REG_COUNTER(&pVCpu->hm.s.StatPendingHostIrq, "/HM/CPU%d/Irq/PendingOnHost", "Exiting to ring-3 due to preemption pending on the host."); + HM_REG_COUNTER(&pVCpu->hm.s.StatInjectInterrupt, "/HM/CPU%d/EventInject/Interrupt", "Injected an external interrupt into the guest."); + HM_REG_COUNTER(&pVCpu->hm.s.StatInjectXcpt, "/HM/CPU%d/EventInject/Trap", "Injected an exception into the guest."); + HM_REG_COUNTER(&pVCpu->hm.s.StatInjectPendingReflect, "/HM/CPU%d/EventInject/PendingReflect", "Reflecting an exception back to the guest."); HM_REG_COUNTER(&pVCpu->hm.s.StatFlushPage, "/HM/CPU%d/Flush/Page", "Invalidating a guest page on all guest CPUs."); @@ -720,11 +721,10 @@ HM_REG_COUNTER(&pVCpu->hm.s.StatDRxIoCheck, "/HM/CPU%d/Debug/IOCheck", "Checking for I/O breakpoint."); - HM_REG_COUNTER(&pVCpu->hm.s.StatLoadMinimal, "/HM/CPU%d/Load/Minimal", "VM-entry loading just RIP (+RSP, RFLAGs for old VT-x code)."); - HM_REG_COUNTER(&pVCpu->hm.s.StatLoadFull, "/HM/CPU%d/Load/Full", "VM-entry loading more of the state."); + HM_REG_COUNTER(&pVCpu->hm.s.StatLoadMinimal, "/HM/CPU%d/Load/Minimal", "VM-entry loading minimal guest-state."); + HM_REG_COUNTER(&pVCpu->hm.s.StatLoadFull, "/HM/CPU%d/Load/Full", "VM-entry loading the full guest-state."); HM_REG_COUNTER(&pVCpu->hm.s.StatVmxCheckBadRmSelBase, "/HM/CPU%d/VMXCheck/RMSelBase", "Could not use VMX due to unsuitable real-mode selector base."); HM_REG_COUNTER(&pVCpu->hm.s.StatVmxCheckBadRmSelLimit, "/HM/CPU%d/VMXCheck/RMSelLimit", "Could not use VMX due to unsuitable real-mode selector limit."); HM_REG_COUNTER(&pVCpu->hm.s.StatVmxCheckRmOk, "/HM/CPU%d/VMXCheck/VMX_RM", "VMX execution in real (V86) mode OK."); - HM_REG_COUNTER(&pVCpu->hm.s.StatVmxCheckBadSel, "/HM/CPU%d/VMXCheck/Selector", "Could not use VMX due to unsuitable selector."); HM_REG_COUNTER(&pVCpu->hm.s.StatVmxCheckBadRpl, "/HM/CPU%d/VMXCheck/RPL", "Could not use VMX due to unsuitable RPL."); @@ -791,6 +791,6 @@ { STAMR3RegisterF(pVM, &pVCpu->hm.s.paStatInjectedIrqs[j], STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, - "Forwarded interrupts.", - (j < 0x20) ? "/HM/CPU%d/Interrupt/Trap/%02X" : "/HM/CPU%d/Interrupt/IRQ/%02X", i, j); + "Injected event.", + (j < 0x20) ? "/HM/CPU%d/EventInject/Event/Trap/%02X" : "/HM/CPU%d/EventInject/Event/IRQ/%02X", i, j); } Index: /trunk/src/VBox/VMM/include/HMInternal.h =================================================================== --- /trunk/src/VBox/VMM/include/HMInternal.h (revision 46870) +++ /trunk/src/VBox/VMM/include/HMInternal.h (revision 46871) @@ -792,5 +792,7 @@ STAMPROFILEADV StatSpinPokeFailed; - STAMCOUNTER StatIntInject; + STAMCOUNTER StatInjectInterrupt; + STAMCOUNTER StatInjectXcpt; + STAMCOUNTER StatInjectPendingReflect; STAMCOUNTER StatExitShadowNM; @@ -848,5 +850,4 @@ STAMCOUNTER StatExitMtf; STAMCOUNTER StatExitApicAccess; - STAMCOUNTER StatIntReinject; STAMCOUNTER StatPendingHostIrq;