Index: /trunk/include/VBox/vmm/hm_svm.h =================================================================== --- /trunk/include/VBox/vmm/hm_svm.h (revision 46556) +++ /trunk/include/VBox/vmm/hm_svm.h (revision 46557) @@ -259,7 +259,7 @@ /** MONITOR instruction. */ #define SVM_EXIT_MONITOR 0x8A -/** MWAIT instruction uncond. */ -#define SVM_EXIT_MWAIT_UNCOND 0x8B -/** MWAIT instruction when armed. */ +/** MWAIT instruction. */ +#define SVM_EXIT_MWAIT 0x8B +/** MWAIT instruction, when armed. */ #define SVM_EXIT_MWAIT_ARMED 0x8C /** Nested paging: host-level page fault occurred (EXITINFO1 contains fault errorcode; EXITINFO2 contains the guest physical address causing the fault). */ @@ -394,5 +394,5 @@ #define SVM_CTRL2_INTERCEPT_MONITOR RT_BIT(10) /** 11 Intercept MWAIT instruction unconditionally. */ -#define SVM_CTRL2_INTERCEPT_MWAIT_UNCOND RT_BIT(11) +#define SVM_CTRL2_INTERCEPT_MWAIT RT_BIT(11) /** 12 Intercept MWAIT instruction when armed. */ #define SVM_CTRL2_INTERCEPT_MWAIT_ARMED RT_BIT(12) Index: /trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp =================================================================== --- /trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp (revision 46556) +++ /trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp (revision 46557) @@ -575,5 +575,5 @@ | SVM_CTRL2_INTERCEPT_WBINVD /* WBINVD causes a VM-exit. */ | SVM_CTRL2_INTERCEPT_MONITOR /* MONITOR causes a VM-exit. */ - | SVM_CTRL2_INTERCEPT_MWAIT_UNCOND; /* MWAIT causes a VM-exit. */ + | SVM_CTRL2_INTERCEPT_MWAIT; /* MWAIT causes a VM-exit. */ /* CR0, CR4 reads must be intercepted, our shadow values are not necessarily the same as the guest's. */ @@ -2632,4 +2632,19 @@ switch (pSvmTransient->u64ExitCode) { + case SVM_EXIT_CPUID: + return hmR0SvmExitCpuid(pVCpu, pCtx, pSvmTransient); + + case SVM_EXIT_RDTSC: + return hmR0SvmExitRdtsc(pVCpu, pCtx, pSvmTransient); + + case SVM_EXIT_RDTSCP: + return hmR0SvmExitRdtscp(pVCpu, pCtx, pSvmTransient); + + case SVM_EXIT_MONITOR: + return hmR0SvmExitMonitor(pVCpu, pCtx, pSvmTransient); + + case SVM_EXIT_MWAIT: + return hmR0SvmExitMwait(pVCpu, pCtx, pSvmTransient); + case SVM_EXIT_WRITE_CR0: case SVM_EXIT_WRITE_CR3: @@ -2657,4 +2672,19 @@ case SVM_EXIT_INVD: return hmR0SvmExitInvd(pVCpu, pCtx, pSvmTransient); + + case SVM_EXIT_RDPMC: + return hmR0SvmExitRdpmc(pVCpu, pCtx, pSvmTransient); + + case SVM_EXIT_READ_DR0: case SVM_EXIT_READ_DR1: case SVM_EXIT_READ_DR2: case SVM_EXIT_READ_DR3: + case SVM_EXIT_READ_DR6: case SVM_EXIT_READ_DR7: case SVM_EXIT_READ_DR8: case SVM_EXIT_READ_DR9: + case SVM_EXIT_READ_DR10: case SVM_EXIT_READ_DR11: case SVM_EXIT_READ_DR12: case SVM_EXIT_READ_DR13: + case SVM_EXIT_READ_DR14: case SVM_EXIT_READ_DR15: + return hmR0SvmExitReadDRx(pVCpu, pCtx, pSvmTransient); + + case SVM_EXIT_WRITE_DR0: case SVM_EXIT_WRITE_DR1: case SVM_EXIT_WRITE_DR2: case SVM_EXIT_WRITE_DR3: + case SVM_EXIT_WRITE_DR6: case SVM_EXIT_WRITE_DR7: case SVM_EXIT_WRITE_DR8: case SVM_EXIT_WRITE_DR9: + case SVM_EXIT_WRITE_DR10: case SVM_EXIT_WRITE_DR11: case SVM_EXIT_WRITE_DR12: case SVM_EXIT_WRITE_DR13: + case SVM_EXIT_WRITE_DR14: case SVM_EXIT_WRITE_DR15: + return hmR0SvmExitWriteDRx(pVCpu, pCtx, pSvmTransient); default: @@ -2670,28 +2700,4 @@ return hmR0SvmExitSetPendingXcptUD(pVCpu, pCtx, pSvmTransient); - case SVM_EXIT_MWAIT_ARMED: - case SVM_EXIT_PAUSE: - case SVM_EXIT_IDTR_READ: - case SVM_EXIT_GDTR_READ: - case SVM_EXIT_LDTR_READ: - case SVM_EXIT_TR_READ: - case SVM_EXIT_IDTR_WRITE: - case SVM_EXIT_GDTR_WRITE: - case SVM_EXIT_LDTR_WRITE: - case SVM_EXIT_TR_WRITE: - case SVM_EXIT_CR0_SEL_WRITE: - case SVM_EXIT_READ_CR1: case SVM_EXIT_WRITE_CR1: - case SVM_EXIT_READ_CR2: case SVM_EXIT_WRITE_CR2: - case SVM_EXIT_READ_CR5: case SVM_EXIT_WRITE_CR5: - case SVM_EXIT_READ_CR6: case SVM_EXIT_WRITE_CR6: - case SVM_EXIT_READ_CR7: case SVM_EXIT_WRITE_CR7: - case SVM_EXIT_READ_CR8: - case SVM_EXIT_READ_CR9: case SVM_EXIT_WRITE_CR9: - case SVM_EXIT_READ_CR10: case SVM_EXIT_WRITE_CR10: - case SVM_EXIT_READ_CR11: case SVM_EXIT_WRITE_CR11: - case SVM_EXIT_READ_CR12: case SVM_EXIT_WRITE_CR12: - case SVM_EXIT_READ_CR13: case SVM_EXIT_WRITE_CR13: - case SVM_EXIT_READ_CR14: case SVM_EXIT_WRITE_CR14: - case SVM_EXIT_READ_CR15: case SVM_EXIT_WRITE_CR15: default: { @@ -2741,5 +2747,5 @@ * * @return VBox status code. - * @param pVCpu Pointer to the VMCPU. + * @param pVCpu hmR0SvmExitReadDRx Pointer to the VMCPU. * @param pCpu Pointer to the disassembler state. * @param pRegFrame Pointer to the register frame. @@ -2914,5 +2920,5 @@ * #VMEXIT handler for RDTSCP (SVM_EXIT_RDTSCP). Conditional #VMEXIT. */ -HMSVM_EXIT_DECL hmR0SvmExitRdtsc(PVMCPU pVCpu, PCPUMCTX pCtx, PSVMTRANSIENT pSvmTransient) +HMSVM_EXIT_DECL hmR0SvmExitRdtscp(PVMCPU pVCpu, PCPUMCTX pCtx, PSVMTRANSIENT pSvmTransient) { HMSVM_VALIDATE_EXIT_HANDLER_PARAMS(); @@ -2998,7 +3004,7 @@ /** - * #VMEXIT handler for MWAIT (SVM_EXIT_MWAIT_UNCOND). Conditional #VMEXIT. - */ -HMSVM_EXIT_DECL hmR0SvmExitMonitor(PVMCPU pVCpu, PCPUMCTX pCtx, PSVMTRANSIENT pSvmTransient) + * #VMEXIT handler for MWAIT (SVM_EXIT_MWAIT). Conditional #VMEXIT. + */ +HMSVM_EXIT_DECL hmR0SvmExitMwait(PVMCPU pVCpu, PCPUMCTX pCtx, PSVMTRANSIENT pSvmTransient) { HMSVM_VALIDATE_EXIT_HANDLER_PARAMS(); @@ -3150,2 +3156,62 @@ +/** + * #VMEXIT handler for DRx read (SVM_EXIT_READ_DRx). Conditional #VMEXIT. + */ +HMSVM_EXIT_DECL hmR0SvmExitReadDRx(PVMCPU pVCpu, PCPUMCTX pCtx, PSVMTRANSIENT pSvmTransient) +{ + HMSVM_VALIDATE_EXIT_HANDLER_PARAMS(); + STAM_COUNTER_INC(&pVCpu->hm.s.StatExitDRxRead); + + /* We should -not- get this VM-exit if the guest is debugging. */ + if (CPUMIsGuestDebugStateActive(pVCpu)) + { + AssertMsgFailed(("hmR0SvmExitReadDRx: Unexpected exit. pVCpu=%p pCtx=%p\n", pVCpu, pCtx)); + return VERR_SVM_UNEXPECTED_EXIT; + } + + if ( !DBGFIsStepping(pVCpu) + && !CPUMIsHyperDebugStateActive(pVCpu)) + { + /* Don't intercept DRx read and writes. */ + PSVMVMCB pVmcb = (PSVMVMCB)pVCpu->hm.s.svm.pvVmcb; + pVmcb->ctrl.u16InterceptRdDRx = 0; + pVmcb->ctrl.u16InterceptWrDRx = 0; + pVmcb->ctrl.u64VmcbCleanBits &= ~HMSVM_VMCB_CLEAN_INTERCEPTS; + + /* Save the host & load the guest debug state, restart execution of the MOV DRx instruction. */ + PVM pVM = pVCpu->CTX_SUFF(pVM); + rc = CPUMR0LoadGuestDebugState(pVM, pVCpu, pCtx, true /* include DR6 */); + AssertRC(rc); + Assert(CPUMIsGuestDebugStateActive(pVCpu)); + + STAM_COUNTER_INC(&pVCpu->hm.s.StatDRxContextSwitch); + return VINF_SUCCESS; + } + + /** @todo Decode assist. */ + int rc = EMInterpretInstruction(pVCpu, CPUMCTX2CORE(pCtx), 0 /* pvFault */); + if (RT_LIKELY(rc == VINF_SUCCESS)) + { + /* Not necessary for read accesses but whatever doesn't hurt for now, will be fixed with decode assist. */ + pVCpu->hm.s.fContextUseFlags |= HM_CHANGED_GUEST_DEBUG; + } + else + Assert(c == VERR_EM_INTERPRETER); + return rc; +} + + +/** + * #VMEXIT handler for DRx write (SVM_EXIT_WRITE_DRx). Conditional #VMEXIT. + */ +HMSVM_EXIT_DECL hmR0SvmExitWriteDRx(PVMCPU pVCpu, PCPUMCTX pCtx, PSVMTRANSIENT pSvmTransient) +{ + /* For now it's the same since we interpret the instruction anyway. Will change when using of Decode Assist is implemented. */ + int rc = hmR0SvmExitReadDRx(pVCpu, pCtx, pSvmTransient); + STAM_COUNTER_INC(&pVCpu->hm.s.StatExitDRxWrite); + STAM_COUNTER_DEC(&pVCpu->hm.s.StatExitDRxRead); + return rc; +} + + Index: /trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp =================================================================== --- /trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp (revision 46556) +++ /trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp (revision 46557) @@ -394,5 +394,5 @@ | SVM_CTRL2_INTERCEPT_WBINVD | SVM_CTRL2_INTERCEPT_MONITOR - | SVM_CTRL2_INTERCEPT_MWAIT_UNCOND; /* don't execute mwait or else we'll idle inside the + | SVM_CTRL2_INTERCEPT_MWAIT; /* don't execute mwait or else we'll idle inside the guest (host thinks the cpu load is high) */ @@ -2618,5 +2618,5 @@ break; - case SVM_EXIT_MWAIT_UNCOND: + case SVM_EXIT_MWAIT: Log2(("SVM: mwait\n")); STAM_COUNTER_INC(&pVCpu->hm.s.StatExitMwait); Index: /trunk/src/VBox/VMM/VMMR3/HM.cpp =================================================================== --- /trunk/src/VBox/VMM/VMMR3/HM.cpp (revision 46556) +++ /trunk/src/VBox/VMM/VMMR3/HM.cpp (revision 46557) @@ -252,5 +252,5 @@ EXIT_REASON(SVM_EXIT_MSR ,124, "RDMSR or WRMSR access to protected MSR."), EXIT_REASON(SVM_EXIT_TASK_SWITCH ,125, "Task switch."), - EXIT_REASON(SVM_EXIT_FERR_FREEZE ,126, "FP legacy handling enabled, and processor is frozen in an x87/mmx instruction waiting for an interrupt"), + EXIT_REASON(SVM_EXIT_FERR_FREEZE ,126, "Legacy FPU handling enabled; processor is frozen in an x87/mmx instruction waiting for an interrupt"), EXIT_REASON(SVM_EXIT_SHUTDOWN ,127, "Shutdown."), EXIT_REASON(SVM_EXIT_VMRUN ,128, "VMRUN instruction."), @@ -265,5 +265,5 @@ EXIT_REASON(SVM_EXIT_WBINVD ,137, "WBINVD instruction."), EXIT_REASON(SVM_EXIT_MONITOR ,138, "MONITOR instruction."), - EXIT_REASON(SVM_EXIT_MWAIT_UNCOND ,139, "MWAIT instruction unconditional."), + EXIT_REASON(SVM_EXIT_MWAIT ,139, "MWAIT instruction."), EXIT_REASON(SVM_EXIT_MWAIT_ARMED ,140, "MWAIT instruction when armed."), EXIT_REASON(SVM_EXIT_NPF ,1024, "Nested paging: host-level page fault occurred (EXITINFO1 contains fault errorcode; EXITINFO2 contains the guest physical address causing the fault)."),