Index: /trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp =================================================================== --- /trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp (revision 46509) +++ /trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp (revision 46510) @@ -5881,5 +5881,5 @@ AssertRC(rc); - /* Restore FPU state if necessary and resync on next R0 reentry .*/ + /* Restore host FPU state if necessary and resync on next R0 reentry .*/ if (CPUMIsGuestFPUStateActive(pVCpu)) { @@ -5889,5 +5889,5 @@ } - /* Restore debug registers if necessary and resync on next R0 reentry. */ + /* Restore host debug registers if necessary and resync on next R0 reentry. */ if (CPUMIsGuestDebugStateActive(pVCpu)) { @@ -5985,6 +5985,6 @@ /** - * VMMRZCallRing3 callback wrapper which saves the guest state before we - * longjump to ring-3 and possibly get preempted. + * VMMRZCallRing3() callback wrapper which saves the guest state before we + * longjump to ring-3 and possibly get preempted. * * @param pVCpu Pointer to the VMCPU. @@ -5998,5 +5998,5 @@ DECLCALLBACK(void) hmR0VmxCallRing3Callback(PVMCPU pVCpu, VMMCALLRING3 enmOperation, void *pvUser) { - /* VMMRZCallRing3() already makes sure we never get called as a result of an longjmp due to an assertion, */ + /* VMMRZCallRing3() already makes sure we never get called as a result of an longjmp due to an assertion. */ Assert(pVCpu); Assert(pvUser); @@ -7160,7 +7160,8 @@ #ifdef DEBUG /* Is there some generic IPRT define for this that are not in Runtime/internal/\* ?? */ -# define VMX_ASSERT_PREEMPT_CPUID_VAR() \ +# define HMVMX_ASSERT_PREEMPT_CPUID_VAR() \ RTCPUID const idAssertCpu = RTThreadPreemptIsEnabled(NIL_RTTHREAD) ? NIL_RTCPUID : RTMpCpuId() -# define VMX_ASSERT_PREEMPT_CPUID() \ + +# define HMVMX_ASSERT_PREEMPT_CPUID() \ do \ { \ @@ -7169,27 +7170,27 @@ } while (0) -# define VMX_VALIDATE_EXIT_HANDLER_PARAMS() \ - do { \ - AssertPtr(pVCpu); \ - AssertPtr(pMixedCtx); \ - AssertPtr(pVmxTransient); \ - Assert(pVmxTransient->fVMEntryFailed == false); \ - Assert(ASMIntAreEnabled()); \ - Assert(!RTThreadPreemptIsEnabled(NIL_RTTHREAD)); \ - VMX_ASSERT_PREEMPT_CPUID_VAR(); \ - Log4Func(("vcpu[%u] vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv\n", \ - (unsigned)pVCpu->idCpu)); \ - Assert(!RTThreadPreemptIsEnabled(NIL_RTTHREAD)); \ - if (VMMR0IsLogFlushDisabled(pVCpu)) \ - VMX_ASSERT_PREEMPT_CPUID(); \ - HMVMX_STOP_EXIT_DISPATCH_PROF(); \ +# define HMVMX_VALIDATE_EXIT_HANDLER_PARAMS() \ + do { \ + AssertPtr(pVCpu); \ + AssertPtr(pMixedCtx); \ + AssertPtr(pVmxTransient); \ + Assert(pVmxTransient->fVMEntryFailed == false); \ + Assert(ASMIntAreEnabled()); \ + Assert(!RTThreadPreemptIsEnabled(NIL_RTTHREAD)); \ + HMVMX_ASSERT_PREEMPT_CPUID_VAR(); \ + Log4Func(("vcpu[%u] -v-v-v-v-v-v-v-v-v-v-v-v-v-v-v-v-v-v-v-v-v-\n", (uint32_t)pVCpu->idCpu)); \ + Assert(!RTThreadPreemptIsEnabled(NIL_RTTHREAD)); \ + if (VMMR0IsLogFlushDisabled(pVCpu)) \ + HMVMX_ASSERT_PREEMPT_CPUID(); \ + HMVMX_STOP_EXIT_DISPATCH_PROF(); \ } while (0) -# define VMX_VALIDATE_EXIT_XCPT_HANDLER_PARAMS() \ - do { \ - Log4Func(("\n")); \ + +# define HMVMX_VALIDATE_EXIT_XCPT_HANDLER_PARAMS() \ + do { \ + Log4Func(("\n")); \ } while(0) #else /* Release builds */ -# define VMX_VALIDATE_EXIT_HANDLER_PARAMS() do { HMVMX_STOP_EXIT_DISPATCH_PROF(); } while(0) -# define VMX_VALIDATE_EXIT_XCPT_HANDLER_PARAMS() do { } while(0) +# define HMVMX_VALIDATE_EXIT_HANDLER_PARAMS() do { HMVMX_STOP_EXIT_DISPATCH_PROF(); } while(0) +# define HMVMX_VALIDATE_EXIT_XCPT_HANDLER_PARAMS() do { } while(0) #endif @@ -7227,5 +7228,5 @@ HMVMX_EXIT_DECL hmR0VmxExitExtInt(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) { - VMX_VALIDATE_EXIT_HANDLER_PARAMS(); + HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(); STAM_COUNTER_INC(&pVCpu->hm.s.StatExitExtInt); /* 32-bit Windows hosts (4 cores) has trouble with this; causes higher interrupt latency. */ @@ -7244,5 +7245,5 @@ HMVMX_EXIT_DECL hmR0VmxExitXcptNmi(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) { - VMX_VALIDATE_EXIT_HANDLER_PARAMS(); + HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(); STAM_PROFILE_ADV_START(&pVCpu->hm.s.StatExitXcptNmi, y3); @@ -7349,5 +7350,5 @@ HMVMX_EXIT_DECL hmR0VmxExitIntWindow(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) { - VMX_VALIDATE_EXIT_HANDLER_PARAMS(); + HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(); /* Indicate that we no longer need to VM-exit when the guest is ready to receive interrupts, it is now ready. */ @@ -7368,5 +7369,5 @@ HMVMX_EXIT_DECL hmR0VmxExitNmiWindow(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) { - VMX_VALIDATE_EXIT_HANDLER_PARAMS(); + HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(); AssertMsgFailed(("Unexpected NMI-window exit.\n")); return VERR_VMX_UNEXPECTED_EXIT_CODE; @@ -7379,5 +7380,5 @@ HMVMX_EXIT_DECL hmR0VmxExitWbinvd(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) { - VMX_VALIDATE_EXIT_HANDLER_PARAMS(); + HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(); STAM_COUNTER_INC(&pVCpu->hm.s.StatExitWbinvd); return hmR0VmxAdvanceGuestRip(pVCpu, pMixedCtx, pVmxTransient); @@ -7390,5 +7391,5 @@ HMVMX_EXIT_DECL hmR0VmxExitInvd(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) { - VMX_VALIDATE_EXIT_HANDLER_PARAMS(); + HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(); STAM_COUNTER_INC(&pVCpu->hm.s.StatExitInvd); return hmR0VmxAdvanceGuestRip(pVCpu, pMixedCtx, pVmxTransient); @@ -7401,5 +7402,5 @@ HMVMX_EXIT_DECL hmR0VmxExitCpuid(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) { - VMX_VALIDATE_EXIT_HANDLER_PARAMS(); + HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(); PVM pVM = pVCpu->CTX_SUFF(pVM); int rc = EMInterpretCpuId(pVM, pVCpu, CPUMCTX2CORE(pMixedCtx)); @@ -7424,5 +7425,5 @@ HMVMX_EXIT_DECL hmR0VmxExitGetsec(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) { - VMX_VALIDATE_EXIT_HANDLER_PARAMS(); + HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(); int rc = hmR0VmxSaveGuestCR4(pVCpu, pMixedCtx); AssertRCReturn(rc, rc); @@ -7441,5 +7442,5 @@ HMVMX_EXIT_DECL hmR0VmxExitRdtsc(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) { - VMX_VALIDATE_EXIT_HANDLER_PARAMS(); + HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(); int rc = hmR0VmxSaveGuestCR4(pVCpu, pMixedCtx); /** @todo review if CR4 is really required by EM. */ AssertRCReturn(rc, rc); @@ -7470,5 +7471,5 @@ HMVMX_EXIT_DECL hmR0VmxExitRdtscp(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) { - VMX_VALIDATE_EXIT_HANDLER_PARAMS(); + HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(); int rc = hmR0VmxSaveGuestCR4(pVCpu, pMixedCtx); /** @todo review if CR4 is really required by EM. */ rc |= hmR0VmxSaveGuestAutoLoadStoreMsrs(pVCpu, pMixedCtx); /* For MSR_K8_TSC_AUX */ @@ -7500,5 +7501,5 @@ HMVMX_EXIT_DECL hmR0VmxExitRdpmc(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) { - VMX_VALIDATE_EXIT_HANDLER_PARAMS(); + HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(); int rc = hmR0VmxSaveGuestCR4(pVCpu, pMixedCtx); /** @todo review if CR4 is really required by EM. */ rc |= hmR0VmxSaveGuestCR0(pVCpu, pMixedCtx); /** @todo review if CR0 is really required by EM. */ @@ -7527,5 +7528,5 @@ HMVMX_EXIT_DECL hmR0VmxExitInvlpg(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) { - VMX_VALIDATE_EXIT_HANDLER_PARAMS(); + HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(); PVM pVM = pVCpu->CTX_SUFF(pVM); Assert(!pVM->hm.s.fNestedPaging); @@ -7554,5 +7555,5 @@ HMVMX_EXIT_DECL hmR0VmxExitMonitor(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) { - VMX_VALIDATE_EXIT_HANDLER_PARAMS(); + HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(); int rc = hmR0VmxSaveGuestCR0(pVCpu, pMixedCtx); rc |= hmR0VmxSaveGuestRflags(pVCpu, pMixedCtx); @@ -7579,5 +7580,5 @@ HMVMX_EXIT_DECL hmR0VmxExitMwait(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) { - VMX_VALIDATE_EXIT_HANDLER_PARAMS(); + HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(); int rc = hmR0VmxSaveGuestCR0(pVCpu, pMixedCtx); rc |= hmR0VmxSaveGuestRflags(pVCpu, pMixedCtx); @@ -7680,5 +7681,5 @@ * still get these exits. See Intel spec. "23.8 Restrictions on VMX operation". */ - VMX_VALIDATE_EXIT_HANDLER_PARAMS(); + HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(); return VINF_SUCCESS; /** @todo r=ramshankar: correct?. */ } @@ -7691,5 +7692,5 @@ HMVMX_EXIT_DECL hmR0VmxExitTripleFault(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) { - VMX_VALIDATE_EXIT_HANDLER_PARAMS(); + HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(); return VINF_EM_RESET; } @@ -7701,5 +7702,5 @@ HMVMX_EXIT_DECL hmR0VmxExitHlt(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) { - VMX_VALIDATE_EXIT_HANDLER_PARAMS(); + HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(); Assert(pVCpu->hm.s.vmx.u32ProcCtls & VMX_VMCS_CTRL_PROC_EXEC_HLT_EXIT); int rc = hmR0VmxSaveGuestRip(pVCpu, pMixedCtx); @@ -7724,5 +7725,5 @@ HMVMX_EXIT_DECL hmR0VmxExitSetPendingXcptUD(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) { - VMX_VALIDATE_EXIT_HANDLER_PARAMS(); + HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(); hmR0VmxSetPendingXcptUD(pVCpu, pMixedCtx); return VINF_SUCCESS; @@ -7735,5 +7736,5 @@ HMVMX_EXIT_DECL hmR0VmxExitPreemptTimer(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) { - VMX_VALIDATE_EXIT_HANDLER_PARAMS(); + HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(); /* If the preemption-timer has expired, reinitialize the preemption timer on next VM-entry. */ @@ -7753,5 +7754,5 @@ HMVMX_EXIT_DECL hmR0VmxExitXsetbv(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) { - VMX_VALIDATE_EXIT_HANDLER_PARAMS(); + HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(); /* We expose XSETBV to the guest, fallback to the recompiler for emulation. */ @@ -7766,5 +7767,5 @@ HMVMX_EXIT_DECL hmR0VmxExitInvpcid(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) { - VMX_VALIDATE_EXIT_HANDLER_PARAMS(); + HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(); /* The guest should not invalidate the host CPU's TLBs, fallback to recompiler. */ @@ -7857,5 +7858,5 @@ HMVMX_EXIT_DECL hmR0VmxExitXdtrAccess(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) { - VMX_VALIDATE_EXIT_HANDLER_PARAMS(); + HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(); /* By default, we don't enable VMX_VMCS_CTRL_PROC_EXEC2_DESCRIPTOR_TABLE_EXIT. */ @@ -7873,5 +7874,5 @@ HMVMX_EXIT_DECL hmR0VmxExitRdrand(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) { - VMX_VALIDATE_EXIT_HANDLER_PARAMS(); + HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(); /* By default, we don't enable VMX_VMCS_CTRL_PROC_EXEC2_RDRAND_EXIT. */ @@ -7889,5 +7890,5 @@ HMVMX_EXIT_DECL hmR0VmxExitRdmsr(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) { - VMX_VALIDATE_EXIT_HANDLER_PARAMS(); + HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(); /* EMInterpretRdmsr() requires CR0, Eflags and SS segment register. */ @@ -7917,5 +7918,5 @@ HMVMX_EXIT_DECL hmR0VmxExitWrmsr(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) { - VMX_VALIDATE_EXIT_HANDLER_PARAMS(); + HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(); PVM pVM = pVCpu->CTX_SUFF(pVM); int rc = VINF_SUCCESS; @@ -8021,5 +8022,5 @@ HMVMX_EXIT_DECL hmR0VmxExitPause(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) { - VMX_VALIDATE_EXIT_HANDLER_PARAMS(); + HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(); /* By default, we don't enable VMX_VMCS_CTRL_PROC_EXEC_PAUSE_EXIT. */ @@ -8038,5 +8039,5 @@ HMVMX_EXIT_DECL hmR0VmxExitTprBelowThreshold(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) { - VMX_VALIDATE_EXIT_HANDLER_PARAMS(); + HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(); Assert(pVCpu->hm.s.vmx.u32ProcCtls & VMX_VMCS_CTRL_PROC_EXEC_USE_TPR_SHADOW); @@ -8064,5 +8065,5 @@ HMVMX_EXIT_DECL hmR0VmxExitMovCRx(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) { - VMX_VALIDATE_EXIT_HANDLER_PARAMS(); + HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(); STAM_PROFILE_ADV_START(&pVCpu->hm.s.StatExitMovCRx, y2); int rc = hmR0VmxReadExitQualificationVmcs(pVCpu, pVmxTransient); @@ -8196,5 +8197,5 @@ HMVMX_EXIT_DECL hmR0VmxExitIoInstr(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) { - VMX_VALIDATE_EXIT_HANDLER_PARAMS(); + HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(); STAM_PROFILE_ADV_START(&pVCpu->hm.s.StatExitIO, y1); @@ -8368,5 +8369,5 @@ HMVMX_EXIT_DECL hmR0VmxExitTaskSwitch(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) { - VMX_VALIDATE_EXIT_HANDLER_PARAMS(); + HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(); /* Check if this task-switch occurred while delivery an event through the guest IDT. */ @@ -8422,5 +8423,5 @@ HMVMX_EXIT_DECL hmR0VmxExitMtf(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) { - VMX_VALIDATE_EXIT_HANDLER_PARAMS(); + HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(); Assert(pVCpu->hm.s.vmx.u32ProcCtls & VMX_VMCS_CTRL_PROC_EXEC_MONITOR_TRAP_FLAG); pVCpu->hm.s.vmx.u32ProcCtls &= ~VMX_VMCS_CTRL_PROC_EXEC_MONITOR_TRAP_FLAG; @@ -8437,5 +8438,5 @@ HMVMX_EXIT_DECL hmR0VmxExitApicAccess(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) { - VMX_VALIDATE_EXIT_HANDLER_PARAMS(); + HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(); /* If this VM-exit occurred while delivering an event through the guest IDT, handle it accordingly. */ @@ -8512,5 +8513,5 @@ HMVMX_EXIT_DECL hmR0VmxExitMovDRx(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) { - VMX_VALIDATE_EXIT_HANDLER_PARAMS(); + HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(); /* We should -not- get this VM-exit if the guest is debugging. */ @@ -8590,5 +8591,5 @@ HMVMX_EXIT_DECL hmR0VmxExitEptMisconfig(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) { - VMX_VALIDATE_EXIT_HANDLER_PARAMS(); + HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(); Assert(pVCpu->CTX_SUFF(pVM)->hm.s.fNestedPaging); @@ -8642,5 +8643,5 @@ HMVMX_EXIT_DECL hmR0VmxExitEptViolation(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) { - VMX_VALIDATE_EXIT_HANDLER_PARAMS(); + HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(); Assert(pVCpu->CTX_SUFF(pVM)->hm.s.fNestedPaging); @@ -8711,5 +8712,5 @@ static int hmR0VmxExitXcptMF(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) { - VMX_VALIDATE_EXIT_XCPT_HANDLER_PARAMS(); + HMVMX_VALIDATE_EXIT_XCPT_HANDLER_PARAMS(); STAM_COUNTER_INC(&pVCpu->hm.s.StatExitGuestMF); @@ -8734,5 +8735,5 @@ static int hmR0VmxExitXcptBP(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) { - VMX_VALIDATE_EXIT_XCPT_HANDLER_PARAMS(); + HMVMX_VALIDATE_EXIT_XCPT_HANDLER_PARAMS(); STAM_COUNTER_INC(&pVCpu->hm.s.StatExitGuestBP); @@ -8765,5 +8766,5 @@ static int hmR0VmxExitXcptDB(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) { - VMX_VALIDATE_EXIT_XCPT_HANDLER_PARAMS(); + HMVMX_VALIDATE_EXIT_XCPT_HANDLER_PARAMS(); STAM_COUNTER_INC(&pVCpu->hm.s.StatExitGuestDB); @@ -8817,5 +8818,5 @@ static int hmR0VmxExitXcptNM(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) { - VMX_VALIDATE_EXIT_XCPT_HANDLER_PARAMS(); + HMVMX_VALIDATE_EXIT_XCPT_HANDLER_PARAMS(); #ifndef HMVMX_ALWAYS_TRAP_ALL_XCPTS @@ -8856,5 +8857,5 @@ static int hmR0VmxExitXcptGP(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) { - VMX_VALIDATE_EXIT_XCPT_HANDLER_PARAMS(); + HMVMX_VALIDATE_EXIT_XCPT_HANDLER_PARAMS(); STAM_COUNTER_INC(&pVCpu->hm.s.StatExitGuestGP); @@ -9101,5 +9102,5 @@ static int hmR0VmxExitXcptGeneric(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) { - VMX_VALIDATE_EXIT_XCPT_HANDLER_PARAMS(); + HMVMX_VALIDATE_EXIT_XCPT_HANDLER_PARAMS(); /* Re-inject the exception into the guest. This cannot be a double-fault condition which would have been handled in @@ -9120,5 +9121,5 @@ static int hmR0VmxExitXcptPF(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) { - VMX_VALIDATE_EXIT_XCPT_HANDLER_PARAMS(); + HMVMX_VALIDATE_EXIT_XCPT_HANDLER_PARAMS(); PVM pVM = pVCpu->CTX_SUFF(pVM); int rc = hmR0VmxReadExitQualificationVmcs(pVCpu, pVmxTransient);