Index: /trunk/include/VBox/vmm/selm.h =================================================================== --- /trunk/include/VBox/vmm/selm.h (revision 45532) +++ /trunk/include/VBox/vmm/selm.h (revision 45533) @@ -95,9 +95,11 @@ VMMR3DECL(int) SELMR3Term(PVM pVM); VMMR3DECL(void) SELMR3Reset(PVM pVM); +# ifdef VBOX_WITH_RAW_MODE +VMMR3DECL(void) SELMR3DisableMonitoring(PVM pVM); VMMR3DECL(VBOXSTRICTRC) SELMR3UpdateFromCPUM(PVM pVM, PVMCPU pVCpu); VMMR3DECL(int) SELMR3SyncTSS(PVM pVM, PVMCPU pVCpu); +# endif VMMR3DECL(int) SELMR3GetSelectorInfo(PVM pVM, PVMCPU pVCpu, RTSEL Sel, PDBGFSELINFO pSelInfo); VMMR3DECL(int) SELMR3GetShadowSelectorInfo(PVM pVM, RTSEL Sel, PDBGFSELINFO pSelInfo); -VMMR3DECL(void) SELMR3DisableMonitoring(PVM pVM); VMMR3DECL(void) SELMR3DumpDescriptor(X86DESC Desc, RTSEL Sel, const char *pszMsg); VMMR3DECL(void) SELMR3DumpHyperGDT(PVM pVM); @@ -107,7 +109,7 @@ VMMR3DECL(bool) SELMR3CheckTSS(PVM pVM); VMMR3DECL(int) SELMR3DebugCheck(PVM pVM); -#ifdef VBOX_WITH_SAFE_STR +# ifdef VBOX_WITH_SAFE_STR VMMR3DECL(bool) SELMR3CheckShadowTR(PVM pVM); -#endif +# endif /** @def SELMR3_DEBUG_CHECK Index: /trunk/include/VBox/vmm/trpm.h =================================================================== --- /trunk/include/VBox/vmm/trpm.h (revision 45532) +++ /trunk/include/VBox/vmm/trpm.h (revision 45533) @@ -101,9 +101,9 @@ VMMR3DECL(void) TRPMR3Reset(PVM pVM); VMMR3DECL(int) TRPMR3Term(PVM pVM); -VMMR3DECL(void) TRPMR3DisableMonitoring(PVM pVM); -VMMR3DECL(int) TRPMR3SyncIDT(PVM pVM, PVMCPU pVCpu); VMMR3DECL(int) TRPMR3InjectEvent(PVM pVM, PVMCPU pVCpu, TRPMEVENT enmEvent); # ifdef VBOX_WITH_RAW_MODE +VMMR3DECL(void) TRPMR3DisableMonitoring(PVM pVM); VMMR3_INT_DECL(int) TRPMR3GetImportRC(PVM pVM, const char *pszSymbol, PRTRCPTR pRCPtrValue); +VMMR3DECL(int) TRPMR3SyncIDT(PVM pVM, PVMCPU pVCpu); VMMR3DECL(bool) TRPMR3IsGateHandler(PVM pVM, RTRCPTR GCPtr); VMMR3DECL(uint32_t) TRPMR3QueryGateByHandler(PVM pVM, RTRCPTR GCPtr); Index: /trunk/include/VBox/vmm/vm.h =================================================================== --- /trunk/include/VBox/vmm/vm.h (revision 45532) +++ /trunk/include/VBox/vmm/vm.h (revision 45533) @@ -271,4 +271,14 @@ /** The name of the Ring 0 Context VMM Core module. */ #define VMMR0_MAIN_MODULE_NAME "VMMR0.r0" + +/** + * Wrapper macro for avoiding too much \#ifdef VBOX_WITH_RAW_MODE. + */ +#ifdef VBOX_WITH_RAW_MODE +# define VM_WHEN_RAW_MODE(a_WithExpr, a_WithoutExpr) a_WithExpr +#else +# define VM_WHEN_RAW_MODE(a_WithExpr, a_WithoutExpr) a_WithoutExpr +#endif + /** VM Forced Action Flags. @@ -370,18 +380,22 @@ /** The bit number for VMCPU_FF_TLB_FLUSH. */ #define VMCPU_FF_TLB_FLUSH_BIT 19 +#ifdef VBOX_WITH_RAW_MODE /** Check the interrupt and trap gates */ -#define VMCPU_FF_TRPM_SYNC_IDT RT_BIT_32(20) +# define VMCPU_FF_TRPM_SYNC_IDT RT_BIT_32(20) /** Check Guest's TSS ring 0 stack */ -#define VMCPU_FF_SELM_SYNC_TSS RT_BIT_32(21) +# define VMCPU_FF_SELM_SYNC_TSS RT_BIT_32(21) /** Check Guest's GDT table */ -#define VMCPU_FF_SELM_SYNC_GDT RT_BIT_32(22) +# define VMCPU_FF_SELM_SYNC_GDT RT_BIT_32(22) /** Check Guest's LDT table */ -#define VMCPU_FF_SELM_SYNC_LDT RT_BIT_32(23) +# define VMCPU_FF_SELM_SYNC_LDT RT_BIT_32(23) +#endif /* VBOX_WITH_RAW_MODE */ /** Inhibit interrupts pending. See EMGetInhibitInterruptsPC(). */ #define VMCPU_FF_INHIBIT_INTERRUPTS RT_BIT_32(24) +#ifdef VBOX_WITH_RAW_MODE /** CSAM needs to scan the page that's being executed */ -#define VMCPU_FF_CSAM_SCAN_PAGE RT_BIT_32(26) +# define VMCPU_FF_CSAM_SCAN_PAGE RT_BIT_32(26) /** CSAM needs to do some homework. */ -#define VMCPU_FF_CSAM_PENDING_ACTION RT_BIT_32(27) +# define VMCPU_FF_CSAM_PENDING_ACTION RT_BIT_32(27) +#endif /* VBOX_WITH_RAW_MODE */ /** Force return to Ring-3. */ #define VMCPU_FF_TO_R3 RT_BIT_32(28) @@ -396,24 +410,30 @@ | VM_FF_PDM_QUEUES | VM_FF_PDM_DMA | VM_FF_EMT_RENDEZVOUS) /** Externally forced VMCPU actions. Used to quit the idle/wait loop. */ -#define VMCPU_FF_EXTERNAL_HALTED_MASK (VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_INTERRUPT_PIC | VMCPU_FF_REQUEST | VMCPU_FF_TIMER) +#define VMCPU_FF_EXTERNAL_HALTED_MASK ( VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_INTERRUPT_PIC | VMCPU_FF_REQUEST \ + | VMCPU_FF_TIMER) /** High priority VM pre-execution actions. */ #define VM_FF_HIGH_PRIORITY_PRE_MASK ( VM_FF_CHECK_VM_STATE | VM_FF_DBGF | VM_FF_TM_VIRTUAL_SYNC \ - | VM_FF_DEBUG_SUSPEND | VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY | VM_FF_EMT_RENDEZVOUS) + | VM_FF_DEBUG_SUSPEND | VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY \ + | VM_FF_EMT_RENDEZVOUS) /** High priority VMCPU pre-execution actions. */ -#define VMCPU_FF_HIGH_PRIORITY_PRE_MASK ( VMCPU_FF_TIMER | VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_INTERRUPT_PIC | VMCPU_FF_PGM_SYNC_CR3 \ - | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL | VMCPU_FF_SELM_SYNC_TSS | VMCPU_FF_TRPM_SYNC_IDT \ - | VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT | VMCPU_FF_INHIBIT_INTERRUPTS) +#define VMCPU_FF_HIGH_PRIORITY_PRE_MASK ( VMCPU_FF_TIMER | VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_INTERRUPT_PIC \ + | VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \ + | VMCPU_FF_INHIBIT_INTERRUPTS \ + | VM_WHEN_RAW_MODE( VMCPU_FF_SELM_SYNC_TSS | VMCPU_FF_TRPM_SYNC_IDT \ + | VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT, 0 ) ) /** High priority VM pre raw-mode execution mask. */ #define VM_FF_HIGH_PRIORITY_PRE_RAW_MASK (VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY) /** High priority VMCPU pre raw-mode execution mask. */ -#define VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK ( VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL | VMCPU_FF_SELM_SYNC_TSS | VMCPU_FF_TRPM_SYNC_IDT \ - | VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT | VMCPU_FF_INHIBIT_INTERRUPTS) +#define VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK ( VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \ + | VMCPU_FF_INHIBIT_INTERRUPTS \ + | VM_WHEN_RAW_MODE( VMCPU_FF_SELM_SYNC_TSS | VMCPU_FF_TRPM_SYNC_IDT \ + | VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT, 0) ) /** High priority post-execution actions. */ #define VM_FF_HIGH_PRIORITY_POST_MASK (VM_FF_PGM_NO_MEMORY) /** High priority post-execution actions. */ -#define VMCPU_FF_HIGH_PRIORITY_POST_MASK ( VMCPU_FF_PDM_CRITSECT | VMCPU_FF_CSAM_PENDING_ACTION \ +#define VMCPU_FF_HIGH_PRIORITY_POST_MASK ( VMCPU_FF_PDM_CRITSECT | VM_WHEN_RAW_MODE(VMCPU_FF_CSAM_PENDING_ACTION, 0) \ | VMCPU_FF_HM_UPDATE_CR3 | VMCPU_FF_HM_UPDATE_PAE_PDPES) @@ -422,8 +442,9 @@ | VM_FF_PGM_NO_MEMORY | VM_FF_EMT_RENDEZVOUS) /** Normal priority VMCPU post-execution actions. */ -#define VMCPU_FF_NORMAL_PRIORITY_POST_MASK (VMCPU_FF_CSAM_SCAN_PAGE) +#define VMCPU_FF_NORMAL_PRIORITY_POST_MASK VM_WHEN_RAW_MODE(VMCPU_FF_CSAM_SCAN_PAGE, 0) /** Normal priority VM actions. */ -#define VM_FF_NORMAL_PRIORITY_MASK (VM_FF_REQUEST | VM_FF_PDM_QUEUES | VM_FF_PDM_DMA | VM_FF_REM_HANDLER_NOTIFY | VM_FF_EMT_RENDEZVOUS) +#define VM_FF_NORMAL_PRIORITY_MASK ( VM_FF_REQUEST | VM_FF_PDM_QUEUES | VM_FF_PDM_DMA | VM_FF_REM_HANDLER_NOTIFY \ + | VM_FF_EMT_RENDEZVOUS) /** Normal priority VMCPU actions. */ #define VMCPU_FF_NORMAL_PRIORITY_MASK (VMCPU_FF_REQUEST) @@ -433,7 +454,8 @@ /** VM Flags that cause the HM loops to go back to ring-3. */ -#define VM_FF_HM_TO_R3_MASK (VM_FF_TM_VIRTUAL_SYNC | VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY | VM_FF_PDM_QUEUES | VM_FF_EMT_RENDEZVOUS) +#define VM_FF_HM_TO_R3_MASK ( VM_FF_TM_VIRTUAL_SYNC | VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY \ + | VM_FF_PDM_QUEUES | VM_FF_EMT_RENDEZVOUS) /** VMCPU Flags that cause the HM loops to go back to ring-3. */ -#define VMCPU_FF_HM_TO_R3_MASK (VMCPU_FF_TO_R3 | VMCPU_FF_TIMER | VMCPU_FF_PDM_CRITSECT) +#define VMCPU_FF_HM_TO_R3_MASK (VMCPU_FF_TO_R3 | VMCPU_FF_TIMER | VMCPU_FF_PDM_CRITSECT) /** All the forced VM flags. */ @@ -447,6 +469,7 @@ /** All the forced VMCPU flags except those related to raw-mode and hardware * assisted execution. */ -#define VMCPU_FF_ALL_REM_MASK (~(VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK | VMCPU_FF_CSAM_PENDING_ACTION | VMCPU_FF_PDM_CRITSECT | VMCPU_FF_TLB_FLUSH | VMCPU_FF_TLB_SHOOTDOWN)) - +#define VMCPU_FF_ALL_REM_MASK (~( VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK | VMCPU_FF_PDM_CRITSECT \ + | VMCPU_FF_TLB_FLUSH | VMCPU_FF_TLB_SHOOTDOWN \ + | VM_WHEN_RAW_MODE(VMCPU_FF_CSAM_PENDING_ACTION, 0) )) /** @} */ Index: /trunk/src/VBox/VMM/VMMAll/EMAll.cpp =================================================================== --- /trunk/src/VBox/VMM/VMMAll/EMAll.cpp (revision 45532) +++ /trunk/src/VBox/VMM/VMMAll/EMAll.cpp (revision 45533) @@ -1537,6 +1537,8 @@ } # endif +# ifdef VBOX_WITH_RAW_MODE if ((val ^ oldval) & X86_CR4_VME) VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_TSS); +# endif rc2 = PGMChangeMode(pVCpu, CPUMGetGuestCR0(pVCpu), CPUMGetGuestCR4(pVCpu), CPUMGetGuestEFER(pVCpu)); Index: /trunk/src/VBox/VMM/VMMAll/IEMAllCImpl.cpp.h =================================================================== --- /trunk/src/VBox/VMM/VMMAll/IEMAllCImpl.cpp.h (revision 45532) +++ /trunk/src/VBox/VMM/VMMAll/IEMAllCImpl.cpp.h (revision 45533) @@ -3416,5 +3416,7 @@ Log(("iemCImpl_load_CrX: VME %d -> %d => Setting VMCPU_FF_SELM_SYNC_TSS\n", RT_BOOL(uOldCrX & X86_CR4_VME), RT_BOOL(uNewCrX & X86_CR4_VME) )); +#ifdef VBOX_WITH_RAW_MODE VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_TSS); +#endif } Index: /trunk/src/VBox/VMM/VMMR3/DBGF.cpp =================================================================== --- /trunk/src/VBox/VMM/VMMR3/DBGF.cpp (revision 45532) +++ /trunk/src/VBox/VMM/VMMR3/DBGF.cpp (revision 45533) @@ -364,6 +364,8 @@ if (pVM->dbgf.s.enmVMMCmd != DBGFCMD_NO_COMMAND) { +#ifdef VBOX_WITH_RAW_MODE /** @todo stupid GDT/LDT sync hack. go away! */ SELMR3UpdateFromCPUM(pVM, pVCpu); +#endif /* @@ -671,6 +673,8 @@ LogFlow(("dbgfR3VMMWait:\n")); +#ifdef VBOX_WITH_RAW_MODE /** @todo stupid GDT/LDT sync hack. go away! */ SELMR3UpdateFromCPUM(pVM, pVCpu); +#endif int rcRet = VINF_SUCCESS; Index: /trunk/src/VBox/VMM/VMMR3/EM.cpp =================================================================== --- /trunk/src/VBox/VMM/VMMR3/EM.cpp (revision 45532) +++ /trunk/src/VBox/VMM/VMMR3/EM.cpp (revision 45533) @@ -1147,7 +1147,9 @@ TMTimerPollVoid(pVM, pVCpu); #endif - AssertCompile((VMCPU_FF_ALL_REM_MASK & ~(VMCPU_FF_CSAM_PENDING_ACTION | VMCPU_FF_CSAM_SCAN_PAGE)) & VMCPU_FF_TIMER); + AssertCompile(VMCPU_FF_ALL_REM_MASK & VMCPU_FF_TIMER); if ( VM_FF_ISPENDING(pVM, VM_FF_ALL_REM_MASK) - || VMCPU_FF_ISPENDING(pVCpu, VMCPU_FF_ALL_REM_MASK & ~(VMCPU_FF_CSAM_PENDING_ACTION | VMCPU_FF_CSAM_SCAN_PAGE))) + || VMCPU_FF_ISPENDING(pVCpu, + VMCPU_FF_ALL_REM_MASK + & VM_WHEN_RAW_MODE(~(VMCPU_FF_CSAM_PENDING_ACTION | VMCPU_FF_CSAM_SCAN_PAGE), UINT32_MAX)) ) { l_REMDoForcedActions: @@ -1531,5 +1533,5 @@ */ if ( VM_FF_ISPENDING(pVM, VM_FF_NORMAL_PRIORITY_POST_MASK) - || VMCPU_FF_ISPENDING(pVCpu, VMCPU_FF_NORMAL_PRIORITY_POST_MASK)) + || (VMCPU_FF_NORMAL_PRIORITY_POST_MASK && VMCPU_FF_ISPENDING(pVCpu, VMCPU_FF_NORMAL_PRIORITY_POST_MASK)) ) { /* @@ -1595,4 +1597,5 @@ } +#ifdef VBOX_WITH_RAW_MODE /* * CSAM page scanning. @@ -1606,9 +1609,8 @@ Log(("Forced action VMCPU_FF_CSAM_SCAN_PAGE\n")); -#ifdef VBOX_WITH_RAW_MODE CSAMR3CheckCodeEx(pVM, CPUMCTX2CORE(pCtx), pCtx->eip); VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_CSAM_SCAN_PAGE); -#endif - } + } +#endif /* @@ -1625,5 +1627,5 @@ /* check that we got them all */ AssertCompile(VM_FF_NORMAL_PRIORITY_POST_MASK == (VM_FF_CHECK_VM_STATE | VM_FF_DBGF | VM_FF_RESET | VM_FF_PGM_NO_MEMORY | VM_FF_EMT_RENDEZVOUS)); - AssertCompile(VMCPU_FF_NORMAL_PRIORITY_POST_MASK == VMCPU_FF_CSAM_SCAN_PAGE); + AssertCompile(VMCPU_FF_NORMAL_PRIORITY_POST_MASK == VM_WHEN_RAW_MODE(VMCPU_FF_CSAM_SCAN_PAGE, 0)); } @@ -1923,5 +1925,5 @@ /* check that we got them all */ AssertCompile(VM_FF_HIGH_PRIORITY_PRE_MASK == (VM_FF_TM_VIRTUAL_SYNC | VM_FF_DBGF | VM_FF_CHECK_VM_STATE | VM_FF_DEBUG_SUSPEND | VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY | VM_FF_EMT_RENDEZVOUS)); - AssertCompile(VMCPU_FF_HIGH_PRIORITY_PRE_MASK == (VMCPU_FF_TIMER | VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_INTERRUPT_PIC | VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL | VMCPU_FF_SELM_SYNC_TSS | VMCPU_FF_TRPM_SYNC_IDT | VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT | VMCPU_FF_INHIBIT_INTERRUPTS)); + AssertCompile(VMCPU_FF_HIGH_PRIORITY_PRE_MASK == (VMCPU_FF_TIMER | VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_INTERRUPT_PIC | VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL | VMCPU_FF_INHIBIT_INTERRUPTS | VM_WHEN_RAW_MODE(VMCPU_FF_SELM_SYNC_TSS | VMCPU_FF_TRPM_SYNC_IDT | VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT, 0))); } Index: /trunk/src/VBox/VMM/VMMR3/EMHM.cpp =================================================================== --- /trunk/src/VBox/VMM/VMMR3/EMHM.cpp (revision 45532) +++ /trunk/src/VBox/VMM/VMMR3/EMHM.cpp (revision 45533) @@ -403,5 +403,7 @@ return rc; +#ifdef VBOX_WITH_RAW_MODE Assert(!VMCPU_FF_ISPENDING(pVCpu, VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT)); +#endif /* Prefetch pages for EIP and ESP. */ @@ -422,5 +424,7 @@ } /** @todo maybe prefetch the supervisor stack page as well */ +#ifdef VBOX_WITH_RAW_MODE Assert(!VMCPU_FF_ISPENDING(pVCpu, VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT)); +#endif } @@ -494,5 +498,9 @@ * Process high priority pre-execution raw-mode FFs. */ +#ifdef VBOX_WITH_RAW_MODE + /** @todo change this FF hack into an assertion, they simply SHALL NOT be set in + * HM mode. */ VMCPU_FF_CLEAR(pVCpu, (VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT | VMCPU_FF_TRPM_SYNC_IDT | VMCPU_FF_SELM_SYNC_TSS)); /* not relevant in HM mode; shouldn't be set really. */ +#endif if ( VM_FF_ISPENDING(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK) || VMCPU_FF_ISPENDING(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK)) Index: /trunk/src/VBox/VMM/VMMR3/HM.cpp =================================================================== --- /trunk/src/VBox/VMM/VMMR3/HM.cpp (revision 45532) +++ /trunk/src/VBox/VMM/VMMR3/HM.cpp (revision 45533) @@ -728,9 +728,9 @@ PATMR3AllowPatching(pVM->pUVM, false); CSAMDisableScanning(pVM); -#endif /* Turn off IDT/LDT/GDT and TSS monitoring and sycing. */ SELMR3DisableMonitoring(pVM); TRPMR3DisableMonitoring(pVM); +#endif /* Disable the switcher code (safety precaution). */ Index: /trunk/src/VBox/VMM/VMMR3/SELM.cpp =================================================================== --- /trunk/src/VBox/VMM/VMMR3/SELM.cpp (revision 45532) +++ /trunk/src/VBox/VMM/VMMR3/SELM.cpp (revision 45533) @@ -237,4 +237,5 @@ STAM_REL_REG(pVM, &pVM->selm.s.StatLoadHidSelGstNoGood, STAMTYPE_COUNTER, "/SELM/LoadHidSel/NoGoodGuest", STAMUNIT_OCCURENCES, "SELMLoadHiddenSelectorReg: No good guest table entry."); +#ifdef VBOX_WITH_RAW_MODE /* * Default action when entering raw mode for the first time @@ -244,4 +245,5 @@ VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_GDT); VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_LDT); +#endif /* @@ -267,4 +269,5 @@ VMMR3DECL(int) SELMR3InitFinalize(PVM pVM) { +#ifdef VBOX_WITH_RAW_MODE /** @cfgm{/DoubleFault,bool,false} * Enables catching of double faults in the raw-mode context VMM code. This can @@ -299,4 +302,5 @@ AssertRC(rc); } +#endif /* VBOX_WITH_RAW_MODE */ return VINF_SUCCESS; } @@ -596,4 +600,5 @@ pVM->selm.s.fSyncTSSRing0Stack = false; +#ifdef VBOX_WITH_RAW_MODE /* * Default action when entering raw mode for the first time @@ -603,6 +608,9 @@ VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_GDT); VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_LDT); -} - +#endif +} + + +#ifdef VBOX_WITH_RAW_MODE /** * Disable GDT/LDT/TSS monitoring and syncing @@ -618,8 +626,8 @@ if (pVM->selm.s.GuestGdtr.pGdt != RTRCPTR_MAX && pVM->selm.s.fGDTRangeRegistered) { -#ifdef SELM_TRACK_GUEST_GDT_CHANGES +# ifdef SELM_TRACK_GUEST_GDT_CHANGES rc = PGMHandlerVirtualDeregister(pVM, pVM->selm.s.GuestGdtr.pGdt); AssertRC(rc); -#endif +# endif pVM->selm.s.GuestGdtr.pGdt = RTRCPTR_MAX; pVM->selm.s.GuestGdtr.cbGdt = 0; @@ -628,16 +636,16 @@ if (pVM->selm.s.GCPtrGuestLdt != RTRCPTR_MAX) { -#ifdef SELM_TRACK_GUEST_LDT_CHANGES +# ifdef SELM_TRACK_GUEST_LDT_CHANGES rc = PGMHandlerVirtualDeregister(pVM, pVM->selm.s.GCPtrGuestLdt); AssertRC(rc); -#endif +# endif pVM->selm.s.GCPtrGuestLdt = RTRCPTR_MAX; } if (pVM->selm.s.GCPtrGuestTss != RTRCPTR_MAX) { -#ifdef SELM_TRACK_GUEST_TSS_CHANGES +# ifdef SELM_TRACK_GUEST_TSS_CHANGES rc = PGMHandlerVirtualDeregister(pVM, pVM->selm.s.GCPtrGuestTss); AssertRC(rc); -#endif +# endif pVM->selm.s.GCPtrGuestTss = RTRCPTR_MAX; pVM->selm.s.GCSelTss = RTSEL_MAX; @@ -647,5 +655,5 @@ * Unregister shadow GDT/LDT/TSS write access handlers. */ -#ifdef SELM_TRACK_SHADOW_GDT_CHANGES +# ifdef SELM_TRACK_SHADOW_GDT_CHANGES if (pVM->selm.s.paGdtRC != NIL_RTRCPTR) { @@ -654,6 +662,6 @@ pVM->selm.s.paGdtRC = NIL_RTRCPTR; } -#endif -#ifdef SELM_TRACK_SHADOW_TSS_CHANGES +# endif +# ifdef SELM_TRACK_SHADOW_TSS_CHANGES if (pVM->selm.s.pvMonShwTssRC != RTRCPTR_MAX) { @@ -662,6 +670,6 @@ pVM->selm.s.pvMonShwTssRC = RTRCPTR_MAX; } -#endif -#ifdef SELM_TRACK_SHADOW_LDT_CHANGES +# endif +# ifdef SELM_TRACK_SHADOW_LDT_CHANGES if (pVM->selm.s.pvLdtRC != RTRCPTR_MAX) { @@ -670,5 +678,5 @@ pVM->selm.s.pvLdtRC = RTRCPTR_MAX; } -#endif +# endif PVMCPU pVCpu = &pVM->aCpus[0]; /* raw mode implies on VCPU */ @@ -679,4 +687,5 @@ pVM->selm.s.fDisableMonitoring = true; } +#endif /* VBOX_WITH_RAW_MODE */ @@ -782,4 +791,5 @@ static DECLCALLBACK(int) selmR3LoadDone(PVM pVM, PSSMHANDLE pSSM) { +#ifdef VBOX_WITH_RAW_MODE PVMCPU pVCpu = VMMGetCpu(pVM); @@ -811,4 +821,5 @@ VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_TSS); +#endif /*VBOX_WITH_RAW_MODE*/ return VINF_SUCCESS; } @@ -1413,6 +1424,4 @@ } -#endif /*VBOX_WITH_RAW_MODE*/ - /** @@ -1425,7 +1434,5 @@ VMMR3DECL(VBOXSTRICTRC) SELMR3UpdateFromCPUM(PVM pVM, PVMCPU pVCpu) { -#ifdef VBOX_WITH_RAW_MODE if (pVM->selm.s.fDisableMonitoring) -#endif { VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_SELM_SYNC_GDT); @@ -1435,5 +1442,4 @@ } -#ifdef VBOX_WITH_RAW_MODE STAM_PROFILE_START(&pVM->selm.s.StatUpdateFromCPUM, a); @@ -1479,7 +1485,7 @@ STAM_PROFILE_STOP(&pVM->selm.s.StatUpdateFromCPUM, a); return rcStrict; -#endif /* VBOX_WITH_RAW_MODE */ -} - +} + +#endif /*VBOX_WITH_RAW_MODE*/ #ifdef SELM_TRACK_GUEST_GDT_CHANGES @@ -1576,4 +1582,5 @@ #endif +#ifdef VBOX_WITH_RAW_MODE /** @@ -1593,7 +1600,5 @@ int rc; -#ifdef VBOX_WITH_RAW_MODE if (pVM->selm.s.fDisableMonitoring) -#endif { VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_SELM_SYNC_TSS); @@ -1601,5 +1606,4 @@ } -#ifdef VBOX_WITH_RAW_MODE STAM_PROFILE_START(&pVM->selm.s.StatTSSSync, a); Assert(VMCPU_FF_ISSET(pVCpu, VMCPU_FF_SELM_SYNC_TSS)); @@ -1701,5 +1705,5 @@ if (RT_SUCCESS(rc)) { -#ifdef LOG_ENABLED +# ifdef LOG_ENABLED if (LogIsEnabled()) { @@ -1718,5 +1722,5 @@ Log(("offIoBitmap=%#x\n", Tss.offIoBitmap)); } -#endif /* LOG_ENABLED */ +# endif /* LOG_ENABLED */ AssertMsg(!(Tss.ss0 & 3), ("ring-1 leak into TSS.SS0? %04X:%08X\n", Tss.ss0, Tss.esp0)); @@ -1725,5 +1729,5 @@ pVM->selm.s.fSyncTSSRing0Stack = fNoRing1Stack = false; -#ifdef VBOX_WITH_RAW_RING1 +# ifdef VBOX_WITH_RAW_RING1 /* Update our TSS structure for the guest's ring 2 stack */ if (EMIsRawRing1Enabled(pVM)) @@ -1734,5 +1738,5 @@ selmSetRing2Stack(pVM, (Tss.ss1 & ~1) | 2, Tss.esp1); } -#endif +# endif } } @@ -1771,5 +1775,5 @@ if (cbMonitoredTss != 0) { -#ifdef SELM_TRACK_GUEST_TSS_CHANGES +# ifdef SELM_TRACK_GUEST_TSS_CHANGES rc = PGMR3HandlerVirtualRegister(pVM, PGMVIRTHANDLERTYPE_WRITE, GCPtrTss, GCPtrTss + cbMonitoredTss - 1, 0, selmR3GuestTSSWriteHandler, @@ -1777,5 +1781,5 @@ if (RT_FAILURE(rc)) { -# ifdef VBOX_WITH_RAW_RING1 +# ifdef VBOX_WITH_RAW_RING1 /** @todo !HACK ALERT! * Some guest OSes (QNX) share code and the TSS on the same page; @@ -1799,10 +1803,10 @@ } } -# else +# else STAM_PROFILE_STOP(&pVM->selm.s.StatUpdateFromCPUM, a); return rc; -# endif +# endif } -#endif /* SELM_TRACK_GUEST_TSS_CHANGES */ +# endif /* SELM_TRACK_GUEST_TSS_CHANGES */ /* Update saved Guest TSS info. */ @@ -1823,8 +1827,6 @@ STAM_PROFILE_STOP(&pVM->selm.s.StatTSSSync, a); return VINF_SUCCESS; -#endif /*VBOX_WITH_RAW_MODE*/ -} - -#ifdef VBOX_WITH_RAW_MODE +} + /** Index: /trunk/src/VBox/VMM/VMMR3/TRPM.cpp =================================================================== --- /trunk/src/VBox/VMM/VMMR3/TRPM.cpp (revision 45532) +++ /trunk/src/VBox/VMM/VMMR3/TRPM.cpp (revision 45533) @@ -424,9 +424,10 @@ -/** Enable or disable tracking of Guest's IDT. */ +#ifdef VBOX_WITH_RAW_MODE +/ ** Enable or disable tracking of Guest's IDT. */ #define TRPM_TRACK_GUEST_IDT_CHANGES - /** Enable or disable tracking of Shadow IDT. */ -#define TRPM_TRACK_SHADOW_IDT_CHANGES +# define TRPM_TRACK_SHADOW_IDT_CHANGES +#endif /** TRPM saved state version. */ @@ -440,5 +441,7 @@ static DECLCALLBACK(int) trpmR3Save(PVM pVM, PSSMHANDLE pSSM); static DECLCALLBACK(int) trpmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass); +#ifdef TRPM_TRACK_GUEST_IDT_CHANGES static DECLCALLBACK(int) trpmR3GuestIDTWriteHandler(PVM pVM, RTGCPTR GCPtr, void *pvPtr, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser); +#endif @@ -571,4 +574,5 @@ STAM_REG(pVM, &pVM->trpm.s.StatTrap0dRdTsc, STAMTYPE_COUNTER, "/TRPM/RC/Traps/0d/RdTsc", STAMUNIT_OCCURENCES, "Number of RDTSC #GPs."); +#ifdef VBOX_WITH_RAW_MODE /* * Default action when entering raw mode for the first time @@ -576,4 +580,5 @@ PVMCPU pVCpu = &pVM->aCpus[0]; /* raw mode implies on VCPU */ VMCPU_FF_SET(pVCpu, VMCPU_FF_TRPM_SYNC_IDT); +#endif return 0; } @@ -773,4 +778,5 @@ TRPMR3Relocate(pVM, 0); +#ifdef VBOX_WITH_RAW_MODE /* * Default action when entering raw mode for the first time @@ -778,4 +784,5 @@ PVMCPU pVCpu = &pVM->aCpus[0]; /* raw mode implies on VCPU */ VMCPU_FF_SET(pVCpu, VMCPU_FF_TRPM_SYNC_IDT); +#endif } @@ -847,5 +854,5 @@ SSMR3PutBool(pSSM, pTrpm->fDisableMonitoring); PVMCPU pVCpu = &pVM->aCpus[0]; /* raw mode implies 1 VCPU */ - SSMR3PutUInt(pSSM, VMCPU_FF_ISSET(pVCpu, VMCPU_FF_TRPM_SYNC_IDT)); + SSMR3PutUInt(pSSM, VM_WHEN_RAW_MODE(VMCPU_FF_ISSET(pVCpu, VMCPU_FF_TRPM_SYNC_IDT), 0)); SSMR3PutMem(pSSM, &pTrpm->au32IdtPatched[0], sizeof(pTrpm->au32IdtPatched)); SSMR3PutU32(pSSM, ~0); /* separator. */ @@ -947,4 +954,5 @@ return VERR_SSM_DATA_UNIT_FORMAT_CHANGED; } +#ifdef VBOX_WITH_RAW_MODE if (fSyncIDT) { @@ -953,4 +961,5 @@ } /* else: cleared by reset call above. */ +#endif SSMR3GetMem(pSSM, &pTrpm->au32IdtPatched[0], sizeof(pTrpm->au32IdtPatched)); @@ -1000,4 +1009,5 @@ } +#ifdef VBOX_WITH_RAW_MODE /** @@ -1021,5 +1031,4 @@ } -#ifdef VBOX_WITH_RAW_MODE if (fRawRing0 && CSAMIsEnabled(pVM)) { @@ -1033,5 +1042,4 @@ CSAMR3CheckGates(pVM, 0, 256); } -#endif /* VBOX_WITH_RAW_MODE */ /* @@ -1046,5 +1054,5 @@ } -#ifdef TRPM_TRACK_GUEST_IDT_CHANGES +# ifdef TRPM_TRACK_GUEST_IDT_CHANGES /* * Check if Guest's IDTR has changed. @@ -1068,5 +1076,4 @@ 0, trpmR3GuestIDTWriteHandler, "trpmRCGuestIDTWriteHandler", 0, "Guest IDT write access handler"); -# ifdef VBOX_WITH_RAW_MODE if (rc == VERR_PGM_HANDLER_VIRTUAL_CONFLICT) { @@ -1079,5 +1086,4 @@ 0, trpmR3GuestIDTWriteHandler, "trpmRCGuestIDTWriteHandler", 0, "Guest IDT write access handler"); } -# endif /* VBOX_WITH_RAW_MODE */ AssertRCReturn(rc, rc); @@ -1087,5 +1093,5 @@ pVM->trpm.s.GuestIdtr = IDTR; } -#endif +# endif /* @@ -1125,5 +1131,5 @@ * Deregister any virtual handlers. */ -#ifdef TRPM_TRACK_GUEST_IDT_CHANGES +# ifdef TRPM_TRACK_GUEST_IDT_CHANGES if (pVM->trpm.s.GuestIdtr.pIdt != RTRCPTR_MAX) { @@ -1136,7 +1142,7 @@ } pVM->trpm.s.GuestIdtr.cbIdt = 0; -#endif - -#ifdef TRPM_TRACK_SHADOW_IDT_CHANGES +# endif + +# ifdef TRPM_TRACK_SHADOW_IDT_CHANGES if (pVM->trpm.s.pvMonShwIdtRC != RTRCPTR_MAX) { @@ -1145,5 +1151,5 @@ pVM->trpm.s.pvMonShwIdtRC = RTRCPTR_MAX; } -#endif +# endif PVMCPU pVCpu = &pVM->aCpus[0]; /* raw mode implies on VCPU */ @@ -1181,5 +1187,4 @@ } -#ifdef VBOX_WITH_RAW_MODE /** Index: /trunk/src/VBox/VMM/VMMR3/VMM.cpp =================================================================== --- /trunk/src/VBox/VMM/VMMR3/VMM.cpp (revision 45532) +++ /trunk/src/VBox/VMM/VMMR3/VMM.cpp (revision 45533) @@ -2382,12 +2382,14 @@ PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3_NON_GLOBAL); PRINT_FLAG(VMCPU_FF_,TLB_FLUSH); + PRINT_FLAG(VMCPU_FF_,INHIBIT_INTERRUPTS); + PRINT_FLAG(VMCPU_FF_,TO_R3); +#ifdef VBOX_WITH_RAW_MODE PRINT_FLAG(VMCPU_FF_,TRPM_SYNC_IDT); PRINT_FLAG(VMCPU_FF_,SELM_SYNC_TSS); PRINT_FLAG(VMCPU_FF_,SELM_SYNC_GDT); PRINT_FLAG(VMCPU_FF_,SELM_SYNC_LDT); - PRINT_FLAG(VMCPU_FF_,INHIBIT_INTERRUPTS); PRINT_FLAG(VMCPU_FF_,CSAM_SCAN_PAGE); PRINT_FLAG(VMCPU_FF_,CSAM_PENDING_ACTION); - PRINT_FLAG(VMCPU_FF_,TO_R3); +#endif if (f) pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f); Index: /trunk/src/VBox/VMM/VMMR3/VMMTests.cpp =================================================================== --- /trunk/src/VBox/VMM/VMMR3/VMMTests.cpp (revision 45532) +++ /trunk/src/VBox/VMM/VMMR3/VMMTests.cpp (revision 45533) @@ -490,4 +490,5 @@ } +#ifdef VBOX_WITH_RAW_MODE /* * These forced actions are not necessary for the test and trigger breakpoints too. @@ -495,4 +496,5 @@ VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_TRPM_SYNC_IDT); VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_SELM_SYNC_TSS); +#endif /* Enable mapping of the hypervisor into the shadow page table. */ Index: /trunk/src/VBox/VMM/include/SELMInternal.h =================================================================== --- /trunk/src/VBox/VMM/include/SELMInternal.h (revision 45532) +++ /trunk/src/VBox/VMM/include/SELMInternal.h (revision 45533) @@ -34,20 +34,22 @@ */ -/** - * Enable or disable tracking of Shadow GDT/LDT/TSS. +/** Enable or disable tracking of Shadow GDT/LDT/TSS. * @{ */ -#define SELM_TRACK_SHADOW_GDT_CHANGES -#define SELM_TRACK_SHADOW_LDT_CHANGES -#define SELM_TRACK_SHADOW_TSS_CHANGES +#if defined(VBOX_WITH_RAW_MODE) || defined(DOXYGEN_RUNNING) +# define SELM_TRACK_SHADOW_GDT_CHANGES +# define SELM_TRACK_SHADOW_LDT_CHANGES +# define SELM_TRACK_SHADOW_TSS_CHANGES +#endif /** @} */ -/** - * Enable or disable tracking of Guest GDT/LDT/TSS. +/** Enable or disable tracking of Guest GDT/LDT/TSS. * @{ */ -#define SELM_TRACK_GUEST_GDT_CHANGES -#define SELM_TRACK_GUEST_LDT_CHANGES -#define SELM_TRACK_GUEST_TSS_CHANGES +#if defined(VBOX_WITH_RAW_MODE) || defined(DOXYGEN_RUNNING) +# define SELM_TRACK_GUEST_GDT_CHANGES +# define SELM_TRACK_GUEST_LDT_CHANGES +# define SELM_TRACK_GUEST_TSS_CHANGES +#endif /** @} */ @@ -98,4 +100,5 @@ RTINT offVM; +/** @todo #ifdef VBOX_WITH_RAW_MODE */ /** Flat CS, DS, 64 bit mode CS, TSS & trap 8 TSS. */ RTSEL aHyperSel[SELM_HYPER_SEL_MAX]; Index: /trunk/src/recompiler/VBoxRecompiler.c =================================================================== --- /trunk/src/recompiler/VBoxRecompiler.c (revision 45532) +++ /trunk/src/recompiler/VBoxRecompiler.c (revision 45533) @@ -1796,6 +1796,8 @@ pCtx->cr0 = env->cr[0]; pCtx->cr3 = env->cr[3]; +#ifdef VBOX_WITH_RAW_MODE if ((env->cr[4] ^ pCtx->cr4) & X86_CR4_VME) VMCPU_FF_SET(env->pVCpu, VMCPU_FF_SELM_SYNC_TSS); +#endif pCtx->cr4 = env->cr[4]; @@ -1917,6 +1919,8 @@ pCtx->cr0 = env->cr[0]; pCtx->cr3 = env->cr[3]; +#ifdef VBOX_WITH_RAW_MODE if ((env->cr[4] ^ pCtx->cr4) & X86_CR4_VME) VMCPU_FF_SET(env->pVCpu, VMCPU_FF_SELM_SYNC_TSS); +#endif pCtx->cr4 = env->cr[4]; @@ -1957,6 +1961,8 @@ pCtx->cr0 = env->cr[0]; pCtx->cr3 = env->cr[3]; +#ifdef VBOX_WITH_RAW_MODE if ((env->cr[4] ^ pCtx->cr4) & X86_CR4_VME) VMCPU_FF_SET(env->pVCpu, VMCPU_FF_SELM_SYNC_TSS); +#endif pCtx->cr4 = env->cr[4]; #ifdef TARGET_X86_64 @@ -2644,6 +2650,8 @@ pCtx->cr2 = pVM->rem.s.Env.cr[2]; pCtx->cr3 = pVM->rem.s.Env.cr[3]; +#ifdef VBOX_WITH_RAW_MODE if ((pVM->rem.s.Env.cr[4] ^ pCtx->cr4) & X86_CR4_VME) VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_TSS); +#endif pCtx->cr4 = pVM->rem.s.Env.cr[4]; @@ -2656,5 +2664,7 @@ pCtx->gdtr.pGdt = pVM->rem.s.Env.gdt.base; STAM_COUNTER_INC(&gStatREMGDTChange); +#ifdef VBOX_WITH_RAW_MODE VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_GDT); +#endif } @@ -2664,5 +2674,7 @@ pCtx->idtr.pIdt = pVM->rem.s.Env.idt.base; STAM_COUNTER_INC(&gStatREMIDTChange); +#ifdef VBOX_WITH_RAW_MODE VMCPU_FF_SET(pVCpu, VMCPU_FF_TRPM_SYNC_IDT); +#endif } @@ -2682,5 +2694,7 @@ pCtx->ldtr.Attr.u = (pVM->rem.s.Env.ldt.flags >> 8) & 0xF0FF; STAM_COUNTER_INC(&gStatREMLDTRChange); +#ifdef VBOX_WITH_RAW_MODE VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_LDT); +#endif } @@ -2709,5 +2723,7 @@ pCtx->tr.Attr.u |= DESC_TSS_BUSY_MASK >> 8; STAM_COUNTER_INC(&gStatREMTRChange); +#ifdef VBOX_WITH_RAW_MODE VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_TSS); +#endif } @@ -2866,6 +2882,8 @@ pCtx->cr2 = pVM->rem.s.Env.cr[2]; pCtx->cr3 = pVM->rem.s.Env.cr[3]; +#ifdef VBOX_WITH_RAW_MODE if ((pVM->rem.s.Env.cr[4] ^ pCtx->cr4) & X86_CR4_VME) VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_TSS); +#endif pCtx->cr4 = pVM->rem.s.Env.cr[4]; @@ -2878,5 +2896,7 @@ pCtx->gdtr.pGdt = (RTGCPTR)pVM->rem.s.Env.gdt.base; STAM_COUNTER_INC(&gStatREMGDTChange); +#ifdef VBOX_WITH_RAW_MODE VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_GDT); +#endif } @@ -2886,5 +2906,7 @@ pCtx->idtr.pIdt = (RTGCPTR)pVM->rem.s.Env.idt.base; STAM_COUNTER_INC(&gStatREMIDTChange); +#ifdef VBOX_WITH_RAW_MODE VMCPU_FF_SET(pVCpu, VMCPU_FF_TRPM_SYNC_IDT); +#endif } @@ -2904,5 +2926,7 @@ pCtx->ldtr.Attr.u = (pVM->rem.s.Env.ldt.flags >> 8) & 0xF0FF; STAM_COUNTER_INC(&gStatREMLDTRChange); +#ifdef VBOX_WITH_RAW_MODE VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_LDT); +#endif } @@ -2931,5 +2955,7 @@ pCtx->tr.Attr.u |= DESC_TSS_BUSY_MASK >> 8; STAM_COUNTER_INC(&gStatREMTRChange); +#ifdef VBOX_WITH_RAW_MODE VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_TSS); +#endif }