VirtualBox

Changeset 45533 in vbox


Ignore:
Timestamp:
Apr 13, 2013 4:13:22 PM (11 years ago)
Author:
vboxsync
Message:

#ifdef the raw-mode force flags to find more code to #ifdef out.

Location:
trunk
Files:
15 edited

Legend:

Unmodified
Added
Removed

  • trunk/include/VBox/vmm/selm.h

    r45276 r45533  
    9595VMMR3DECL(int)          SELMR3Term(PVM pVM);
    9696VMMR3DECL(void)         SELMR3Reset(PVM pVM);
     97# ifdef VBOX_WITH_RAW_MODE
     98VMMR3DECL(void)         SELMR3DisableMonitoring(PVM pVM);
    9799VMMR3DECL(VBOXSTRICTRC) SELMR3UpdateFromCPUM(PVM pVM, PVMCPU pVCpu);
    98100VMMR3DECL(int)          SELMR3SyncTSS(PVM pVM, PVMCPU pVCpu);
     101# endif
    99102VMMR3DECL(int)          SELMR3GetSelectorInfo(PVM pVM, PVMCPU pVCpu, RTSEL Sel, PDBGFSELINFO pSelInfo);
    100103VMMR3DECL(int)          SELMR3GetShadowSelectorInfo(PVM pVM, RTSEL Sel, PDBGFSELINFO pSelInfo);
    101 VMMR3DECL(void)         SELMR3DisableMonitoring(PVM pVM);
    102104VMMR3DECL(void)         SELMR3DumpDescriptor(X86DESC  Desc, RTSEL Sel, const char *pszMsg);
    103105VMMR3DECL(void)         SELMR3DumpHyperGDT(PVM pVM);
    … …  
    107109VMMR3DECL(bool)         SELMR3CheckTSS(PVM pVM);
    108110VMMR3DECL(int)          SELMR3DebugCheck(PVM pVM);
    109 #ifdef VBOX_WITH_SAFE_STR
     111# ifdef VBOX_WITH_SAFE_STR
    110112VMMR3DECL(bool)         SELMR3CheckShadowTR(PVM pVM);
    111 #endif
     113# endif
    112114
    113115/** @def SELMR3_DEBUG_CHECK

  • trunk/include/VBox/vmm/trpm.h

    r45531 r45533  
    101101VMMR3DECL(void)     TRPMR3Reset(PVM pVM);
    102102VMMR3DECL(int)      TRPMR3Term(PVM pVM);
    103 VMMR3DECL(void)     TRPMR3DisableMonitoring(PVM pVM);
    104 VMMR3DECL(int)      TRPMR3SyncIDT(PVM pVM, PVMCPU pVCpu);
    105103VMMR3DECL(int)      TRPMR3InjectEvent(PVM pVM, PVMCPU pVCpu, TRPMEVENT enmEvent);
    106104# ifdef VBOX_WITH_RAW_MODE
     105VMMR3DECL(void)     TRPMR3DisableMonitoring(PVM pVM);
    107106VMMR3_INT_DECL(int) TRPMR3GetImportRC(PVM pVM, const char *pszSymbol, PRTRCPTR pRCPtrValue);
     107VMMR3DECL(int)      TRPMR3SyncIDT(PVM pVM, PVMCPU pVCpu);
    108108VMMR3DECL(bool)     TRPMR3IsGateHandler(PVM pVM, RTRCPTR GCPtr);
    109109VMMR3DECL(uint32_t) TRPMR3QueryGateByHandler(PVM pVM, RTRCPTR GCPtr);

  • trunk/include/VBox/vmm/vm.h

    r45301 r45533  
    271271/** The name of the Ring 0 Context VMM Core module. */
    272272#define VMMR0_MAIN_MODULE_NAME          "VMMR0.r0"
     273
     274/**
     275 * Wrapper macro for avoiding too much \#ifdef VBOX_WITH_RAW_MODE.
     276 */
     277#ifdef VBOX_WITH_RAW_MODE
     278# define VM_WHEN_RAW_MODE(a_WithExpr, a_WithoutExpr)    a_WithExpr
     279#else
     280# define VM_WHEN_RAW_MODE(a_WithExpr, a_WithoutExpr)    a_WithoutExpr
     281#endif
     282
    273283
    274284/** VM Forced Action Flags.
    … …  
    370380/** The bit number for VMCPU_FF_TLB_FLUSH. */
    371381#define VMCPU_FF_TLB_FLUSH_BIT              19
     382#ifdef VBOX_WITH_RAW_MODE
    372383/** Check the interrupt and trap gates */
    373 #define VMCPU_FF_TRPM_SYNC_IDT              RT_BIT_32(20)
     384# define VMCPU_FF_TRPM_SYNC_IDT             RT_BIT_32(20)
    374385/** Check Guest's TSS ring 0 stack */
    375 #define VMCPU_FF_SELM_SYNC_TSS              RT_BIT_32(21)
     386# define VMCPU_FF_SELM_SYNC_TSS             RT_BIT_32(21)
    376387/** Check Guest's GDT table */
    377 #define VMCPU_FF_SELM_SYNC_GDT              RT_BIT_32(22)
     388# define VMCPU_FF_SELM_SYNC_GDT             RT_BIT_32(22)
    378389/** Check Guest's LDT table */
    379 #define VMCPU_FF_SELM_SYNC_LDT              RT_BIT_32(23)
     390# define VMCPU_FF_SELM_SYNC_LDT             RT_BIT_32(23)
     391#endif /* VBOX_WITH_RAW_MODE */
    380392/** Inhibit interrupts pending. See EMGetInhibitInterruptsPC(). */
    381393#define VMCPU_FF_INHIBIT_INTERRUPTS         RT_BIT_32(24)
     394#ifdef VBOX_WITH_RAW_MODE
    382395/** CSAM needs to scan the page that's being executed */
    383 #define VMCPU_FF_CSAM_SCAN_PAGE             RT_BIT_32(26)
     396# define VMCPU_FF_CSAM_SCAN_PAGE            RT_BIT_32(26)
    384397/** CSAM needs to do some homework. */
    385 #define VMCPU_FF_CSAM_PENDING_ACTION        RT_BIT_32(27)
     398# define VMCPU_FF_CSAM_PENDING_ACTION       RT_BIT_32(27)
     399#endif /* VBOX_WITH_RAW_MODE */
    386400/** Force return to Ring-3. */
    387401#define VMCPU_FF_TO_R3                      RT_BIT_32(28)
    … …  
    396410                                                 | VM_FF_PDM_QUEUES | VM_FF_PDM_DMA | VM_FF_EMT_RENDEZVOUS)
    397411/** Externally forced VMCPU actions. Used to quit the idle/wait loop. */
    398 #define VMCPU_FF_EXTERNAL_HALTED_MASK           (VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_INTERRUPT_PIC | VMCPU_FF_REQUEST | VMCPU_FF_TIMER)
     412#define VMCPU_FF_EXTERNAL_HALTED_MASK           (  VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_INTERRUPT_PIC | VMCPU_FF_REQUEST \
     413                                                 | VMCPU_FF_TIMER)
    399414
    400415/** High priority VM pre-execution actions. */
    401416#define VM_FF_HIGH_PRIORITY_PRE_MASK            (  VM_FF_CHECK_VM_STATE | VM_FF_DBGF | VM_FF_TM_VIRTUAL_SYNC \
    402                                                  | VM_FF_DEBUG_SUSPEND | VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY | VM_FF_EMT_RENDEZVOUS)
     417                                                 | VM_FF_DEBUG_SUSPEND | VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY \
     418                                                 | VM_FF_EMT_RENDEZVOUS)
    403419/** High priority VMCPU pre-execution actions. */
    404 #define VMCPU_FF_HIGH_PRIORITY_PRE_MASK         (  VMCPU_FF_TIMER | VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_INTERRUPT_PIC | VMCPU_FF_PGM_SYNC_CR3 \
    405                                                  | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL | VMCPU_FF_SELM_SYNC_TSS | VMCPU_FF_TRPM_SYNC_IDT \
    406                                                  | VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT | VMCPU_FF_INHIBIT_INTERRUPTS)
     420#define VMCPU_FF_HIGH_PRIORITY_PRE_MASK         (  VMCPU_FF_TIMER | VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_INTERRUPT_PIC \
     421                                                 | VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \
     422                                                 | VMCPU_FF_INHIBIT_INTERRUPTS \
     423                                                 | VM_WHEN_RAW_MODE(  VMCPU_FF_SELM_SYNC_TSS | VMCPU_FF_TRPM_SYNC_IDT \
     424                                                                    | VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT, 0 ) )
    407425
    408426/** High priority VM pre raw-mode execution mask. */
    409427#define VM_FF_HIGH_PRIORITY_PRE_RAW_MASK        (VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY)
    410428/** High priority VMCPU pre raw-mode execution mask. */
    411 #define VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK     (  VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL | VMCPU_FF_SELM_SYNC_TSS | VMCPU_FF_TRPM_SYNC_IDT \
    412                                                  | VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT | VMCPU_FF_INHIBIT_INTERRUPTS)
     429#define VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK     (  VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \
     430                                                 | VMCPU_FF_INHIBIT_INTERRUPTS \
     431                                                 | VM_WHEN_RAW_MODE( VMCPU_FF_SELM_SYNC_TSS | VMCPU_FF_TRPM_SYNC_IDT \
     432                                                                    | VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT, 0) )
    413433
    414434/** High priority post-execution actions. */
    415435#define VM_FF_HIGH_PRIORITY_POST_MASK           (VM_FF_PGM_NO_MEMORY)
    416436/** High priority post-execution actions. */
    417 #define VMCPU_FF_HIGH_PRIORITY_POST_MASK        (  VMCPU_FF_PDM_CRITSECT | VMCPU_FF_CSAM_PENDING_ACTION \
     437#define VMCPU_FF_HIGH_PRIORITY_POST_MASK        (  VMCPU_FF_PDM_CRITSECT | VM_WHEN_RAW_MODE(VMCPU_FF_CSAM_PENDING_ACTION, 0) \
    418438                                                 | VMCPU_FF_HM_UPDATE_CR3 | VMCPU_FF_HM_UPDATE_PAE_PDPES)
    419439
    … …  
    422442                                                 | VM_FF_PGM_NO_MEMORY | VM_FF_EMT_RENDEZVOUS)
    423443/** Normal priority VMCPU post-execution actions. */
    424 #define VMCPU_FF_NORMAL_PRIORITY_POST_MASK      (VMCPU_FF_CSAM_SCAN_PAGE)
     444#define VMCPU_FF_NORMAL_PRIORITY_POST_MASK      VM_WHEN_RAW_MODE(VMCPU_FF_CSAM_SCAN_PAGE, 0)
    425445
    426446/** Normal priority VM actions. */
    427 #define VM_FF_NORMAL_PRIORITY_MASK              (VM_FF_REQUEST | VM_FF_PDM_QUEUES | VM_FF_PDM_DMA | VM_FF_REM_HANDLER_NOTIFY | VM_FF_EMT_RENDEZVOUS)
     447#define VM_FF_NORMAL_PRIORITY_MASK              (  VM_FF_REQUEST | VM_FF_PDM_QUEUES | VM_FF_PDM_DMA | VM_FF_REM_HANDLER_NOTIFY \
     448                                                 | VM_FF_EMT_RENDEZVOUS)
    428449/** Normal priority VMCPU actions. */
    429450#define VMCPU_FF_NORMAL_PRIORITY_MASK           (VMCPU_FF_REQUEST)
    … …  
    433454
    434455/** VM Flags that cause the HM loops to go back to ring-3. */
    435 #define VM_FF_HM_TO_R3_MASK                 (VM_FF_TM_VIRTUAL_SYNC | VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY | VM_FF_PDM_QUEUES | VM_FF_EMT_RENDEZVOUS)
     456#define VM_FF_HM_TO_R3_MASK                     (  VM_FF_TM_VIRTUAL_SYNC | VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY \
     457                                                 | VM_FF_PDM_QUEUES | VM_FF_EMT_RENDEZVOUS)
    436458/** VMCPU Flags that cause the HM loops to go back to ring-3. */
    437 #define VMCPU_FF_HM_TO_R3_MASK              (VMCPU_FF_TO_R3 | VMCPU_FF_TIMER | VMCPU_FF_PDM_CRITSECT)
     459#define VMCPU_FF_HM_TO_R3_MASK                  (VMCPU_FF_TO_R3 | VMCPU_FF_TIMER | VMCPU_FF_PDM_CRITSECT)
    438460
    439461/** All the forced VM flags. */
    … …  
    447469/** All the forced VMCPU flags except those related to raw-mode and hardware
    448470 * assisted execution. */
    449 #define VMCPU_FF_ALL_REM_MASK                   (~(VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK | VMCPU_FF_CSAM_PENDING_ACTION | VMCPU_FF_PDM_CRITSECT | VMCPU_FF_TLB_FLUSH | VMCPU_FF_TLB_SHOOTDOWN))
    450 
     471#define VMCPU_FF_ALL_REM_MASK                   (~(  VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK | VMCPU_FF_PDM_CRITSECT \
     472                                                   | VMCPU_FF_TLB_FLUSH | VMCPU_FF_TLB_SHOOTDOWN \
     473                                                   | VM_WHEN_RAW_MODE(VMCPU_FF_CSAM_PENDING_ACTION, 0) ))
    451474/** @} */
    452475

  • trunk/src/VBox/VMM/VMMAll/EMAll.cpp

    r45528 r45533  
    15371537        }
    15381538# endif
     1539# ifdef VBOX_WITH_RAW_MODE
    15391540        if ((val ^ oldval) & X86_CR4_VME)
    15401541            VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_TSS);
     1542# endif
    15411543
    15421544        rc2 = PGMChangeMode(pVCpu, CPUMGetGuestCR0(pVCpu), CPUMGetGuestCR4(pVCpu), CPUMGetGuestEFER(pVCpu));

  • trunk/src/VBox/VMM/VMMAll/IEMAllCImpl.cpp.h

    r45305 r45533  
    34163416                    Log(("iemCImpl_load_CrX: VME %d -> %d => Setting VMCPU_FF_SELM_SYNC_TSS\n",
    34173417                         RT_BOOL(uOldCrX & X86_CR4_VME), RT_BOOL(uNewCrX & X86_CR4_VME) ));
     3418#ifdef VBOX_WITH_RAW_MODE
    34183419                    VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_TSS);
     3420#endif
    34193421                }
    34203422

  • trunk/src/VBox/VMM/VMMR3/DBGF.cpp

    r45006 r45533  
    364364        if (pVM->dbgf.s.enmVMMCmd != DBGFCMD_NO_COMMAND)
    365365        {
     366#ifdef VBOX_WITH_RAW_MODE
    366367            /** @todo stupid GDT/LDT sync hack. go away! */
    367368            SELMR3UpdateFromCPUM(pVM, pVCpu);
     369#endif
    368370
    369371            /*
    … …  
    671673    LogFlow(("dbgfR3VMMWait:\n"));
    672674
     675#ifdef VBOX_WITH_RAW_MODE
    673676    /** @todo stupid GDT/LDT sync hack. go away! */
    674677    SELMR3UpdateFromCPUM(pVM, pVCpu);
     678#endif
    675679    int rcRet = VINF_SUCCESS;
    676680

  • trunk/src/VBox/VMM/VMMR3/EM.cpp

    r45528 r45533  
    11471147        TMTimerPollVoid(pVM, pVCpu);
    11481148#endif
    1149         AssertCompile((VMCPU_FF_ALL_REM_MASK & ~(VMCPU_FF_CSAM_PENDING_ACTION | VMCPU_FF_CSAM_SCAN_PAGE)) & VMCPU_FF_TIMER);
     1149        AssertCompile(VMCPU_FF_ALL_REM_MASK & VMCPU_FF_TIMER);
    11501150        if (    VM_FF_ISPENDING(pVM, VM_FF_ALL_REM_MASK)
    1151             ||  VMCPU_FF_ISPENDING(pVCpu, VMCPU_FF_ALL_REM_MASK & ~(VMCPU_FF_CSAM_PENDING_ACTION | VMCPU_FF_CSAM_SCAN_PAGE)))
     1151            ||  VMCPU_FF_ISPENDING(pVCpu,
     1152                                     VMCPU_FF_ALL_REM_MASK
     1153                                   & VM_WHEN_RAW_MODE(~(VMCPU_FF_CSAM_PENDING_ACTION | VMCPU_FF_CSAM_SCAN_PAGE), UINT32_MAX)) )
    11521154        {
    11531155l_REMDoForcedActions:
    … …  
    15311533     */
    15321534    if (    VM_FF_ISPENDING(pVM, VM_FF_NORMAL_PRIORITY_POST_MASK)
    1533         ||  VMCPU_FF_ISPENDING(pVCpu, VMCPU_FF_NORMAL_PRIORITY_POST_MASK))
     1535        ||  (VMCPU_FF_NORMAL_PRIORITY_POST_MASK && VMCPU_FF_ISPENDING(pVCpu, VMCPU_FF_NORMAL_PRIORITY_POST_MASK)) )
    15341536    {
    15351537        /*
    … …  
    15951597        }
    15961598
     1599#ifdef VBOX_WITH_RAW_MODE
    15971600        /*
    15981601         * CSAM page scanning.
    … …  
    16061609            Log(("Forced action VMCPU_FF_CSAM_SCAN_PAGE\n"));
    16071610
    1608 #ifdef VBOX_WITH_RAW_MODE
    16091611            CSAMR3CheckCodeEx(pVM, CPUMCTX2CORE(pCtx), pCtx->eip);
    16101612            VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_CSAM_SCAN_PAGE);
    1611 #endif
    1612         }
     1613        }
     1614#endif
    16131615
    16141616        /*
    … …  
    16251627        /* check that we got them all  */
    16261628        AssertCompile(VM_FF_NORMAL_PRIORITY_POST_MASK == (VM_FF_CHECK_VM_STATE | VM_FF_DBGF | VM_FF_RESET | VM_FF_PGM_NO_MEMORY | VM_FF_EMT_RENDEZVOUS));
    1627         AssertCompile(VMCPU_FF_NORMAL_PRIORITY_POST_MASK == VMCPU_FF_CSAM_SCAN_PAGE);
     1629        AssertCompile(VMCPU_FF_NORMAL_PRIORITY_POST_MASK == VM_WHEN_RAW_MODE(VMCPU_FF_CSAM_SCAN_PAGE, 0));
    16281630    }
    16291631
    … …  
    19231925        /* check that we got them all  */
    19241926        AssertCompile(VM_FF_HIGH_PRIORITY_PRE_MASK == (VM_FF_TM_VIRTUAL_SYNC | VM_FF_DBGF | VM_FF_CHECK_VM_STATE | VM_FF_DEBUG_SUSPEND | VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY | VM_FF_EMT_RENDEZVOUS));
    1925         AssertCompile(VMCPU_FF_HIGH_PRIORITY_PRE_MASK == (VMCPU_FF_TIMER | VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_INTERRUPT_PIC | VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL | VMCPU_FF_SELM_SYNC_TSS | VMCPU_FF_TRPM_SYNC_IDT | VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT | VMCPU_FF_INHIBIT_INTERRUPTS));
     1927        AssertCompile(VMCPU_FF_HIGH_PRIORITY_PRE_MASK == (VMCPU_FF_TIMER | VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_INTERRUPT_PIC | VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL | VMCPU_FF_INHIBIT_INTERRUPTS | VM_WHEN_RAW_MODE(VMCPU_FF_SELM_SYNC_TSS | VMCPU_FF_TRPM_SYNC_IDT | VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT, 0)));
    19261928    }
    19271929

  • trunk/src/VBox/VMM/VMMR3/EMHM.cpp

    r45305 r45533  
    403403            return rc;
    404404
     405#ifdef VBOX_WITH_RAW_MODE
    405406        Assert(!VMCPU_FF_ISPENDING(pVCpu, VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT));
     407#endif
    406408
    407409        /* Prefetch pages for EIP and ESP. */
    … …  
    422424        }
    423425        /** @todo maybe prefetch the supervisor stack page as well */
     426#ifdef VBOX_WITH_RAW_MODE
    424427        Assert(!VMCPU_FF_ISPENDING(pVCpu, VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT));
     428#endif
    425429    }
    426430
    … …  
    494498         * Process high priority pre-execution raw-mode FFs.
    495499         */
     500#ifdef VBOX_WITH_RAW_MODE
     501        /** @todo change this FF hack into an assertion, they simply SHALL NOT be set in
     502         *        HM mode. */
    496503        VMCPU_FF_CLEAR(pVCpu, (VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT | VMCPU_FF_TRPM_SYNC_IDT | VMCPU_FF_SELM_SYNC_TSS)); /* not relevant in HM mode; shouldn't be set really. */
     504#endif
    497505        if (    VM_FF_ISPENDING(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
    498506            ||  VMCPU_FF_ISPENDING(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))

  • trunk/src/VBox/VMM/VMMR3/HM.cpp

    r45531 r45533  
    728728    PATMR3AllowPatching(pVM->pUVM, false);
    729729    CSAMDisableScanning(pVM);
    730 #endif
    731730
    732731    /* Turn off IDT/LDT/GDT and TSS monitoring and sycing. */
    733732    SELMR3DisableMonitoring(pVM);
    734733    TRPMR3DisableMonitoring(pVM);
     734#endif
    735735
    736736    /* Disable the switcher code (safety precaution). */

  • trunk/src/VBox/VMM/VMMR3/SELM.cpp

    r45485 r45533  
    237237    STAM_REL_REG(pVM, &pVM->selm.s.StatLoadHidSelGstNoGood,        STAMTYPE_COUNTER, "/SELM/LoadHidSel/NoGoodGuest",   STAMUNIT_OCCURENCES, "SELMLoadHiddenSelectorReg: No good guest table entry.");
    238238
     239#ifdef VBOX_WITH_RAW_MODE
    239240    /*
    240241     * Default action when entering raw mode for the first time
    … …  
    244245    VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_GDT);
    245246    VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_LDT);
     247#endif
    246248
    247249    /*
    … …  
    267269VMMR3DECL(int) SELMR3InitFinalize(PVM pVM)
    268270{
     271#ifdef VBOX_WITH_RAW_MODE
    269272    /** @cfgm{/DoubleFault,bool,false}
    270273     * Enables catching of double faults in the raw-mode context VMM code.  This can
    … …  
    299302        AssertRC(rc);
    300303    }
     304#endif /* VBOX_WITH_RAW_MODE */
    301305    return VINF_SUCCESS;
    302306}
    … …  
    596600    pVM->selm.s.fSyncTSSRing0Stack = false;
    597601
     602#ifdef VBOX_WITH_RAW_MODE
    598603    /*
    599604     * Default action when entering raw mode for the first time
    … …  
    603608    VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_GDT);
    604609    VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_LDT);
    605 }
    606 
     610#endif
     611}
     612
     613
     614#ifdef VBOX_WITH_RAW_MODE
    607615/**
    608616 * Disable GDT/LDT/TSS monitoring and syncing
    … …  
    618626    if (pVM->selm.s.GuestGdtr.pGdt != RTRCPTR_MAX && pVM->selm.s.fGDTRangeRegistered)
    619627    {
    620 #ifdef SELM_TRACK_GUEST_GDT_CHANGES
     628# ifdef SELM_TRACK_GUEST_GDT_CHANGES
    621629        rc = PGMHandlerVirtualDeregister(pVM, pVM->selm.s.GuestGdtr.pGdt);
    622630        AssertRC(rc);
    623 #endif
     631# endif
    624632        pVM->selm.s.GuestGdtr.pGdt = RTRCPTR_MAX;
    625633        pVM->selm.s.GuestGdtr.cbGdt = 0;
    … …  
    628636    if (pVM->selm.s.GCPtrGuestLdt != RTRCPTR_MAX)
    629637    {
    630 #ifdef SELM_TRACK_GUEST_LDT_CHANGES
     638# ifdef SELM_TRACK_GUEST_LDT_CHANGES
    631639        rc = PGMHandlerVirtualDeregister(pVM, pVM->selm.s.GCPtrGuestLdt);
    632640        AssertRC(rc);
    633 #endif
     641# endif
    634642        pVM->selm.s.GCPtrGuestLdt = RTRCPTR_MAX;
    635643    }
    636644    if (pVM->selm.s.GCPtrGuestTss != RTRCPTR_MAX)
    637645    {
    638 #ifdef SELM_TRACK_GUEST_TSS_CHANGES
     646# ifdef SELM_TRACK_GUEST_TSS_CHANGES
    639647        rc = PGMHandlerVirtualDeregister(pVM, pVM->selm.s.GCPtrGuestTss);
    640648        AssertRC(rc);
    641 #endif
     649# endif
    642650        pVM->selm.s.GCPtrGuestTss = RTRCPTR_MAX;
    643651        pVM->selm.s.GCSelTss      = RTSEL_MAX;
    … …  
    647655     * Unregister shadow GDT/LDT/TSS write access handlers.
    648656     */
    649 #ifdef SELM_TRACK_SHADOW_GDT_CHANGES
     657# ifdef SELM_TRACK_SHADOW_GDT_CHANGES
    650658    if (pVM->selm.s.paGdtRC != NIL_RTRCPTR)
    651659    {
    … …  
    654662        pVM->selm.s.paGdtRC = NIL_RTRCPTR;
    655663    }
    656 #endif
    657 #ifdef SELM_TRACK_SHADOW_TSS_CHANGES
     664# endif
     665# ifdef SELM_TRACK_SHADOW_TSS_CHANGES
    658666    if (pVM->selm.s.pvMonShwTssRC != RTRCPTR_MAX)
    659667    {
    … …  
    662670        pVM->selm.s.pvMonShwTssRC = RTRCPTR_MAX;
    663671    }
    664 #endif
    665 #ifdef SELM_TRACK_SHADOW_LDT_CHANGES
     672# endif
     673# ifdef SELM_TRACK_SHADOW_LDT_CHANGES
    666674    if (pVM->selm.s.pvLdtRC != RTRCPTR_MAX)
    667675    {
    … …  
    670678        pVM->selm.s.pvLdtRC = RTRCPTR_MAX;
    671679    }
    672 #endif
     680# endif
    673681
    674682    PVMCPU pVCpu = &pVM->aCpus[0];  /* raw mode implies on VCPU */
    … …  
    679687    pVM->selm.s.fDisableMonitoring = true;
    680688}
     689#endif /* VBOX_WITH_RAW_MODE */
    681690
    682691
    … …  
    782791static DECLCALLBACK(int) selmR3LoadDone(PVM pVM, PSSMHANDLE pSSM)
    783792{
     793#ifdef VBOX_WITH_RAW_MODE
    784794    PVMCPU pVCpu = VMMGetCpu(pVM);
    785795
    … …  
    811821    VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_TSS);
    812822
     823#endif /*VBOX_WITH_RAW_MODE*/
    813824    return VINF_SUCCESS;
    814825}
    … …  
    14131424}
    14141425
    1415 #endif /*VBOX_WITH_RAW_MODE*/
    1416 
    14171426
    14181427/**
    … …  
    14251434VMMR3DECL(VBOXSTRICTRC) SELMR3UpdateFromCPUM(PVM pVM, PVMCPU pVCpu)
    14261435{
    1427 #ifdef VBOX_WITH_RAW_MODE
    14281436    if (pVM->selm.s.fDisableMonitoring)
    1429 #endif
    14301437    {
    14311438        VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_SELM_SYNC_GDT);
    … …  
    14351442    }
    14361443
    1437 #ifdef VBOX_WITH_RAW_MODE
    14381444    STAM_PROFILE_START(&pVM->selm.s.StatUpdateFromCPUM, a);
    14391445
    … …  
    14791485    STAM_PROFILE_STOP(&pVM->selm.s.StatUpdateFromCPUM, a);
    14801486    return rcStrict;
    1481 #endif /* VBOX_WITH_RAW_MODE */
    1482 }
    1483 
     1487}
     1488
     1489#endif /*VBOX_WITH_RAW_MODE*/
    14841490
    14851491#ifdef SELM_TRACK_GUEST_GDT_CHANGES
    … …  
    15761582#endif
    15771583
     1584#ifdef VBOX_WITH_RAW_MODE
    15781585
    15791586/**
    … …  
    15931600    int    rc;
    15941601
    1595 #ifdef VBOX_WITH_RAW_MODE
    15961602    if (pVM->selm.s.fDisableMonitoring)
    1597 #endif
    15981603    {
    15991604        VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_SELM_SYNC_TSS);
    … …  
    16011606    }
    16021607
    1603 #ifdef VBOX_WITH_RAW_MODE
    16041608    STAM_PROFILE_START(&pVM->selm.s.StatTSSSync, a);
    16051609    Assert(VMCPU_FF_ISSET(pVCpu, VMCPU_FF_SELM_SYNC_TSS));
    … …  
    17011705        if (RT_SUCCESS(rc))
    17021706        {
    1703 #ifdef LOG_ENABLED
     1707# ifdef LOG_ENABLED
    17041708            if (LogIsEnabled())
    17051709            {
    … …  
    17181722                Log(("offIoBitmap=%#x\n", Tss.offIoBitmap));
    17191723            }
    1720 #endif /* LOG_ENABLED */
     1724# endif /* LOG_ENABLED */
    17211725            AssertMsg(!(Tss.ss0 & 3), ("ring-1 leak into TSS.SS0? %04X:%08X\n", Tss.ss0, Tss.esp0));
    17221726
    … …  
    17251729            pVM->selm.s.fSyncTSSRing0Stack = fNoRing1Stack = false;
    17261730
    1727 #ifdef VBOX_WITH_RAW_RING1
     1731# ifdef VBOX_WITH_RAW_RING1
    17281732            /* Update our TSS structure for the guest's ring 2 stack */
    17291733            if (EMIsRawRing1Enabled(pVM))
    … …  
    17341738                selmSetRing2Stack(pVM, (Tss.ss1 & ~1) | 2, Tss.esp1);
    17351739            }
    1736 #endif
     1740# endif
    17371741        }
    17381742    }
    … …  
    17711775        if (cbMonitoredTss != 0)
    17721776        {
    1773 #ifdef SELM_TRACK_GUEST_TSS_CHANGES
     1777# ifdef SELM_TRACK_GUEST_TSS_CHANGES
    17741778            rc = PGMR3HandlerVirtualRegister(pVM, PGMVIRTHANDLERTYPE_WRITE, GCPtrTss, GCPtrTss + cbMonitoredTss - 1,
    17751779                                             0, selmR3GuestTSSWriteHandler,
    … …  
    17771781            if (RT_FAILURE(rc))
    17781782            {
    1779 # ifdef VBOX_WITH_RAW_RING1
     1783#  ifdef VBOX_WITH_RAW_RING1
    17801784                /** @todo !HACK ALERT!
    17811785                 * Some guest OSes (QNX) share code and the TSS on the same page;
    … …  
    17991803                    }
    18001804                }
    1801 # else
     1805#  else
    18021806                STAM_PROFILE_STOP(&pVM->selm.s.StatUpdateFromCPUM, a);
    18031807                return rc;
    1804 # endif
     1808#  endif
    18051809           }
    1806 #endif /* SELM_TRACK_GUEST_TSS_CHANGES */
     1810# endif /* SELM_TRACK_GUEST_TSS_CHANGES */
    18071811
    18081812            /* Update saved Guest TSS info. */
    … …  
    18231827    STAM_PROFILE_STOP(&pVM->selm.s.StatTSSSync, a);
    18241828    return VINF_SUCCESS;
    1825 #endif /*VBOX_WITH_RAW_MODE*/
    1826 }
    1827 
    1828 #ifdef VBOX_WITH_RAW_MODE
     1829}
     1830
    18291831
    18301832/**

  • trunk/src/VBox/VMM/VMMR3/TRPM.cpp

    r45528 r45533  
    424424
    425425
    426 /** Enable or disable tracking of Guest's IDT. */
     426#ifdef VBOX_WITH_RAW_MODE
     427/ ** Enable or disable tracking of Guest's IDT. */
    427428#define TRPM_TRACK_GUEST_IDT_CHANGES
    428 
    429429/** Enable or disable tracking of Shadow IDT. */
    430 #define TRPM_TRACK_SHADOW_IDT_CHANGES
     430# define TRPM_TRACK_SHADOW_IDT_CHANGES
     431#endif
    431432
    432433/** TRPM saved state version. */
    … …  
    440441static DECLCALLBACK(int) trpmR3Save(PVM pVM, PSSMHANDLE pSSM);
    441442static DECLCALLBACK(int) trpmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
     443#ifdef TRPM_TRACK_GUEST_IDT_CHANGES
    442444static DECLCALLBACK(int) trpmR3GuestIDTWriteHandler(PVM pVM, RTGCPTR GCPtr, void *pvPtr, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser);
     445#endif
    443446
    444447
    … …  
    571574    STAM_REG(pVM, &pVM->trpm.s.StatTrap0dRdTsc,             STAMTYPE_COUNTER, "/TRPM/RC/Traps/0d/RdTsc",        STAMUNIT_OCCURENCES, "Number of RDTSC #GPs.");
    572575
     576#ifdef VBOX_WITH_RAW_MODE
    573577    /*
    574578     * Default action when entering raw mode for the first time
    … …  
    576580    PVMCPU pVCpu = &pVM->aCpus[0];  /* raw mode implies on VCPU */
    577581    VMCPU_FF_SET(pVCpu, VMCPU_FF_TRPM_SYNC_IDT);
     582#endif
    578583    return 0;
    579584}
    … …  
    773778    TRPMR3Relocate(pVM, 0);
    774779
     780#ifdef VBOX_WITH_RAW_MODE
    775781    /*
    776782     * Default action when entering raw mode for the first time
    … …  
    778784    PVMCPU pVCpu = &pVM->aCpus[0];  /* raw mode implies on VCPU */
    779785    VMCPU_FF_SET(pVCpu, VMCPU_FF_TRPM_SYNC_IDT);
     786#endif
    780787}
    781788
    … …  
    847854    SSMR3PutBool(pSSM,      pTrpm->fDisableMonitoring);
    848855    PVMCPU pVCpu = &pVM->aCpus[0];  /* raw mode implies 1 VCPU */
    849     SSMR3PutUInt(pSSM,      VMCPU_FF_ISSET(pVCpu, VMCPU_FF_TRPM_SYNC_IDT));
     856    SSMR3PutUInt(pSSM,      VM_WHEN_RAW_MODE(VMCPU_FF_ISSET(pVCpu, VMCPU_FF_TRPM_SYNC_IDT), 0));
    850857    SSMR3PutMem(pSSM,       &pTrpm->au32IdtPatched[0], sizeof(pTrpm->au32IdtPatched));
    851858    SSMR3PutU32(pSSM, ~0);              /* separator. */
    … …  
    947954        return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
    948955    }
     956#ifdef VBOX_WITH_RAW_MODE
    949957    if (fSyncIDT)
    950958    {
    … …  
    953961    }
    954962    /* else: cleared by reset call above. */
     963#endif
    955964
    956965    SSMR3GetMem(pSSM, &pTrpm->au32IdtPatched[0], sizeof(pTrpm->au32IdtPatched));
    … …  
    10001009}
    10011010
     1011#ifdef VBOX_WITH_RAW_MODE
    10021012
    10031013/**
    … …  
    10211031    }
    10221032
    1023 #ifdef VBOX_WITH_RAW_MODE
    10241033    if (fRawRing0 && CSAMIsEnabled(pVM))
    10251034    {
    … …  
    10331042        CSAMR3CheckGates(pVM, 0, 256);
    10341043    }
    1035 #endif /* VBOX_WITH_RAW_MODE */
    10361044
    10371045    /*
    … …  
    10461054    }
    10471055
    1048 #ifdef TRPM_TRACK_GUEST_IDT_CHANGES
     1056# ifdef TRPM_TRACK_GUEST_IDT_CHANGES
    10491057    /*
    10501058     * Check if Guest's IDTR has changed.
    … …  
    10681076                                             0, trpmR3GuestIDTWriteHandler, "trpmRCGuestIDTWriteHandler", 0, "Guest IDT write access handler");
    10691077
    1070 # ifdef VBOX_WITH_RAW_MODE
    10711078            if (rc == VERR_PGM_HANDLER_VIRTUAL_CONFLICT)
    10721079            {
    … …  
    10791086                                                 0, trpmR3GuestIDTWriteHandler, "trpmRCGuestIDTWriteHandler", 0, "Guest IDT write access handler");
    10801087            }
    1081 # endif /* VBOX_WITH_RAW_MODE */
    10821088
    10831089            AssertRCReturn(rc, rc);
    … …  
    10871093        pVM->trpm.s.GuestIdtr = IDTR;
    10881094    }
    1089 #endif
     1095# endif
    10901096
    10911097    /*
    … …  
    11251131     * Deregister any virtual handlers.
    11261132     */
    1127 #ifdef TRPM_TRACK_GUEST_IDT_CHANGES
     1133# ifdef TRPM_TRACK_GUEST_IDT_CHANGES
    11281134    if (pVM->trpm.s.GuestIdtr.pIdt != RTRCPTR_MAX)
    11291135    {
    … …  
    11361142    }
    11371143    pVM->trpm.s.GuestIdtr.cbIdt = 0;
    1138 #endif
    1139 
    1140 #ifdef TRPM_TRACK_SHADOW_IDT_CHANGES
     1144# endif
     1145
     1146# ifdef TRPM_TRACK_SHADOW_IDT_CHANGES
    11411147    if (pVM->trpm.s.pvMonShwIdtRC != RTRCPTR_MAX)
    11421148    {
    … …  
    11451151        pVM->trpm.s.pvMonShwIdtRC = RTRCPTR_MAX;
    11461152    }
    1147 #endif
     1153# endif
    11481154
    11491155    PVMCPU pVCpu = &pVM->aCpus[0];  /* raw mode implies on VCPU */
    … …  
    11811187}
    11821188
    1183 #ifdef VBOX_WITH_RAW_MODE
    11841189
    11851190/**

  • trunk/src/VBox/VMM/VMMR3/VMM.cpp

    r45525 r45533  
    23822382        PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3_NON_GLOBAL);
    23832383        PRINT_FLAG(VMCPU_FF_,TLB_FLUSH);
     2384        PRINT_FLAG(VMCPU_FF_,INHIBIT_INTERRUPTS);
     2385        PRINT_FLAG(VMCPU_FF_,TO_R3);
     2386#ifdef VBOX_WITH_RAW_MODE
    23842387        PRINT_FLAG(VMCPU_FF_,TRPM_SYNC_IDT);
    23852388        PRINT_FLAG(VMCPU_FF_,SELM_SYNC_TSS);
    23862389        PRINT_FLAG(VMCPU_FF_,SELM_SYNC_GDT);
    23872390        PRINT_FLAG(VMCPU_FF_,SELM_SYNC_LDT);
    2388         PRINT_FLAG(VMCPU_FF_,INHIBIT_INTERRUPTS);
    23892391        PRINT_FLAG(VMCPU_FF_,CSAM_SCAN_PAGE);
    23902392        PRINT_FLAG(VMCPU_FF_,CSAM_PENDING_ACTION);
    2391         PRINT_FLAG(VMCPU_FF_,TO_R3);
     2393#endif
    23922394        if (f)
    23932395            pHlp->pfnPrintf(pHlp, "%s\n    Unknown bits: %#RX32\n", c ? "," : "", f);

  • trunk/src/VBox/VMM/VMMR3/VMMTests.cpp

    r44528 r45533  
    490490    }
    491491
     492#ifdef VBOX_WITH_RAW_MODE
    492493    /*
    493494     * These forced actions are not necessary for the test and trigger breakpoints too.
    … …  
    495496    VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_TRPM_SYNC_IDT);
    496497    VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_SELM_SYNC_TSS);
     498#endif
    497499
    498500    /* Enable mapping of the hypervisor into the shadow page table. */

  • trunk/src/VBox/VMM/include/SELMInternal.h

    r45485 r45533  
    3434 */
    3535
    36 /**
    37  * Enable or disable tracking of Shadow GDT/LDT/TSS.
     36/** Enable or disable tracking of Shadow GDT/LDT/TSS.
    3837 * @{
    3938 */
    40 #define SELM_TRACK_SHADOW_GDT_CHANGES
    41 #define SELM_TRACK_SHADOW_LDT_CHANGES
    42 #define SELM_TRACK_SHADOW_TSS_CHANGES
     39#if defined(VBOX_WITH_RAW_MODE) || defined(DOXYGEN_RUNNING)
     40# define SELM_TRACK_SHADOW_GDT_CHANGES
     41# define SELM_TRACK_SHADOW_LDT_CHANGES
     42# define SELM_TRACK_SHADOW_TSS_CHANGES
     43#endif
    4344/** @} */
    4445
    45 /**
    46  * Enable or disable tracking of Guest GDT/LDT/TSS.
     46/** Enable or disable tracking of Guest GDT/LDT/TSS.
    4747 * @{
    4848 */
    49 #define SELM_TRACK_GUEST_GDT_CHANGES
    50 #define SELM_TRACK_GUEST_LDT_CHANGES
    51 #define SELM_TRACK_GUEST_TSS_CHANGES
     49#if defined(VBOX_WITH_RAW_MODE) || defined(DOXYGEN_RUNNING)
     50# define SELM_TRACK_GUEST_GDT_CHANGES
     51# define SELM_TRACK_GUEST_LDT_CHANGES
     52# define SELM_TRACK_GUEST_TSS_CHANGES
     53#endif
    5254/** @} */
    5355
    … …  
    98100    RTINT                   offVM;
    99101
     102/** @todo #ifdef VBOX_WITH_RAW_MODE */
    100103    /** Flat CS, DS, 64 bit mode CS, TSS & trap 8 TSS. */
    101104    RTSEL                   aHyperSel[SELM_HYPER_SEL_MAX];

  • trunk/src/recompiler/VBoxRecompiler.c

    r45528 r45533  
    17961796    pCtx->cr0 = env->cr[0];
    17971797    pCtx->cr3 = env->cr[3];
     1798#ifdef VBOX_WITH_RAW_MODE
    17981799    if ((env->cr[4] ^ pCtx->cr4) & X86_CR4_VME)
    17991800        VMCPU_FF_SET(env->pVCpu, VMCPU_FF_SELM_SYNC_TSS);
     1801#endif
    18001802    pCtx->cr4 = env->cr[4];
    18011803
    … …  
    19171919    pCtx->cr0 = env->cr[0];
    19181920    pCtx->cr3 = env->cr[3];
     1921#ifdef VBOX_WITH_RAW_MODE
    19191922    if ((env->cr[4] ^ pCtx->cr4) & X86_CR4_VME)
    19201923        VMCPU_FF_SET(env->pVCpu, VMCPU_FF_SELM_SYNC_TSS);
     1924#endif
    19211925    pCtx->cr4 = env->cr[4];
    19221926
    … …  
    19571961    pCtx->cr0 = env->cr[0];
    19581962    pCtx->cr3 = env->cr[3];
     1963#ifdef VBOX_WITH_RAW_MODE
    19591964    if ((env->cr[4] ^ pCtx->cr4) & X86_CR4_VME)
    19601965        VMCPU_FF_SET(env->pVCpu, VMCPU_FF_SELM_SYNC_TSS);
     1966#endif
    19611967    pCtx->cr4 = env->cr[4];
    19621968#ifdef TARGET_X86_64
    … …  
    26442650    pCtx->cr2           = pVM->rem.s.Env.cr[2];
    26452651    pCtx->cr3           = pVM->rem.s.Env.cr[3];
     2652#ifdef VBOX_WITH_RAW_MODE
    26462653    if ((pVM->rem.s.Env.cr[4] ^ pCtx->cr4) & X86_CR4_VME)
    26472654        VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_TSS);
     2655#endif
    26482656    pCtx->cr4           = pVM->rem.s.Env.cr[4];
    26492657
    … …  
    26562664        pCtx->gdtr.pGdt = pVM->rem.s.Env.gdt.base;
    26572665        STAM_COUNTER_INC(&gStatREMGDTChange);
     2666#ifdef VBOX_WITH_RAW_MODE
    26582667        VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_GDT);
     2668#endif
    26592669    }
    26602670
    … …  
    26642674        pCtx->idtr.pIdt = pVM->rem.s.Env.idt.base;
    26652675        STAM_COUNTER_INC(&gStatREMIDTChange);
     2676#ifdef VBOX_WITH_RAW_MODE
    26662677        VMCPU_FF_SET(pVCpu, VMCPU_FF_TRPM_SYNC_IDT);
     2678#endif
    26672679    }
    26682680
    … …  
    26822694        pCtx->ldtr.Attr.u   = (pVM->rem.s.Env.ldt.flags >> 8) & 0xF0FF;
    26832695        STAM_COUNTER_INC(&gStatREMLDTRChange);
     2696#ifdef VBOX_WITH_RAW_MODE
    26842697        VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_LDT);
     2698#endif
    26852699    }
    26862700
    … …  
    27092723            pCtx->tr.Attr.u |= DESC_TSS_BUSY_MASK >> 8;
    27102724        STAM_COUNTER_INC(&gStatREMTRChange);
     2725#ifdef VBOX_WITH_RAW_MODE
    27112726        VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_TSS);
     2727#endif
    27122728    }
    27132729
    … …  
    28662882    pCtx->cr2           = pVM->rem.s.Env.cr[2];
    28672883    pCtx->cr3           = pVM->rem.s.Env.cr[3];
     2884#ifdef VBOX_WITH_RAW_MODE
    28682885    if ((pVM->rem.s.Env.cr[4] ^ pCtx->cr4) & X86_CR4_VME)
    28692886        VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_TSS);
     2887#endif
    28702888    pCtx->cr4           = pVM->rem.s.Env.cr[4];
    28712889
    … …  
    28782896        pCtx->gdtr.pGdt     = (RTGCPTR)pVM->rem.s.Env.gdt.base;
    28792897        STAM_COUNTER_INC(&gStatREMGDTChange);
     2898#ifdef VBOX_WITH_RAW_MODE
    28802899        VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_GDT);
     2900#endif
    28812901    }
    28822902
    … …  
    28862906        pCtx->idtr.pIdt     = (RTGCPTR)pVM->rem.s.Env.idt.base;
    28872907        STAM_COUNTER_INC(&gStatREMIDTChange);
     2908#ifdef VBOX_WITH_RAW_MODE
    28882909        VMCPU_FF_SET(pVCpu, VMCPU_FF_TRPM_SYNC_IDT);
     2910#endif
    28892911    }
    28902912
    … …  
    29042926        pCtx->ldtr.Attr.u   = (pVM->rem.s.Env.ldt.flags >> 8) & 0xF0FF;
    29052927        STAM_COUNTER_INC(&gStatREMLDTRChange);
     2928#ifdef VBOX_WITH_RAW_MODE
    29062929        VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_LDT);
     2930#endif
    29072931    }
    29082932
    … …  
    29312955            pCtx->tr.Attr.u |= DESC_TSS_BUSY_MASK >> 8;
    29322956        STAM_COUNTER_INC(&gStatREMTRChange);
     2957#ifdef VBOX_WITH_RAW_MODE
    29332958        VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_TSS);
     2959#endif
    29342960    }
    29352961
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