Index: /trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp	(revision 45495)
+++ /trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp	(revision 45496)
@@ -4751,5 +4751,4 @@
  *
  * @returns VBox status code.
- * @param   pVM         Pointer to the VM.
  * @param   pVCpu       Pointer to the VMCPU.
  * @param   pMixedCtx   Pointer to the guest-CPU context. The data maybe
@@ -4759,5 +4758,5 @@
  * @remarks No-long-jump zone!!!
  */
-DECLINLINE(int) hmR0VmxSaveGuestCR0(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx)
+DECLINLINE(int) hmR0VmxSaveGuestCR0(PVMCPU pVCpu, PCPUMCTX pMixedCtx)
 {
     int rc = VINF_SUCCESS;
@@ -4782,5 +4781,4 @@
  *
  * @returns VBox status code.
- * @param   pVM         Pointer to the VM.
  * @param   pVCpu       Pointer to the VMCPU.
  * @param   pMixedCtx   Pointer to the guest-CPU context. The data maybe
@@ -4790,5 +4788,5 @@
  * @remarks No-long-jump zone!!!
  */
-DECLINLINE(int) hmR0VmxSaveGuestCR4(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx)
+DECLINLINE(int) hmR0VmxSaveGuestCR4(PVMCPU pVCpu, PCPUMCTX pMixedCtx)
 {
     int rc = VINF_SUCCESS;
@@ -4812,5 +4810,4 @@
  *
  * @returns VBox status code.
- * @param   pVM         Pointer to the VM.
  * @param   pVCpu       Pointer to the VMCPU.
  * @param   pMixedCtx   Pointer to the guest-CPU context. The data maybe
@@ -4820,5 +4817,5 @@
  * @remarks No-long-jump zone!!!
  */
-DECLINLINE(int) hmR0VmxSaveGuestRip(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx)
+DECLINLINE(int) hmR0VmxSaveGuestRip(PVMCPU pVCpu, PCPUMCTX pMixedCtx)
 {
     if (pVCpu->hm.s.vmx.fUpdatedGuestState & VMX_UPDATED_GUEST_RIP)
@@ -4838,5 +4835,4 @@
  *
  * @returns VBox status code.
- * @param   pVM         Pointer to the VM.
  * @param   pVCpu       Pointer to the VMCPU.
  * @param   pMixedCtx   Pointer to the guest-CPU context. The data maybe
@@ -4846,5 +4842,5 @@
  * @remarks No-long-jump zone!!!
  */
-DECLINLINE(int) hmR0VmxSaveGuestRsp(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx)
+DECLINLINE(int) hmR0VmxSaveGuestRsp(PVMCPU pVCpu, PCPUMCTX pMixedCtx)
 {
     if (pVCpu->hm.s.vmx.fUpdatedGuestState & VMX_UPDATED_GUEST_RSP)
@@ -4864,5 +4860,4 @@
  *
  * @returns VBox status code.
- * @param   pVM         Pointer to the VM.
  * @param   pVCpu       Pointer to the VMCPU.
  * @param   pMixedCtx   Pointer to the guest-CPU context. The data maybe
@@ -4872,5 +4867,5 @@
  * @remarks No-long-jump zone!!!
  */
-DECLINLINE(int) hmR0VmxSaveGuestRflags(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx)
+DECLINLINE(int) hmR0VmxSaveGuestRflags(PVMCPU pVCpu, PCPUMCTX pMixedCtx)
 {
     if (pVCpu->hm.s.vmx.fUpdatedGuestState & VMX_UPDATED_GUEST_RFLAGS)
@@ -4885,4 +4880,5 @@
     if (pVCpu->hm.s.vmx.RealMode.fRealOnV86Active)
     {
+        PVM pVM = pVCpu->CTX_SUFF(pVM);
         Assert(pVM->hm.s.vmx.pRealModeTSS);
         Log(("Saving real-mode RFLAGS VT-x view=%#RX64\n", pMixedCtx->rflags.u64));
@@ -4900,9 +4896,9 @@
  * guest-CPU context.
  */
-static int hmR0VmxSaveGuestGprs(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx)
-{
-    int rc = hmR0VmxSaveGuestRip(pVM, pVCpu, pMixedCtx);
-    rc    |= hmR0VmxSaveGuestRsp(pVM, pVCpu, pMixedCtx);
-    rc    |= hmR0VmxSaveGuestRflags(pVM, pVCpu, pMixedCtx);
+static int hmR0VmxSaveGuestGprs(PVMCPU pVCpu, PCPUMCTX pMixedCtx)
+{
+    int rc = hmR0VmxSaveGuestRip(pVCpu, pMixedCtx);
+    rc    |= hmR0VmxSaveGuestRsp(pVCpu, pMixedCtx);
+    rc    |= hmR0VmxSaveGuestRflags(pVCpu, pMixedCtx);
     return rc;
 }
@@ -4913,5 +4909,4 @@
  * from the guest-state area in the VMCS.
  *
- * @param   pVM         Pointer to the VM.
  * @param   pVCpu       Pointer to the VMCPU.
  * @param   pMixedCtx   Pointer to the guest-CPU context. The data maybe
@@ -4921,5 +4916,5 @@
  * @remarks No-long-jump zone!!!
  */
-DECLINLINE(void) hmR0VmxSaveGuestIntrState(PVM pVM,  PVMCPU pVCpu, PCPUMCTX pMixedCtx)
+DECLINLINE(void) hmR0VmxSaveGuestIntrState(PVMCPU pVCpu, PCPUMCTX pMixedCtx)
 {
     uint32_t uIntrState = 0;
@@ -4933,6 +4928,6 @@
         Assert(   uIntrState == VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_STI
                || uIntrState == VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_MOVSS);
-        rc  = hmR0VmxSaveGuestRip(pVM, pVCpu, pMixedCtx);
-        rc |= hmR0VmxSaveGuestRflags(pVM, pVCpu, pMixedCtx);    /* for hmR0VmxLoadGuestIntrState(). */
+        rc  = hmR0VmxSaveGuestRip(pVCpu, pMixedCtx);
+        rc |= hmR0VmxSaveGuestRflags(pVCpu, pMixedCtx);    /* for hmR0VmxLoadGuestIntrState(). */
         AssertRC(rc);
         EMSetInhibitInterruptsPC(pVCpu, pMixedCtx->rip);
@@ -4946,5 +4941,4 @@
  *
  * @returns VBox status code.
- * @param   pVM         Pointer to the VM.
  * @param   pVCpu       Pointer to the VMCPU.
  * @param   pMixedCtx   Pointer to the guest-CPU context. The data maybe
@@ -4954,5 +4948,5 @@
  * @remarks No-long-jump zone!!!
  */
-DECLINLINE(int) hmR0VmxSaveGuestActivityState(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx)
+DECLINLINE(int) hmR0VmxSaveGuestActivityState(PVMCPU pVCpu, PCPUMCTX pMixedCtx)
 {
     /* Nothing to do for now until we make use of different guest-CPU activity state. Just update the flag. */
@@ -4967,5 +4961,4 @@
  *
  * @returns VBox status code.
- * @param   pVM         Pointer to the VM.
  * @param   pVCpu       Pointer to the VMCPU.
  * @param   pMixedCtx   Pointer to the guest-CPU context. The data maybe
@@ -4975,5 +4968,5 @@
  * @remarks No-long-jump zone!!!
  */
-DECLINLINE(int) hmR0VmxSaveGuestSysenterMsrs(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx)
+DECLINLINE(int) hmR0VmxSaveGuestSysenterMsrs(PVMCPU pVCpu, PCPUMCTX pMixedCtx)
 {
     int rc = VINF_SUCCESS;
@@ -5008,5 +5001,4 @@
  *
  * @returns VBox status code.
- * @param   pVM         Pointer to the VM.
  * @param   pVCpu       Pointer to the VMCPU.
  * @param   pMixedCtx   Pointer to the guest-CPU context. The data maybe
@@ -5016,5 +5008,5 @@
  * @remarks No-long-jump zone!!!
  */
-DECLINLINE(int) hmR0VmxSaveGuestFSBaseMsr(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx)
+DECLINLINE(int) hmR0VmxSaveGuestFSBaseMsr(PVMCPU pVCpu, PCPUMCTX pMixedCtx)
 {
     RTGCUINTREG uVal = 0;
@@ -5035,5 +5027,4 @@
  *
  * @returns VBox status code.
- * @param   pVM         Pointer to the VM.
  * @param   pVCpu       Pointer to the VMCPU.
  * @param   pMixedCtx   Pointer to the guest-CPU context. The data maybe
@@ -5043,5 +5034,5 @@
  * @remarks No-long-jump zone!!!
  */
-DECLINLINE(int) hmR0VmxSaveGuestGSBaseMsr(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx)
+DECLINLINE(int) hmR0VmxSaveGuestGSBaseMsr(PVMCPU pVCpu, PCPUMCTX pMixedCtx)
 {
     RTGCUINTREG uVal = 0;
@@ -5062,5 +5053,4 @@
  *
  * @returns VBox status code.
- * @param   pVM         Pointer to the VM.
  * @param   pVCpu       Pointer to the VMCPU.
  * @param   pMixedCtx   Pointer to the guest-CPU context. The data maybe
@@ -5070,5 +5060,5 @@
  * @remarks No-long-jump zone!!!
  */
-static int hmR0VmxSaveGuestAutoLoadStoreMsrs(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx)
+static int hmR0VmxSaveGuestAutoLoadStoreMsrs(PVMCPU pVCpu, PCPUMCTX pMixedCtx)
 {
     if (pVCpu->hm.s.vmx.fUpdatedGuestState & VMX_UPDATED_GUEST_AUTO_LOAD_STORE_MSRS)
@@ -5107,5 +5097,4 @@
  *
  * @returns VBox status code.
- * @param   pVM         Pointer to the VM.
  * @param   pVCpu       Pointer to the VMCPU.
  * @param   pMixedCtx   Pointer to the guest-CPU context. The data maybe
@@ -5115,5 +5104,5 @@
  * @remarks No-long-jump zone!!!
  */
-DECLINLINE(int) hmR0VmxSaveGuestControlRegs(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx)
+DECLINLINE(int) hmR0VmxSaveGuestControlRegs(PVMCPU pVCpu, PCPUMCTX pMixedCtx)
 {
     RTGCUINTREG uVal    = 0;
@@ -5122,8 +5111,8 @@
 
     /* Guest CR0. Guest FPU. */
-    rc = hmR0VmxSaveGuestCR0(pVM, pVCpu, pMixedCtx);
+    rc = hmR0VmxSaveGuestCR0(pVCpu, pMixedCtx);
 
     /* Guest CR4. */
-    rc |= hmR0VmxSaveGuestCR4(pVM, pVCpu, pMixedCtx);
+    rc |= hmR0VmxSaveGuestCR4(pVCpu, pMixedCtx);
     AssertRCReturn(rc, rc);
 
@@ -5131,4 +5120,5 @@
     if (!(pVCpu->hm.s.vmx.fUpdatedGuestState & VMX_UPDATED_GUEST_CR3))
     {
+        PVM pVM = pVCpu->CTX_SUFF(pVM);
         if (   pVM->hm.s.fNestedPaging
             && CPUMIsGuestPagingEnabledEx(pMixedCtx))
@@ -5143,5 +5133,5 @@
 
             /* We require EFER to check PAE mode. */
-            rc |= hmR0VmxSaveGuestAutoLoadStoreMsrs(pVM, pVCpu, pMixedCtx);
+            rc |= hmR0VmxSaveGuestAutoLoadStoreMsrs(pVCpu, pMixedCtx);
 
             /* If the guest is in PAE mode, sync back the PDPE's into the guest state. */
@@ -5217,5 +5207,4 @@
  *
  * @returns VBox status code.
- * @param   pVM         Pointer to the VM.
  * @param   pVCpu       Pointer to the VMCPU.
  * @param   pMixedCtx   Pointer to the guest-CPU context. The data maybe
@@ -5225,5 +5214,5 @@
  * @remarks No-long-jump zone!!!
  */
-static int hmR0VmxSaveGuestSegmentRegs(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx)
+static int hmR0VmxSaveGuestSegmentRegs(PVMCPU pVCpu, PCPUMCTX pMixedCtx)
 {
 #ifdef VMX_USE_CACHED_VMCS_ACCESSES
@@ -5242,5 +5231,5 @@
     if (!(pVCpu->hm.s.vmx.fUpdatedGuestState & VMX_UPDATED_GUEST_SEGMENT_REGS))
     {
-        rc = hmR0VmxSaveGuestCR0(pVM, pVCpu, pMixedCtx);
+        rc = hmR0VmxSaveGuestCR0(pVCpu, pMixedCtx);
         rc |= VMXLOCAL_READ_SEG(CS, cs);
         rc |= VMXLOCAL_READ_SEG(SS, ss);
@@ -5297,5 +5286,5 @@
     if (!(pVCpu->hm.s.vmx.fUpdatedGuestState & VMX_UPDATED_GUEST_TR))
     {
-        rc = hmR0VmxSaveGuestCR0(pVM, pVCpu, pMixedCtx);
+        rc = hmR0VmxSaveGuestCR0(pVCpu, pMixedCtx);
 
         /* For real-mode emulation using virtual-8086 mode we have the fake TSS (pRealModeTSS) in TR, don't save the fake one. */
@@ -5314,5 +5303,4 @@
  *
  * @returns VBox status code.
- * @param   pVM         Pointer to the VM.
  * @param   pVCpu       Pointer to the VMCPU.
  * @param   pMixedCtx   Pointer to the guest-CPU context. The data maybe
@@ -5322,5 +5310,5 @@
  * @remarks No-long-jump zone!!!
  */
-DECLINLINE(int) hmR0VmxSaveGuestDebugRegs(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx)
+DECLINLINE(int) hmR0VmxSaveGuestDebugRegs(PVMCPU pVCpu, PCPUMCTX pMixedCtx)
 {
     int rc = VINF_SUCCESS;
@@ -5341,5 +5329,4 @@
  *
  * @returns VBox status code.
- * @param   pVM         Pointer to the VM.
  * @param   pVCpu       Pointer to the VMCPU.
  * @param   pMixedCtx   Pointer to the guest-CPU context. The data maybe
@@ -5349,5 +5336,5 @@
  * @remarks No-long-jump zone!!!
  */
-DECLINLINE(int) hmR0VmxSaveGuestApicState(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx)
+DECLINLINE(int) hmR0VmxSaveGuestApicState(PVMCPU pVCpu, PCPUMCTX pMixedCtx)
 {
     /* Updating TPR is already done in hmR0VmxPostRunGuest(). Just update the flag. */
@@ -5362,5 +5349,4 @@
  *
  * @returns VBox status code.
- * @param   pVM         Pointer to the VM.
  * @param   pVCpu       Pointer to the VMCPU.
  * @param   pMixedCtx   Pointer to the guest-CPU context. The data may be
@@ -5368,7 +5354,6 @@
  *                      before using them.
  */
-static int hmR0VmxSaveGuestState(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx)
-{
-    Assert(pVM);
+static int hmR0VmxSaveGuestState(PVMCPU pVCpu, PCPUMCTX pMixedCtx)
+{
     Assert(pVCpu);
     Assert(pMixedCtx);
@@ -5379,33 +5364,33 @@
     VMMRZCallRing3Disable(pVCpu);
 
-    int rc = hmR0VmxSaveGuestGprs(pVM, pVCpu, pMixedCtx);
-    AssertLogRelMsgRCReturn(rc, ("hmR0VmxSaveGuestGprs failed! rc=%Rrc (pVM=%p pVCpu=%p)\n", rc, pVM, pVCpu), rc);
-
-    rc = hmR0VmxSaveGuestControlRegs(pVM, pVCpu, pMixedCtx);
-    AssertLogRelMsgRCReturn(rc, ("hmR0VmxSaveGuestControlRegs failed! rc=%Rrc (pVM=%p pVCpu=%p)\n", rc, pVM, pVCpu), rc);
-
-    rc = hmR0VmxSaveGuestSegmentRegs(pVM, pVCpu, pMixedCtx);
-    AssertLogRelMsgRCReturn(rc, ("hmR0VmxSaveGuestSegmentRegs failed! rc=%Rrc (pVM=%p pVCpu=%p)\n", rc, pVM, pVCpu), rc);
-
-    rc = hmR0VmxSaveGuestDebugRegs(pVM, pVCpu, pMixedCtx);
-    AssertLogRelMsgRCReturn(rc, ("hmR0VmxSaveGuestDebugRegs failed! rc=%Rrc (pVM=%p pVCpu=%p)\n", rc, pVM, pVCpu), rc);
-
-    rc = hmR0VmxSaveGuestSysenterMsrs(pVM, pVCpu, pMixedCtx);
-    AssertLogRelMsgRCReturn(rc, ("hmR0VmxSaveGuestSysenterMsrs failed! rc=%Rrc (pVM=%p pVCpu=%p)\n", rc, pVM, pVCpu), rc);
-
-    rc = hmR0VmxSaveGuestFSBaseMsr(pVM, pVCpu, pMixedCtx);
-    AssertLogRelMsgRCReturn(rc, ("hmR0VmxSaveGuestFSBaseMsr failed! rc=%Rrc (pVM=%p pVCpu=%p)\n", rc, pVM, pVCpu), rc);
-
-    rc = hmR0VmxSaveGuestGSBaseMsr(pVM, pVCpu, pMixedCtx);
-    AssertLogRelMsgRCReturn(rc, ("hmR0VmxSaveGuestGSBaseMsr failed! rc=%Rrc (pVM=%p pVCpu=%p)\n", rc, pVM, pVCpu), rc);
-
-    rc = hmR0VmxSaveGuestAutoLoadStoreMsrs(pVM, pVCpu, pMixedCtx);
-    AssertLogRelMsgRCReturn(rc, ("hmR0VmxSaveGuestAutoLoadStoreMsrs failed! rc=%Rrc (pVM=%p pVCpu=%p)\n", rc, pVM, pVCpu), rc);
-
-    rc = hmR0VmxSaveGuestActivityState(pVM, pVCpu, pMixedCtx);
-    AssertLogRelMsgRCReturn(rc, ("hmR0VmxSaveGuestActivityState failed! rc=%Rrc (pVM=%p pVCpu=%p)\n", rc, pVM, pVCpu), rc);
-
-    rc = hmR0VmxSaveGuestApicState(pVM, pVCpu, pMixedCtx);
-    AssertLogRelMsgRCReturn(rc, ("hmR0VmxSaveGuestDebugRegs failed! rc=%Rrc (pVM=%p pVCpu=%p)\n", rc, pVM, pVCpu), rc);
+    int rc = hmR0VmxSaveGuestGprs(pVCpu, pMixedCtx);
+    AssertLogRelMsgRCReturn(rc, ("hmR0VmxSaveGuestGprs failed! rc=%Rrc (pVCpu=%p)\n", rc, pVCpu), rc);
+
+    rc = hmR0VmxSaveGuestControlRegs(pVCpu, pMixedCtx);
+    AssertLogRelMsgRCReturn(rc, ("hmR0VmxSaveGuestControlRegs failed! rc=%Rrc (pVCpu=%p)\n", rc, pVCpu), rc);
+
+    rc = hmR0VmxSaveGuestSegmentRegs(pVCpu, pMixedCtx);
+    AssertLogRelMsgRCReturn(rc, ("hmR0VmxSaveGuestSegmentRegs failed! rc=%Rrc (pVCpu=%p)\n", rc, pVCpu), rc);
+
+    rc = hmR0VmxSaveGuestDebugRegs(pVCpu, pMixedCtx);
+    AssertLogRelMsgRCReturn(rc, ("hmR0VmxSaveGuestDebugRegs failed! rc=%Rrc (pVCpu=%p)\n", rc, pVCpu), rc);
+
+    rc = hmR0VmxSaveGuestSysenterMsrs(pVCpu, pMixedCtx);
+    AssertLogRelMsgRCReturn(rc, ("hmR0VmxSaveGuestSysenterMsrs failed! rc=%Rrc (pVCpu=%p)\n", rc, pVCpu), rc);
+
+    rc = hmR0VmxSaveGuestFSBaseMsr(pVCpu, pMixedCtx);
+    AssertLogRelMsgRCReturn(rc, ("hmR0VmxSaveGuestFSBaseMsr failed! rc=%Rrc (pVCpu=%p)\n", rc, pVCpu), rc);
+
+    rc = hmR0VmxSaveGuestGSBaseMsr(pVCpu, pMixedCtx);
+    AssertLogRelMsgRCReturn(rc, ("hmR0VmxSaveGuestGSBaseMsr failed! rc=%Rrc (pVCpu=%p)\n", rc, pVCpu), rc);
+
+    rc = hmR0VmxSaveGuestAutoLoadStoreMsrs(pVCpu, pMixedCtx);
+    AssertLogRelMsgRCReturn(rc, ("hmR0VmxSaveGuestAutoLoadStoreMsrs failed! rc=%Rrc (pVCpu=%p)\n", rc, pVCpu), rc);
+
+    rc = hmR0VmxSaveGuestActivityState(pVCpu, pMixedCtx);
+    AssertLogRelMsgRCReturn(rc, ("hmR0VmxSaveGuestActivityState failed! rc=%Rrc (pVCpu=%p)\n", rc, pVCpu), rc);
+
+    rc = hmR0VmxSaveGuestApicState(pVCpu, pMixedCtx);
+    AssertLogRelMsgRCReturn(rc, ("hmR0VmxSaveGuestDebugRegs failed! rc=%Rrc (pVCpu=%p)\n", rc, pVCpu), rc);
 
     AssertMsg(pVCpu->hm.s.vmx.fUpdatedGuestState == VMX_UPDATED_GUEST_ALL,
@@ -5449,5 +5434,5 @@
     {
         /* We need the control registers now, make sure the guest-CPU context is updated. */
-        rc = hmR0VmxSaveGuestControlRegs(pVM, pVCpu, pMixedCtx);
+        rc = hmR0VmxSaveGuestControlRegs(pVCpu, pMixedCtx);
         AssertRCReturn(rc, rc);
 
@@ -5590,5 +5575,5 @@
     Assert(!VMMRZCallRing3IsEnabled(pVCpu));
 
-    int rc = hmR0VmxSaveGuestState(pVM, pVCpu, pMixedCtx);
+    int rc = hmR0VmxSaveGuestState(pVCpu, pMixedCtx);
     Assert(pVCpu->hm.s.vmx.fUpdatedGuestState == VMX_UPDATED_GUEST_ALL);
     AssertRC(rc);
@@ -5639,7 +5624,17 @@
     Assert(!RTThreadPreemptIsEnabled(NIL_RTTHREAD));
 
-    /* We want to see what the guest-state was before VM-entry, don't resync here, as we will never continue guest execution.*/
-    if (rcExit == VERR_VMX_INVALID_GUEST_STATE)
+    if (RT_UNLIKELY(rcExit == VERR_VMX_INVALID_GUEST_STATE))
+    {
+        /* We want to see what the guest-state was before VM-entry, don't resync here, as we won't continue guest execution. */
         return;
+    }
+    else if (RT_UNLIKELY(rcExit == VERR_VMX_INVALID_VMCS_PTR))
+    {
+        VMXGetActivateVMCS(&pVCpu->hm.s.vmx.lasterror.u64VMCSPhys);
+        pVCpu->hm.s.vmx.lasterror.u32VMCSRevision = *(uint32_t *)pVCpu->hm.s.vmx.pvVmcs;
+        pVCpu->hm.s.vmx.lasterror.idEnteredCpu    = pVCpu->hm.s.idEnteredCpu;
+        pVCpu->hm.s.vmx.lasterror.idCurrentCpu    = RTMpCpuId();
+        return;
+    }
 
     /* Please, no longjumps here (any logging shouldn't flush jump back to ring-3). NO LOGGING BEFORE THIS POINT! */
@@ -5812,5 +5807,5 @@
 
     /* We need the guests's RFLAGS for sure from this point on, make sure it is updated. */
-    int rc = hmR0VmxSaveGuestRflags(pVM, pVCpu, pMixedCtx);
+    int rc = hmR0VmxSaveGuestRflags(pVCpu, pMixedCtx);
     AssertRCReturn(rc, rc);
 
@@ -6052,5 +6047,5 @@
 
     /* We require CR0 to check if the guest is in real-mode. */
-    int rc = hmR0VmxSaveGuestCR0(pVM, pVCpu, pMixedCtx);
+    int rc = hmR0VmxSaveGuestCR0(pVCpu, pMixedCtx);
     AssertRCReturn(rc, rc);
 
@@ -6072,6 +6067,6 @@
 
             /* Save the required guest state bits from the VMCS. */
-            rc  = hmR0VmxSaveGuestSegmentRegs(pVM, pVCpu, pMixedCtx);
-            rc |= hmR0VmxSaveGuestGprs(pVM, pVCpu, pMixedCtx);
+            rc  = hmR0VmxSaveGuestSegmentRegs(pVCpu, pMixedCtx);
+            rc |= hmR0VmxSaveGuestGprs(pVCpu, pMixedCtx);
             AssertRCReturn(rc, rc);
 
@@ -6491,5 +6486,5 @@
 
         /* Need guest's LSTAR MSR (which is part of the auto load/store MSRs in the VMCS), ensure we have the updated one. */
-        rc = hmR0VmxSaveGuestAutoLoadStoreMsrs(pVM, pVCpu, pMixedCtx);
+        rc = hmR0VmxSaveGuestAutoLoadStoreMsrs(pVCpu, pMixedCtx);
         AssertRC(rc);
 
@@ -6547,5 +6542,5 @@
     if (pVM->hm.s.fTPRPatchingActive)
     {
-        int rc = hmR0VmxSaveGuestAutoLoadStoreMsrs(pVM, pVCpu, pMixedCtx);
+        int rc = hmR0VmxSaveGuestAutoLoadStoreMsrs(pVCpu, pMixedCtx);
         AssertRC(rc);
         pMixedCtx->msrLSTAR = ASMRdMsr(MSR_K8_LSTAR);           /* MSR_K8_LSTAR contains the guest TPR. */
@@ -6577,5 +6572,5 @@
     {
         /* Update the guest interruptibility-state from the VMCS. */
-        hmR0VmxSaveGuestIntrState(pVM, pVCpu, pMixedCtx);
+        hmR0VmxSaveGuestIntrState(pVCpu, pMixedCtx);
 
         /*
@@ -6784,4 +6779,28 @@
 
 
+/**
+ * Advances the guest RIP after reading it from the VMCS.
+ *
+ * @returns VBox status code.
+ * @param   pVCpu           Pointer to the VMCPU.
+ * @param   pMixedCtx       Pointer to the guest-CPU context. The data maybe
+ *                          out-of-sync. Make sure to update the required fields
+ *                          before using them.
+ * @param   pVmxTransient   Pointer to the VMX transient structure.
+ *
+ * @remarks No-long-jump zone!!!
+ */
+DECLINLINE(int) hmR0VmxAdvanceGuestRip(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)
+{
+    int rc = hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient);
+    rc    |= hmR0VmxSaveGuestRip(pVCpu, pMixedCtx);
+    AssertRCReturn(rc, rc);
+
+    pMixedCtx->rip += pVmxTransient->cbInstr;
+    pVCpu->hm.s.fContextUseFlags |= HM_CHANGED_GUEST_RIP;
+    return rc;
+}
+
+
 /* -=-=-=-=-=-=-=-=--=-=-=-=-=-=-=-=-=-=-=--=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-= */
 /* -=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=- VM-exit handlers -=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=- */
@@ -6852,5 +6871,5 @@
                 default:
                 {
-                    rc = hmR0VmxSaveGuestCR0(pVM, pVCpu, pMixedCtx);
+                    rc = hmR0VmxSaveGuestCR0(pVCpu, pMixedCtx);
                     AssertRCReturn(rc, rc);
 
@@ -6927,13 +6946,6 @@
 {
     VMX_VALIDATE_EXIT_HANDLER_PARAMS();
-    int rc = hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient);
-    rc    |= hmR0VmxSaveGuestRip(pVM, pVCpu, pMixedCtx);
-    AssertRCReturn(rc, rc);
-
-    pMixedCtx->rip += pVmxTransient->cbInstr;
-    pVCpu->hm.s.fContextUseFlags |= HM_CHANGED_GUEST_RIP;
-
     STAM_COUNTER_INC(&pVCpu->hm.s.StatExitWbinvd);
-    return VINF_SUCCESS;
+    return hmR0VmxAdvanceGuestRip(pVCpu, pMixedCtx, pVmxTransient);
 }
 
@@ -6945,13 +6957,6 @@
 {
     VMX_VALIDATE_EXIT_HANDLER_PARAMS();
-    int rc = hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient);
-    rc    |= hmR0VmxSaveGuestRip(pVM, pVCpu, pMixedCtx);
-    AssertRCReturn(rc, rc);
-
-    pMixedCtx->rip += pVmxTransient->cbInstr;
-    pVCpu->hm.s.fContextUseFlags |= HM_CHANGED_GUEST_RIP;
-
     STAM_COUNTER_INC(&pVCpu->hm.s.StatExitInvd);
-    return VINF_SUCCESS;
+    return hmR0VmxAdvanceGuestRip(pVCpu, pMixedCtx, pVmxTransient);
 }
 
@@ -6966,12 +6971,6 @@
     if (RT_LIKELY(rc == VINF_SUCCESS))
     {
-        rc  = hmR0VmxSaveGuestRip(pVM, pVCpu, pMixedCtx);
-        rc |= hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient);
-        AssertRCReturn(rc, rc);
+        rc = hmR0VmxAdvanceGuestRip(pVCpu, pMixedCtx, pVmxTransient);
         Assert(pVmxTransient->cbInstr == 2);
-
-        Log(("hmR0VmxExitCpuid: RIP=%#RX64\n", pMixedCtx->rip));
-        pMixedCtx->rip += pVmxTransient->cbInstr;
-        pVCpu->hm.s.fContextUseFlags |= HM_CHANGED_GUEST_RIP;
     }
     else
@@ -6991,5 +6990,5 @@
 {
     VMX_VALIDATE_EXIT_HANDLER_PARAMS();
-    int rc  = hmR0VmxSaveGuestCR4(pVM, pVCpu, pMixedCtx);
+    int rc  = hmR0VmxSaveGuestCR4(pVCpu, pMixedCtx);
     AssertRCReturn(rc, rc);
 
@@ -7008,5 +7007,5 @@
 {
     VMX_VALIDATE_EXIT_HANDLER_PARAMS();
-    int rc = hmR0VmxSaveGuestCR4(pVM, pVCpu, pMixedCtx);    /** @todo review if CR4 is really required by EM. */
+    int rc = hmR0VmxSaveGuestCR4(pVCpu, pMixedCtx);    /** @todo review if CR4 is really required by EM. */
     AssertRCReturn(rc, rc);
 
@@ -7014,12 +7013,6 @@
     if (RT_LIKELY(rc == VINF_SUCCESS))
     {
-        rc  = hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient);
-        rc |= hmR0VmxSaveGuestRip(pVM, pVCpu, pMixedCtx);
-        AssertRCReturn(rc, rc);
+        rc = hmR0VmxAdvanceGuestRip(pVCpu, pMixedCtx, pVmxTransient);
         Assert(pVmxTransient->cbInstr == 2);
-
-        pMixedCtx->rip += pVmxTransient->cbInstr;
-        pVCpu->hm.s.fContextUseFlags |= HM_CHANGED_GUEST_RIP;
-
         /* If we get a spurious VM-exit when offsetting is enabled, we must reset offsetting on VM-reentry. See @bugref{6634}. */
         if (pVCpu->hm.s.vmx.u32ProcCtls & VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_USE_TSC_OFFSETTING)
@@ -7042,6 +7035,6 @@
 {
     VMX_VALIDATE_EXIT_HANDLER_PARAMS();
-    int rc = hmR0VmxSaveGuestCR4(pVM, pVCpu, pMixedCtx);    /** @todo review if CR4 is really required by EM. */
-    rc    |= hmR0VmxSaveGuestAutoLoadStoreMsrs(pVM, pVCpu, pMixedCtx);  /* For MSR_K8_TSC_AUX */
+    int rc = hmR0VmxSaveGuestCR4(pVCpu, pMixedCtx);                /** @todo review if CR4 is really required by EM. */
+    rc    |= hmR0VmxSaveGuestAutoLoadStoreMsrs(pVCpu, pMixedCtx);  /* For MSR_K8_TSC_AUX */
     AssertRCReturn(rc, rc);
 
@@ -7049,12 +7042,6 @@
     if (RT_LIKELY(rc == VINF_SUCCESS))
     {
-        rc  = hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient);
-        rc |= hmR0VmxSaveGuestRip(pVM, pVCpu, pMixedCtx);
-        AssertRCReturn(rc, rc);
+        rc  = hmR0VmxAdvanceGuestRip(pVCpu, pMixedCtx, pVmxTransient);
         Assert(pVmxTransient->cbInstr == 3);
-
-        pMixedCtx->rip += pVmxTransient->cbInstr;
-        pVCpu->hm.s.fContextUseFlags |= HM_CHANGED_GUEST_RIP;
-
         /* If we get a spurious VM-exit when offsetting is enabled, we must reset offsetting on VM-reentry. See @bugref{6634}. */
         if (pVCpu->hm.s.vmx.u32ProcCtls & VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_USE_TSC_OFFSETTING)
@@ -7077,6 +7064,6 @@
 {
     VMX_VALIDATE_EXIT_HANDLER_PARAMS();
-    int rc = hmR0VmxSaveGuestCR4(pVM, pVCpu, pMixedCtx);    /** @todo review if CR4 is really required by EM. */
-    rc    |= hmR0VmxSaveGuestCR0(pVM, pVCpu, pMixedCtx);    /** @todo review if CR0 is really required by EM. */
+    int rc = hmR0VmxSaveGuestCR4(pVCpu, pMixedCtx);    /** @todo review if CR4 is really required by EM. */
+    rc    |= hmR0VmxSaveGuestCR0(pVCpu, pMixedCtx);    /** @todo review if CR0 is really required by EM. */
     AssertRCReturn(rc, rc);
 
@@ -7084,11 +7071,6 @@
     if (RT_LIKELY(rc == VINF_SUCCESS))
     {
-        rc  = hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient);
-        rc |= hmR0VmxSaveGuestRip(pVM, pVCpu, pMixedCtx);
-        AssertRCReturn(rc, rc);
+        rc = hmR0VmxAdvanceGuestRip(pVCpu, pMixedCtx, pVmxTransient);
         Assert(pVmxTransient->cbInstr == 2);
-
-        pMixedCtx->rip += pVmxTransient->cbInstr;
-        pVCpu->hm.s.fContextUseFlags |= HM_CHANGED_GUEST_RIP;
     }
     else
@@ -7109,5 +7091,5 @@
     VMX_VALIDATE_EXIT_HANDLER_PARAMS();
     int rc = hmR0VmxReadExitQualificationVmcs(pVCpu, pVmxTransient);
-    rc    |= hmR0VmxSaveGuestControlRegs(pVM, pVCpu, pMixedCtx);
+    rc    |= hmR0VmxSaveGuestControlRegs(pVCpu, pMixedCtx);
     AssertRCReturn(rc, rc);
 
@@ -7115,12 +7097,5 @@
     rc = VBOXSTRICTRC_VAL(rc2);
     if (RT_LIKELY(rc == VINF_SUCCESS))
-    {
-        rc  = hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient);
-        rc |= hmR0VmxSaveGuestRip(pVM, pVCpu, pMixedCtx);
-        AssertRCReturn(rc, rc);
-
-        pMixedCtx->rip += pVmxTransient->cbInstr;
-        pVCpu->hm.s.fContextUseFlags |= HM_CHANGED_GUEST_RIP;
-    }
+        rc = hmR0VmxAdvanceGuestRip(pVCpu, pMixedCtx, pVmxTransient);
     else
     {
@@ -7140,19 +7115,12 @@
 {
     VMX_VALIDATE_EXIT_HANDLER_PARAMS();
-    int rc = hmR0VmxSaveGuestCR0(pVM, pVCpu, pMixedCtx);
-    rc    |= hmR0VmxSaveGuestRflags(pVM, pVCpu, pMixedCtx);
-    rc    |= hmR0VmxSaveGuestSegmentRegs(pVM, pVCpu, pMixedCtx);
+    int rc = hmR0VmxSaveGuestCR0(pVCpu, pMixedCtx);
+    rc    |= hmR0VmxSaveGuestRflags(pVCpu, pMixedCtx);
+    rc    |= hmR0VmxSaveGuestSegmentRegs(pVCpu, pMixedCtx);
     AssertRCReturn(rc, rc);
 
     rc = EMInterpretMonitor(pVM, pVCpu, CPUMCTX2CORE(pMixedCtx));
     if (RT_LIKELY(rc == VINF_SUCCESS))
-    {
-        rc  = hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient);
-        rc |= hmR0VmxSaveGuestRip(pVM, pVCpu, pMixedCtx);
-        AssertRCReturn(rc, rc);
-
-        pMixedCtx->rip += pVmxTransient->cbInstr;
-        pVCpu->hm.s.fContextUseFlags |= HM_CHANGED_GUEST_RIP;
-    }
+        rc = hmR0VmxAdvanceGuestRip(pVCpu, pMixedCtx, pVmxTransient);
     else
     {
@@ -7171,7 +7139,7 @@
 {
     VMX_VALIDATE_EXIT_HANDLER_PARAMS();
-    int rc = hmR0VmxSaveGuestCR0(pVM, pVCpu, pMixedCtx);
-    rc    |= hmR0VmxSaveGuestRflags(pVM, pVCpu, pMixedCtx);
-    rc    |= hmR0VmxSaveGuestSegmentRegs(pVM, pVCpu, pMixedCtx);
+    int rc = hmR0VmxSaveGuestCR0(pVCpu, pMixedCtx);
+    rc    |= hmR0VmxSaveGuestRflags(pVCpu, pMixedCtx);
+    rc    |= hmR0VmxSaveGuestSegmentRegs(pVCpu, pMixedCtx);
     AssertRCReturn(rc, rc);
 
@@ -7181,10 +7149,6 @@
                   || rc == VINF_EM_HALT))
     {
-        int rc3  = hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient);
-        rc3     |= hmR0VmxSaveGuestRip(pVM, pVCpu, pMixedCtx);
+        int rc3 = hmR0VmxAdvanceGuestRip(pVCpu, pMixedCtx, pVmxTransient);
         AssertRCReturn(rc3, rc3);
-
-        pMixedCtx->rip += pVmxTransient->cbInstr;
-        pVCpu->hm.s.fContextUseFlags |= HM_CHANGED_GUEST_RIP;
 
         if (   rc == VINF_EM_HALT
@@ -7297,6 +7261,6 @@
     VMX_VALIDATE_EXIT_HANDLER_PARAMS();
     Assert(pVCpu->hm.s.vmx.u32ProcCtls & VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_HLT_EXIT);
-    int rc = hmR0VmxSaveGuestRip(pVM, pVCpu, pMixedCtx);
-    rc    |= hmR0VmxSaveGuestRflags(pVM, pVCpu, pMixedCtx);
+    int rc = hmR0VmxSaveGuestRip(pVCpu, pMixedCtx);
+    rc    |= hmR0VmxSaveGuestRflags(pVCpu, pMixedCtx);
     AssertRCReturn(rc, rc);
 
@@ -7379,5 +7343,5 @@
     rc     |= hmR0VmxReadEntryInstrLenVmcs(pVCpu, pVmxTransient);
     rc     |= VMXReadVmcs32(VMX_VMCS32_GUEST_INTERRUPTIBILITY_STATE, &uIntrState);
-    rc     |= hmR0VmxSaveGuestState(pVM, pVCpu, pMixedCtx);
+    rc     |= hmR0VmxSaveGuestState(pVCpu, pMixedCtx);
     AssertRCReturn(rc, rc);
 
@@ -7479,7 +7443,7 @@
     VMX_VALIDATE_EXIT_HANDLER_PARAMS();
     /* EMInterpretRdmsr() requires CR0, Eflags and SS segment register. */
-    int rc = hmR0VmxSaveGuestCR0(pVM, pVCpu, pMixedCtx);
-    rc    |= hmR0VmxSaveGuestRflags(pVM, pVCpu, pMixedCtx);
-    rc    |= hmR0VmxSaveGuestSegmentRegs(pVM, pVCpu, pMixedCtx);
+    int rc = hmR0VmxSaveGuestCR0(pVCpu, pMixedCtx);
+    rc    |= hmR0VmxSaveGuestRflags(pVCpu, pMixedCtx);
+    rc    |= hmR0VmxSaveGuestSegmentRegs(pVCpu, pMixedCtx);
     AssertRCReturn(rc, rc);
 
@@ -7492,11 +7456,6 @@
     if (RT_LIKELY(rc == VINF_SUCCESS))
     {
-        rc  = hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient);
-        rc |= hmR0VmxSaveGuestRip(pVM, pVCpu, pMixedCtx);
-        AssertRCReturn(rc, rc);
-
+        rc = hmR0VmxAdvanceGuestRip(pVCpu, pMixedCtx, pVmxTransient);
         Assert(pVmxTransient->cbInstr == 2);
-        pMixedCtx->rip += pVmxTransient->cbInstr;
-        pVCpu->hm.s.fContextUseFlags |= HM_CHANGED_GUEST_RIP;
     }
     return rc;
@@ -7510,8 +7469,5 @@
 {
     VMX_VALIDATE_EXIT_HANDLER_PARAMS();
-    int rc = hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient);
-    AssertRCReturn(rc, rc);
-    Assert(pVmxTransient->cbInstr == 2);
-
+    int rc = VINF_SUCCESS;
     /* If TPR patching is active, LSTAR holds the guest TPR, writes to it must be propagated to the APIC. */
     if (   pVM->hm.s.fTPRPatchingActive
@@ -7525,8 +7481,6 @@
         }
 
-        rc = hmR0VmxSaveGuestRip(pVM, pVCpu, pMixedCtx);
-        AssertRCReturn(rc, rc);
-        pMixedCtx->rip += pVmxTransient->cbInstr;
-        pVCpu->hm.s.fContextUseFlags |= HM_CHANGED_GUEST_RIP;
+        rc = hmR0VmxAdvanceGuestRip(pVCpu, pMixedCtx, pVmxTransient);
+        Assert(pVmxTransient->cbInstr == 2);
         STAM_COUNTER_INC(&pVCpu->hm.s.StatExitWrmsr);
         return VINF_SUCCESS;
@@ -7569,7 +7523,7 @@
 
     /* EMInterpretWrmsr() requires CR0, EFLAGS and SS segment register. */
-    rc  = hmR0VmxSaveGuestCR0(pVM, pVCpu, pMixedCtx);
-    rc |= hmR0VmxSaveGuestRflags(pVM, pVCpu, pMixedCtx);
-    rc |= hmR0VmxSaveGuestSegmentRegs(pVM, pVCpu, pMixedCtx);
+    rc  = hmR0VmxSaveGuestCR0(pVCpu, pMixedCtx);
+    rc |= hmR0VmxSaveGuestRflags(pVCpu, pMixedCtx);
+    rc |= hmR0VmxSaveGuestSegmentRegs(pVCpu, pMixedCtx);
     AssertRCReturn(rc, rc);
 
@@ -7581,9 +7535,5 @@
     if (RT_LIKELY(rc == VINF_SUCCESS))
     {
-        rc = hmR0VmxSaveGuestRip(pVM, pVCpu, pMixedCtx);
-        AssertRCReturn(rc, rc);
-
-        pMixedCtx->rip += pVmxTransient->cbInstr;
-        pVCpu->hm.s.fContextUseFlags |= HM_CHANGED_GUEST_RIP;
+        rc = hmR0VmxAdvanceGuestRip(pVCpu, pMixedCtx, pVmxTransient);
 
         /* If this is an X2APIC WRMSR access, update the APIC state as well. */
@@ -7657,9 +7607,9 @@
 #if 0
             /* EMInterpretCRxWrite() references a lot of guest state (EFER, RFLAGS, Segment Registers, etc.) Sync entire state */
-            rc = hmR0VmxSaveGuestState(pVM, pVCpu, pMixedCtx);
+            rc = hmR0VmxSaveGuestState(pVCpu, pMixedCtx);
 #else
-            rc  = hmR0VmxSaveGuestGprs(pVM, pVCpu, pMixedCtx);
-            rc |= hmR0VmxSaveGuestControlRegs(pVM, pVCpu, pMixedCtx);
-            rc |= hmR0VmxSaveGuestSegmentRegs(pVM, pVCpu, pMixedCtx);
+            rc  = hmR0VmxSaveGuestGprs(pVCpu, pMixedCtx);
+            rc |= hmR0VmxSaveGuestControlRegs(pVCpu, pMixedCtx);
+            rc |= hmR0VmxSaveGuestSegmentRegs(pVCpu, pMixedCtx);
 #endif
             AssertRCReturn(rc, rc);
@@ -7675,4 +7625,7 @@
                     Log(("CR0 write rc=%d\n", rc));
                     pVCpu->hm.s.fContextUseFlags |= HM_CHANGED_GUEST_CR0;
+                    break;
+                case 2: /* C2 **/
+                    /* Nothing to do here, CR2 it's not part of the VMCS. */
                     break;
                 case 3: /* CR3 */
@@ -7702,5 +7655,5 @@
         {
             /* EMInterpretCRxRead() requires EFER MSR, CS. */
-            rc = hmR0VmxSaveGuestSegmentRegs(pVM, pVCpu, pMixedCtx);
+            rc = hmR0VmxSaveGuestSegmentRegs(pVCpu, pMixedCtx);
             AssertRCReturn(rc, rc);
             Assert(   !pVM->hm.s.fNestedPaging
@@ -7723,5 +7676,5 @@
         case VMX_EXIT_QUALIFICATION_CRX_ACCESS_CLTS:        /* CLTS (Clear Task-Switch Flag in CR0) */
         {
-            rc = hmR0VmxSaveGuestCR0(pVM, pVCpu, pMixedCtx);
+            rc = hmR0VmxSaveGuestCR0(pVCpu, pMixedCtx);
             AssertRCReturn(rc, rc);
             rc = EMInterpretCLTS(pVM, pVCpu);
@@ -7735,5 +7688,5 @@
         case VMX_EXIT_QUALIFICATION_CRX_ACCESS_LMSW:        /* LMSW (Load Machine-Status Word into CR0) */
         {
-            rc = hmR0VmxSaveGuestCR0(pVM, pVCpu, pMixedCtx);
+            rc = hmR0VmxSaveGuestCR0(pVCpu, pMixedCtx);
             AssertRCReturn(rc, rc);
             rc = EMInterpretLMSW(pVM, pVCpu, CPUMCTX2CORE(pMixedCtx), VMX_EXIT_QUALIFICATION_CRX_LMSW_DATA(uExitQualification));
@@ -7756,9 +7709,6 @@
     if (RT_SUCCESS(rc))
     {
-        int rc2  = hmR0VmxSaveGuestRip(pVM, pVCpu, pMixedCtx);
-        rc2     |= hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient);
+        int rc2 = hmR0VmxAdvanceGuestRip(pVCpu, pMixedCtx, pVmxTransient);
         AssertRCReturn(rc2, rc2);
-        pMixedCtx->rip += pVmxTransient->cbInstr;
-        pVCpu->hm.s.fContextUseFlags |= HM_CHANGED_GUEST_RIP;
     }
 
@@ -7777,8 +7727,8 @@
     int rc = hmR0VmxReadExitQualificationVmcs(pVCpu, pVmxTransient);
     rc    |= hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient);
-    rc    |= hmR0VmxSaveGuestRip(pVM, pVCpu, pMixedCtx);
-    rc    |= hmR0VmxSaveGuestRflags(pVM, pVCpu, pMixedCtx);         /* Eflag checks in EMInterpretDisasCurrent(). */
-    rc    |= hmR0VmxSaveGuestControlRegs(pVM, pVCpu, pMixedCtx);    /* CR0 checks & PGM* in EMInterpretDisasCurrent(). */
-    rc    |= hmR0VmxSaveGuestSegmentRegs(pVM, pVCpu, pMixedCtx);    /* SELM checks in EMInterpretDisasCurrent(). */
+    rc    |= hmR0VmxSaveGuestRip(pVCpu, pMixedCtx);
+    rc    |= hmR0VmxSaveGuestRflags(pVCpu, pMixedCtx);         /* Eflag checks in EMInterpretDisasCurrent(). */
+    rc    |= hmR0VmxSaveGuestControlRegs(pVCpu, pMixedCtx);    /* CR0 checks & PGM* in EMInterpretDisasCurrent(). */
+    rc    |= hmR0VmxSaveGuestSegmentRegs(pVCpu, pMixedCtx);    /* SELM checks in EMInterpretDisasCurrent(). */
     /* EFER also required for longmode checks in EMInterpretDisasCurrent(), but it's always up-to-date. */
     AssertRCReturn(rc, rc);
@@ -7866,5 +7816,5 @@
         if (RT_LIKELY(rc == VINF_SUCCESS))
         {
-            rc = hmR0VmxSaveGuestDebugRegs(pVM, pVCpu, pMixedCtx);      /* For DR7. */
+            rc = hmR0VmxSaveGuestDebugRegs(pVCpu, pMixedCtx);      /* For DR7. */
             AssertRCReturn(rc, rc);
 
@@ -8010,10 +7960,10 @@
     /** @todo Investigate if IOMMMIOPhysHandler() requires a lot of state, for now
      *   just sync the whole thing. */
-    rc = hmR0VmxSaveGuestState(pVM, pVCpu, pMixedCtx);
+    rc = hmR0VmxSaveGuestState(pVCpu, pMixedCtx);
 #else
     /* Aggressive state sync. for now. */
-    rc  = hmR0VmxSaveGuestGprs(pVM, pVCpu, pMixedCtx);
-    rc |= hmR0VmxSaveGuestControlRegs(pVM, pVCpu, pMixedCtx);
-    rc |= hmR0VmxSaveGuestSegmentRegs(pVM, pVCpu, pMixedCtx);
+    rc  = hmR0VmxSaveGuestGprs(pVCpu, pMixedCtx);
+    rc |= hmR0VmxSaveGuestControlRegs(pVCpu, pMixedCtx);
+    rc |= hmR0VmxSaveGuestSegmentRegs(pVCpu, pMixedCtx);
 #endif
     AssertRCReturn(rc, rc);
@@ -8111,5 +8061,5 @@
      */
     rc  = hmR0VmxReadExitQualificationVmcs(pVCpu, pVmxTransient);
-    rc |= hmR0VmxSaveGuestSegmentRegs(pVM, pVCpu, pMixedCtx);
+    rc |= hmR0VmxSaveGuestSegmentRegs(pVCpu, pMixedCtx);
     AssertRCReturn(rc, rc);
 
@@ -8134,9 +8084,6 @@
     if (RT_SUCCESS(rc))
     {
-        int rc2  = hmR0VmxSaveGuestRip(pVM, pVCpu, pMixedCtx);
-        rc2     |= hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient);
+        int rc2 = hmR0VmxAdvanceGuestRip(pVCpu, pMixedCtx, pVmxTransient);
         AssertRCReturn(rc2, rc2);
-        pMixedCtx->rip += pVmxTransient->cbInstr;
-        pVCpu->hm.s.fContextUseFlags |= HM_CHANGED_GUEST_RIP;
     }
     return rc;
@@ -8164,10 +8111,10 @@
 
 #if 0
-    rc = hmR0VmxSaveGuestState(pVM, pVCpu, pMixedCtx);     /** @todo Can we do better?  */
+    rc = hmR0VmxSaveGuestState(pVCpu, pMixedCtx);     /** @todo Can we do better?  */
 #else
     /* Aggressive state sync. for now. */
-    rc |= hmR0VmxSaveGuestGprs(pVM, pVCpu, pMixedCtx);
-    rc |= hmR0VmxSaveGuestControlRegs(pVM, pVCpu, pMixedCtx);
-    rc |= hmR0VmxSaveGuestSegmentRegs(pVM, pVCpu, pMixedCtx);
+    rc |= hmR0VmxSaveGuestGprs(pVCpu, pMixedCtx);
+    rc |= hmR0VmxSaveGuestControlRegs(pVCpu, pMixedCtx);
+    rc |= hmR0VmxSaveGuestSegmentRegs(pVCpu, pMixedCtx);
 #endif
     AssertRCReturn(rc, rc);
@@ -8215,10 +8162,10 @@
     rc |= hmR0VmxReadExitQualificationVmcs(pVCpu, pVmxTransient);
 #if 0
-    rc |= hmR0VmxSaveGuestState(pVM, pVCpu, pMixedCtx);     /** @todo Can we do better?  */
+    rc |= hmR0VmxSaveGuestState(pVCpu, pMixedCtx);     /** @todo Can we do better?  */
 #else
     /* Aggressive state sync. for now. */
-    rc |= hmR0VmxSaveGuestGprs(pVM, pVCpu, pMixedCtx);
-    rc |= hmR0VmxSaveGuestControlRegs(pVM, pVCpu, pMixedCtx);
-    rc |= hmR0VmxSaveGuestSegmentRegs(pVM, pVCpu, pMixedCtx);
+    rc |= hmR0VmxSaveGuestGprs(pVCpu, pMixedCtx);
+    rc |= hmR0VmxSaveGuestControlRegs(pVCpu, pMixedCtx);
+    rc |= hmR0VmxSaveGuestSegmentRegs(pVCpu, pMixedCtx);
 #endif
     AssertRCReturn(rc, rc);
@@ -8273,5 +8220,5 @@
     VMX_VALIDATE_EXIT_XCPT_HANDLER_PARAMS();
 
-    int rc = hmR0VmxSaveGuestCR0(pVM, pVCpu, pMixedCtx);
+    int rc = hmR0VmxSaveGuestCR0(pVCpu, pMixedCtx);
     AssertRCReturn(rc, rc);
     STAM_COUNTER_INC(&pVCpu->hm.s.StatExitGuestMF);
@@ -8300,5 +8247,5 @@
     /** @todo Try optimize this by not saving the entire guest state unless
      *        really needed. */
-    int rc = hmR0VmxSaveGuestState(pVM, pVCpu, pMixedCtx);
+    int rc = hmR0VmxSaveGuestState(pVCpu, pMixedCtx);
     AssertRCReturn(rc, rc);
     STAM_COUNTER_INC(&pVCpu->hm.s.StatExitGuestBP);
@@ -8331,6 +8278,6 @@
 
     int rc = hmR0VmxReadExitQualificationVmcs(pVCpu, pVmxTransient);
-    rc    |= hmR0VmxSaveGuestSegmentRegs(pVM, pVCpu, pMixedCtx);
-    rc    |= hmR0VmxSaveGuestRflags(pVM, pVCpu, pMixedCtx);
+    rc    |= hmR0VmxSaveGuestSegmentRegs(pVCpu, pMixedCtx);
+    rc    |= hmR0VmxSaveGuestRflags(pVCpu, pMixedCtx);
     AssertRCReturn(rc, rc);
 
@@ -8387,5 +8334,5 @@
 
     /* We require CR0 and EFER. EFER is always up-to-date. */
-    int rc = hmR0VmxSaveGuestControlRegs(pVM, pVCpu, pMixedCtx);
+    int rc = hmR0VmxSaveGuestControlRegs(pVCpu, pMixedCtx);
     AssertRCReturn(rc, rc);
 
@@ -8431,5 +8378,5 @@
         rc |= hmR0VmxReadExitIntrErrorCodeVmcs(pVCpu, pVmxTransient);
         rc |= hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient);
-        rc |= hmR0VmxSaveGuestRip(pVM, pVCpu, pMixedCtx);
+        rc |= hmR0VmxSaveGuestRip(pVCpu, pMixedCtx);
         Log(("#GP Gst: RIP %#RX64\n", pMixedCtx->rip));
         rc |= hmR0VmxInjectEventVmcs(pVM, pVCpu, pMixedCtx,
@@ -8449,5 +8396,5 @@
 
     /* EMInterpretDisasCurrent() requires a lot of the state, save the entire state. */
-    rc = hmR0VmxSaveGuestState(pVM, pVCpu, pMixedCtx);
+    rc = hmR0VmxSaveGuestState(pVCpu, pMixedCtx);
     AssertRCReturn(rc, rc);
 
@@ -8710,7 +8657,7 @@
 
 #ifdef VBOX_HM_WITH_GUEST_PATCHING
-    rc  = hmR0VmxSaveGuestControlRegs(pVM, pVCpu, pMixedCtx);
-    rc |= hmR0VmxSaveGuestSegmentRegs(pVM, pVCpu, pMixedCtx);
-    rc |= hmR0VmxSaveGuestRflags(pVM, pVCpu, pMixedCtx);
+    rc  = hmR0VmxSaveGuestControlRegs(pVCpu, pMixedCtx);
+    rc |= hmR0VmxSaveGuestSegmentRegs(pVCpu, pMixedCtx);
+    rc |= hmR0VmxSaveGuestRflags(pVCpu, pMixedCtx);
     AssertRCReturn(rc, rc);
     /* Shortcut for APIC TPR access, only for 32-bit guests. */
@@ -8729,5 +8676,5 @@
             &&  GCPhys == GCPhysApicBase)
         {
-            rc = hmR0VmxSaveGuestRip(pVM, pVCpu, pMixedCtx);
+            rc = hmR0VmxSaveGuestRip(pVCpu, pMixedCtx);
             AssertRCReturn(rc, rc);
 
@@ -8744,5 +8691,5 @@
     TRPMSetErrorCode(pVCpu, pVmxTransient->uExitIntrErrorCode);
 
-    rc = hmR0VmxSaveGuestState(pVM, pVCpu, pMixedCtx);
+    rc = hmR0VmxSaveGuestState(pVCpu, pMixedCtx);
     AssertRCReturn(rc, rc);