Changeset 43667 in vbox

Timestamp:

Oct 17, 2012 11:54:39 AM (12 years ago)

Author:

vboxsync

Message:

VMM: APIC refactor, cache APIC base MSR during init phase.

Location:

trunk

Files:

• include/VBox/vmm/cpum.h (modified) (1 diff)
• src/VBox/VMM/VMMAll/CPUMAllRegs.cpp (modified) (1 diff)
• src/VBox/VMM/VMMR3/CPUM.cpp (modified) (1 diff)
• src/VBox/VMM/VMMR3/VMM.cpp (modified) (1 diff)

trunk/include/VBox/vmm/cpum.h

@@ -414 +414 @@
 
 VMMR3DECL(int)          CPUMR3Init(PVM pVM);
+VMMR3DECL(int)          CPUMR3InitCompleted(PVM pVM);
 VMMR3DECL(void)         CPUMR3Relocate(PVM pVM);
 VMMR3DECL(int)          CPUMR3Term(PVM pVM);

trunk/src/VBox/VMM/VMMAll/CPUMAllRegs.cpp

@@ -864 +864 @@
         {
             PVM pVM = pVCpu->CTX_SUFF(pVM);
-            if (   (    pVM->cpum.s.aGuestCpuIdStd[0].eax >= 1
+            if (   (    pVM->cpum.s.aGuestCpuIdStd[0].eax >= 1                                  /* APIC Std feature */
                     && (pVM->cpum.s.aGuestCpuIdStd[1].edx & X86_CPUID_FEATURE_EDX_APIC))
-                || (   pVM->cpum.s.aGuestCpuIdExt[0].eax >= 0x80000001
+                || (   pVM->cpum.s.aGuestCpuIdExt[0].eax >= 0x80000001                          /* APIC Ext feature (AMD) */
                     && pVM->cpum.s.enmGuestCpuVendor == CPUMCPUVENDOR_AMD
-                    && (pVM->cpum.s.aGuestCpuIdExt[1].edx & X86_CPUID_AMD_FEATURE_EDX_APIC)))
+                    && (pVM->cpum.s.aGuestCpuIdExt[1].edx & X86_CPUID_AMD_FEATURE_EDX_APIC))
+                || (    pVM->cpum.s.aGuestCpuIdStd[0].eax >= 1                                  /* x2APIC */
+                    && (pVM->cpum.s.aGuestCpuIdStd[1].ecx & X86_CPUID_FEATURE_ECX_X2APIC)))
             {
                 *puValue = pVCpu->cpum.s.Guest.msrApicBase;

trunk/src/VBox/VMM/VMMR3/CPUM.cpp

@@ -4382 +4382 @@
 }
 
+
+/**
+ * Called when the ring-3 init phase completes.
+ *
+ * @returns VBox status code.
+ * @param   pVM                 Pointer to the VM.
+ */
+VMMR3DECL(int) CPUMR3InitCompleted(PVM pVM)
+{
+    for (VMCPUID i = 0; i < pVM->cCpus; i++)
+    {
+        /* Cache the APIC base (from the APIC device) once it has been initialized. */
+        PDMApicGetBase(&pVM->aCpus[i], &pVM->aCpus[i].cpum.s.Guest.msrApicBase);
+        Log(("CPUMR3InitCompleted pVM=%p APIC base[%u]=%RX64\n", pVM, (unsigned)i, pVM->aCpus[i].cpum.s.Guest.msrApicBase));
+    }
+    return VINF_SUCCESS;
+}
+

trunk/src/VBox/VMM/VMMR3/VMM.cpp

@@ -627 +627 @@
         {
             /*
+             * CPUM's post-initialization (APIC base MSR caching).
+             */
+            rc = CPUMR3InitCompleted(pVM);
+            AssertRCReturn(rc, rc);
+
+            /*
              * Set page attributes to r/w for stack pages.
              */