Index: /trunk/src/VBox/Devices/PC/DevRTC.cpp
===================================================================
--- /trunk/src/VBox/Devices/PC/DevRTC.cpp	(revision 43240)
+++ /trunk/src/VBox/Devices/PC/DevRTC.cpp	(revision 43241)
@@ -115,4 +115,5 @@
 #define CMOS_BANK2_LOWER_LIMIT  0x80
 #define CMOS_BANK2_UPPER_LIMIT  0xFF
+#define CMOS_BANK_SIZE          0x80
 
 /** The saved state version. */
@@ -379,5 +380,5 @@
     if ((Port & 1) == 0)
     {
-        pThis->cmos_index[bank] = (u32 & 0x7f) + (bank * 128);
+        pThis->cmos_index[bank] = (u32 & 0x7f) + (bank * CMOS_BANK_SIZE);
     }
     else
@@ -769,5 +770,5 @@
 
     /* The state. */
-    SSMR3PutMem(pSSM, pThis->cmos_data, 128);
+    SSMR3PutMem(pSSM, pThis->cmos_data, CMOS_BANK_SIZE);
     SSMR3PutU8(pSSM, pThis->cmos_index[0]);
 
@@ -790,5 +791,5 @@
     SSMR3PutBool(pSSM, pThis->fDisabledByHpet);
 
-    SSMR3PutMem(pSSM, &pThis->cmos_data[128], 128);
+    SSMR3PutMem(pSSM, &pThis->cmos_data[CMOS_BANK_SIZE], CMOS_BANK_SIZE);
     return SSMR3PutU8(pSSM, pThis->cmos_index[1]);
 }
@@ -832,5 +833,5 @@
 
     /* The state. */
-    SSMR3GetMem(pSSM, pThis->cmos_data, 128);
+    SSMR3GetMem(pSSM, pThis->cmos_data, CMOS_BANK_SIZE);
     SSMR3GetU8(pSSM, &pThis->cmos_index[0]);
 
@@ -857,5 +858,5 @@
     {
         /* Second CMOS bank. */
-        SSMR3GetMem(pSSM, &pThis->cmos_data[128], 128);
+        SSMR3GetMem(pSSM, &pThis->cmos_data[CMOS_BANK_SIZE], CMOS_BANK_SIZE);
         SSMR3GetU8(pSSM, &pThis->cmos_index[1]);
     }
@@ -1033,5 +1034,5 @@
 
     Log(("CMOS bank 0: \n%16.128Rhxd\n", &pThis->cmos_data[0]));
-    Log(("CMOS bank 1: \n%16.128Rhxd\n", &pThis->cmos_data[128]));
+    Log(("CMOS bank 1: \n%16.128Rhxd\n", &pThis->cmos_data[CMOS_BANK_SIZE]));
     return VINF_SUCCESS;
 }
@@ -1088,4 +1089,8 @@
         pThis->cmos_data[0xF] = 0;
     }
+
+    /* Reset index values (important for second bank). */
+    pThis->cmos_index[0]        = 0;
+    pThis->cmos_index[1]        = CMOS_BANK_SIZE;   /* Point to start of second bank. */
 }
 
@@ -1158,4 +1163,6 @@
     pThis->RtcReg.pfnWrite      = rtcCMOSWrite;
     pThis->fDisabledByHpet      = false;
+    pThis->cmos_index[1]        = CMOS_BANK_SIZE;   /* Point to start of second bank. */
+
 
     /* IBase */