Index: /trunk/src/VBox/VMM/VMMAll/IEMAll.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMAll/IEMAll.cpp	(revision 42777)
+++ /trunk/src/VBox/VMM/VMMAll/IEMAll.cpp	(revision 42778)
@@ -75,4 +75,5 @@
  * context. */
 //#define IEM_VERIFICATION_MODE_MINIMAL
+//#define IEM_LOG_MEMORY_WRITES
 
 /*******************************************************************************
@@ -635,5 +636,5 @@
 
 
-#ifdef IEM_VERIFICATION_MODE_MINIMAL
+#if defined(IEM_VERIFICATION_MODE_MINIMAL) || defined(IEM_LOG_MEMORY_WRITES)
 /** What IEM just wrote. */
 uint8_t g_abIemWrote[256];
@@ -729,5 +730,5 @@
     PVMCPU   pVCpu = IEMCPU_TO_VMCPU(pIemCpu);
 
-#if defined(VBOX_STRICT) && (defined(IEM_VERIFICATION_MODE_FULL) || defined(VBOX_WITH_RAW_MODE_NOT_R0))
+#if defined(VBOX_STRICT) && (defined(IEM_VERIFICATION_MODE_FULL) || !defined(VBOX_WITH_RAW_MODE_NOT_R0))
     Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &pCtx->cs));
     Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &pCtx->ss));
@@ -4737,4 +4738,8 @@
     /* Force the alternative path so we can ignore writes. */
     if ((fAccess & IEM_ACCESS_TYPE_WRITE) && !pIemCpu->fNoRem)
+        return VERR_PGM_PHYS_TLB_CATCH_ALL;
+#endif
+#ifdef IEM_LOG_MEMORY_WRITES
+    if (fAccess & IEM_ACCESS_TYPE_WRITE)
         return VERR_PGM_PHYS_TLB_CATCH_ALL;
 #endif
@@ -4924,5 +4929,5 @@
     }
 #endif
-#ifdef IEM_VERIFICATION_MODE_MINIMAL
+#if defined(IEM_VERIFICATION_MODE_MINIMAL) || defined(IEM_LOG_MEMORY_WRITES)
     if (rc == VINF_SUCCESS)
     {
Index: /trunk/src/VBox/VMM/VMMAll/IEMAllCImpl.cpp.h
===================================================================
--- /trunk/src/VBox/VMM/VMMAll/IEMAllCImpl.cpp.h	(revision 42777)
+++ /trunk/src/VBox/VMM/VMMAll/IEMAllCImpl.cpp.h	(revision 42778)
@@ -2796,5 +2796,5 @@
     if (rcStrict == VINF_SUCCESS)
     {
-        if (!IEM_VERIFICATION_ENABLED(pIemCpu))
+        if (!IEM_FULL_VERIFICATION_ENABLED(pIemCpu))
             rcStrict = CPUMSetGuestGDTR(IEMCPU_TO_VMCPU(pIemCpu), GCPtrBase, cbLimit);
         else
@@ -2854,5 +2854,5 @@
     if (rcStrict == VINF_SUCCESS)
     {
-        if (!IEM_VERIFICATION_ENABLED(pIemCpu))
+        if (!IEM_FULL_VERIFICATION_ENABLED(pIemCpu))
             CPUMSetGuestIDTR(IEMCPU_TO_VMCPU(pIemCpu), GCPtrBase, cbLimit);
         else
@@ -2924,5 +2924,5 @@
     {
         Log(("lldt %04x: Loading NULL selector.\n",  uNewLdt));
-        if (!IEM_VERIFICATION_ENABLED(pIemCpu))
+        if (!IEM_FULL_VERIFICATION_ENABLED(pIemCpu))
             CPUMSetGuestLDTR(IEMCPU_TO_VMCPU(pIemCpu), uNewLdt);
         else
@@ -2991,5 +2991,5 @@
      */
 /** @todo check if the actual value is loaded or if the RPL is dropped */
-    if (!IEM_VERIFICATION_ENABLED(pIemCpu))
+    if (!IEM_FULL_VERIFICATION_ENABLED(pIemCpu))
         CPUMSetGuestLDTR(IEMCPU_TO_VMCPU(pIemCpu), uNewLdt & X86_SEL_MASK_OFF_RPL);
     else
@@ -3112,5 +3112,5 @@
      */
 /** @todo check if the actual value is loaded or if the RPL is dropped */
-    if (!IEM_VERIFICATION_ENABLED(pIemCpu))
+    if (!IEM_FULL_VERIFICATION_ENABLED(pIemCpu))
         CPUMSetGuestTR(IEMCPU_TO_VMCPU(pIemCpu), uNewTr & X86_SEL_MASK_OFF_RPL);
     else
@@ -3149,5 +3149,5 @@
         case 4: crX = pCtx->cr4; break;
         case 8:
-            if (!IEM_VERIFICATION_ENABLED(pIemCpu))
+            if (!IEM_FULL_VERIFICATION_ENABLED(pIemCpu))
                 IEM_RETURN_ASPECT_NOT_IMPLEMENTED_LOG(("Implement CR8/TPR read\n")); /** @todo implement CR8 reading and writing. */
             else
@@ -3260,5 +3260,5 @@
                     NewEFER &= ~MSR_K6_EFER_LME;
 
-                if (!IEM_VERIFICATION_ENABLED(pIemCpu))
+                if (!IEM_FULL_VERIFICATION_ENABLED(pIemCpu))
                     CPUMSetGuestEFER(pVCpu, NewEFER);
                 else
@@ -3270,5 +3270,5 @@
              * Inform PGM.
              */
-            if (!IEM_VERIFICATION_ENABLED(pIemCpu))
+            if (!IEM_FULL_VERIFICATION_ENABLED(pIemCpu))
             {
                 if (    (uNewCrX & (X86_CR0_PG | X86_CR0_WP | X86_CR0_PE))
@@ -3337,5 +3337,5 @@
 
             /* Make the change. */
-            if (!IEM_VERIFICATION_ENABLED(pIemCpu))
+            if (!IEM_FULL_VERIFICATION_ENABLED(pIemCpu))
             {
                 rc = CPUMSetGuestCR3(pVCpu, uNewCrX);
@@ -3346,9 +3346,9 @@
 
             /* Inform PGM. */
-            if (!IEM_VERIFICATION_ENABLED(pIemCpu))
+            if (!IEM_FULL_VERIFICATION_ENABLED(pIemCpu))
             {
                 if (pCtx->cr0 & X86_CR0_PG)
                 {
-                    rc = PGMFlushTLB(pVCpu, pCtx->cr3, !(pCtx->cr3 & X86_CR4_PGE));
+                    rc = PGMFlushTLB(pVCpu, pCtx->cr3, !(pCtx->cr4 & X86_CR4_PGE));
                     AssertRCReturn(rc, rc);
                     /* ignore informational status codes */
@@ -3397,5 +3397,5 @@
              * Change it.
              */
-            if (!IEM_VERIFICATION_ENABLED(pIemCpu))
+            if (!IEM_FULL_VERIFICATION_ENABLED(pIemCpu))
             {
                 rc = CPUMSetGuestCR4(pVCpu, uNewCrX);
@@ -3409,5 +3409,5 @@
              * Notify SELM and PGM.
              */
-            if (!IEM_VERIFICATION_ENABLED(pIemCpu))
+            if (!IEM_FULL_VERIFICATION_ENABLED(pIemCpu))
             {
                 /* SELM - VME may change things wrt to the TSS shadowing. */
@@ -3420,6 +3420,5 @@
 
                 /* PGM - flushing and mode. */
-                if (    (uNewCrX & (X86_CR0_PG | X86_CR0_WP | X86_CR0_PE))
-                    !=  (uOldCrX & (X86_CR0_PG | X86_CR0_WP | X86_CR0_PE)) )
+                if ((uNewCrX ^ uOldCrX) & (X86_CR4_PSE | X86_CR4_PAE | X86_CR4_PGE))
                 {
                     rc = PGMFlushTLB(pVCpu, pCtx->cr3, true /* global */);
@@ -3438,5 +3437,5 @@
          */
         case 8:
-            if (!IEM_VERIFICATION_ENABLED(pIemCpu))
+            if (!IEM_FULL_VERIFICATION_ENABLED(pIemCpu))
                 IEM_RETURN_ASPECT_NOT_IMPLEMENTED_LOG(("Implement CR8/TPR read\n")); /** @todo implement CR8 reading and writing. */
             else
Index: /trunk/src/VBox/VMM/include/IEMInternal.h
===================================================================
--- /trunk/src/VBox/VMM/include/IEMInternal.h	(revision 42777)
+++ /trunk/src/VBox/VMM/include/IEMInternal.h	(revision 42778)
@@ -480,4 +480,16 @@
 #endif
 
+/**
+ * Tests if full verification mode is enabled.
+ *
+ * This expands to @c false when IEM_VERIFICATION_MODE is not defined and
+ * should therefore cause the compiler to eliminate the verification branch
+ * of an if statement.  */
+#ifdef IEM_VERIFICATION_MODE_FULL
+# define IEM_FULL_VERIFICATION_ENABLED(a_pIemCpu) (!(a_pIemCpu)->fNoRem)
+#else
+# define IEM_FULL_VERIFICATION_ENABLED(a_pIemCpu) (false)
+#endif
+
 /** @def IEM_VERIFICATION_MODE
  * Indicates that one of the verfication modes are enabled.
