Index: /trunk/src/VBox/Devices/PC/DevHPET.cpp
===================================================================
--- /trunk/src/VBox/Devices/PC/DevHPET.cpp	(revision 42564)
+++ /trunk/src/VBox/Devices/PC/DevHPET.cpp	(revision 42565)
@@ -1,5 +1,5 @@
 /* $Id$ */
 /** @file
- * HPET virtual device - high precision event timer emulation
+ * HPET virtual device - High Precision Event Timer emulation
  */
 
@@ -60,5 +60,5 @@
 
 /*
- * Femptosecods in nanosecond
+ * Femtosecods in a nanosecond
  */
 #define FS_PER_NS                   1000000
@@ -245,5 +245,5 @@
     PDMCRITSECT          csLock;
 
-    /** If we emulate ICH9 HPET (different frequency & timer count). */
+    /** Whether we emulate ICH9 HPET (different frequency & timer count). */
     bool                 fIch9;
     uint8_t              padding0[7];
@@ -419,5 +419,5 @@
  * @param   pu32Value           Where to return the register value.
  *
- * @remarks ASSUMES the caller does holds the HPET lock.
+ * @remarks ASSUMES the caller holds the HPET lock.
  */
 static int hpetTimerRegRead32(HpetState const *pThis, uint32_t iTimerNo, uint32_t iTimerReg, uint32_t *pu32Value)
@@ -1012,5 +1012,5 @@
 {
     /*
-     * Per spec, in legacy mode HPET timers wired as:
+     * Per spec, in legacy mode the HPET timers are wired as follows:
      *   timer 0: IRQ0 for PIC and IRQ2 for APIC
      *   timer 1: IRQ8 for both PIC and APIC