Index: /trunk/include/VBox/dis.h
===================================================================
--- /trunk/include/VBox/dis.h	(revision 41739)
+++ /trunk/include/VBox/dis.h	(revision 41740)
@@ -402,5 +402,7 @@
         uint32_t    u8;
     } uDisp;
-    int32_t         param;
+    /** Copy of the corresponding DISOPCODE::fParam1 / DISOPCODE::fParam2 /
+     *  DISOPCODE::fParam3. */
+    uint32_t        fParam;
 
     union
Index: /trunk/include/VBox/disopcode.h
===================================================================
--- /trunk/include/VBox/disopcode.h	(revision 41739)
+++ /trunk/include/VBox/disopcode.h	(revision 41740)
@@ -735,6 +735,6 @@
 
 
-#define OP_PARM_VTYPE(a)        ((int)a & 0xFE0)
-#define OP_PARM_VSUBTYPE(a)     ((int)a & 0x01F)
+#define OP_PARM_VTYPE(a)        ((unsigned)a & 0xFE0)
+#define OP_PARM_VSUBTYPE(a)     ((unsigned)a & 0x01F)
 
 #define OP_PARM_A               0x100
Index: /trunk/src/VBox/Disassembler/DisasmCore.cpp
===================================================================
--- /trunk/src/VBox/Disassembler/DisasmCore.cpp	(revision 41739)
+++ /trunk/src/VBox/Disassembler/DisasmCore.cpp	(revision 41740)
@@ -471,7 +471,7 @@
 
     // Should contain the parameter type on input
-    pCpu->Param1.param = pOp->fParam1;
-    pCpu->Param2.param = pOp->fParam2;
-    pCpu->Param3.param = pOp->fParam3;
+    pCpu->Param1.fParam = pOp->fParam1;
+    pCpu->Param2.fParam = pOp->fParam2;
+    pCpu->Param3.fParam = pOp->fParam3;
 
     /* Correct the operand size if the instruction is marked as forced or default 64 bits */
@@ -534,6 +534,6 @@
 
         // Should contain the parameter type on input
-        pCpu->Param1.param = fpop->fParam1;
-        pCpu->Param2.param = fpop->fParam2;
+        pCpu->Param1.fParam = fpop->fParam1;
+        pCpu->Param2.fParam = fpop->fParam2;
     }
     else
@@ -718,5 +718,5 @@
 unsigned UseModRM(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
 {
-    int      vtype = OP_PARM_VTYPE(pParam->param);
+    unsigned vtype = OP_PARM_VTYPE(pParam->fParam);
     unsigned reg = pCpu->ModRM.Bits.Reg;
     unsigned mod = pCpu->ModRM.Bits.Mod;
@@ -1401,5 +1401,5 @@
     if (pCpu->uAddrMode == DISCPUMODE_32BIT)
     {
-        if (OP_PARM_VSUBTYPE(pParam->param) == OP_PARM_p)
+        if (OP_PARM_VSUBTYPE(pParam->fParam) == OP_PARM_p)
         {
             /* far 16:32 pointer */
@@ -1425,5 +1425,5 @@
     if (pCpu->uAddrMode == DISCPUMODE_64BIT)
     {
-        Assert(OP_PARM_VSUBTYPE(pParam->param) != OP_PARM_p);
+        Assert(OP_PARM_VSUBTYPE(pParam->fParam) != OP_PARM_p);
         /*
          * near 64 bits pointer
@@ -1437,5 +1437,5 @@
         return sizeof(uint64_t);
     }
-    if (OP_PARM_VSUBTYPE(pParam->param) == OP_PARM_p)
+    if (OP_PARM_VSUBTYPE(pParam->fParam) == OP_PARM_p)
     {
         /* far 16:16 pointer */
@@ -1464,5 +1464,5 @@
     if (pCpu->uAddrMode == DISCPUMODE_32BIT)
     {
-        if (OP_PARM_VSUBTYPE(pParam->param) == OP_PARM_p)
+        if (OP_PARM_VSUBTYPE(pParam->fParam) == OP_PARM_p)
         {// far 16:32 pointer
             return sizeof(uint32_t) + sizeof(uint16_t);
@@ -1475,10 +1475,10 @@
     if (pCpu->uAddrMode == DISCPUMODE_64BIT)
     {
-        Assert(OP_PARM_VSUBTYPE(pParam->param) != OP_PARM_p);
+        Assert(OP_PARM_VSUBTYPE(pParam->fParam) != OP_PARM_p);
         return sizeof(uint64_t);
     }
     else
     {
-        if (OP_PARM_VSUBTYPE(pParam->param) == OP_PARM_p)
+        if (OP_PARM_VSUBTYPE(pParam->fParam) == OP_PARM_p)
         {// far 16:16 pointer
             return sizeof(uint32_t);
@@ -1496,5 +1496,5 @@
     // immediate far pointers - only 16:16 or 16:32; determined by operand, *not* address size!
     Assert(pCpu->uOpMode == DISCPUMODE_16BIT || pCpu->uOpMode == DISCPUMODE_32BIT);
-    Assert(OP_PARM_VSUBTYPE(pParam->param) == OP_PARM_p);
+    Assert(OP_PARM_VSUBTYPE(pParam->fParam) == OP_PARM_p);
     if (pCpu->uOpMode == DISCPUMODE_32BIT)
     {
@@ -1520,5 +1520,5 @@
     // immediate far pointers - only 16:16 or 16:32
     Assert(pCpu->uOpMode == DISCPUMODE_16BIT || pCpu->uOpMode == DISCPUMODE_32BIT);
-    Assert(OP_PARM_VSUBTYPE(pParam->param) == OP_PARM_p);
+    Assert(OP_PARM_VSUBTYPE(pParam->fParam) == OP_PARM_p);
     if (pCpu->uOpMode == DISCPUMODE_32BIT)
     {
@@ -1542,5 +1542,5 @@
      */
 
-    if (pParam->param == OP_PARM_NONE)
+    if (pParam->fParam == OP_PARM_NONE)
     {
         /* No parameter at all. */
@@ -1553,5 +1553,5 @@
     AssertCompile(OP_PARM_REG_GEN8_END < OP_PARM_REG_FP_END);
 
-    if (pParam->param <= OP_PARM_REG_GEN32_END)
+    if (pParam->fParam <= OP_PARM_REG_GEN32_END)
     {
         /* 32-bit EAX..EDI registers. */
@@ -1559,5 +1559,5 @@
         {
             /* Use 32-bit registers. */
-            pParam->base.reg_gen = pParam->param - OP_PARM_REG_GEN32_START;
+            pParam->base.reg_gen = pParam->fParam - OP_PARM_REG_GEN32_START;
             pParam->fUse  |= DISUSE_REG_GEN32;
             pParam->cb     = 4;
@@ -1567,5 +1567,5 @@
         {
             /* Use 64-bit registers. */
-            pParam->base.reg_gen = pParam->param - OP_PARM_REG_GEN32_START;
+            pParam->base.reg_gen = pParam->fParam - OP_PARM_REG_GEN32_START;
             if (    (pOp->fOpType & DISOPTYPE_REXB_EXTENDS_OPREG)
                 &&  pParam == &pCpu->Param1             /* ugly assumption that it only applies to the first parameter */
@@ -1580,31 +1580,31 @@
         {
             /* Use 16-bit registers. */
-            pParam->base.reg_gen = pParam->param - OP_PARM_REG_GEN32_START;
+            pParam->base.reg_gen = pParam->fParam - OP_PARM_REG_GEN32_START;
             pParam->fUse  |= DISUSE_REG_GEN16;
             pParam->cb     = 2;
-            pParam->param = pParam->param - OP_PARM_REG_GEN32_START + OP_PARM_REG_GEN16_START;
-        }
-    }
-    else
-    if (pParam->param <= OP_PARM_REG_SEG_END)
+            pParam->fParam = pParam->fParam - OP_PARM_REG_GEN32_START + OP_PARM_REG_GEN16_START;
+        }
+    }
+    else
+    if (pParam->fParam <= OP_PARM_REG_SEG_END)
     {
         /* Segment ES..GS registers. */
-        pParam->base.reg_seg = (DISSELREG)(pParam->param - OP_PARM_REG_SEG_START);
+        pParam->base.reg_seg = (DISSELREG)(pParam->fParam - OP_PARM_REG_SEG_START);
         pParam->fUse  |= DISUSE_REG_SEG;
         pParam->cb     = 2;
     }
     else
-    if (pParam->param <= OP_PARM_REG_GEN16_END)
+    if (pParam->fParam <= OP_PARM_REG_GEN16_END)
     {
         /* 16-bit AX..DI registers. */
-        pParam->base.reg_gen = pParam->param - OP_PARM_REG_GEN16_START;
+        pParam->base.reg_gen = pParam->fParam - OP_PARM_REG_GEN16_START;
         pParam->fUse  |= DISUSE_REG_GEN16;
         pParam->cb     = 2;
     }
     else
-    if (pParam->param <= OP_PARM_REG_GEN8_END)
+    if (pParam->fParam <= OP_PARM_REG_GEN8_END)
     {
         /* 8-bit AL..DL, AH..DH registers. */
-        pParam->base.reg_gen = pParam->param - OP_PARM_REG_GEN8_START;
+        pParam->base.reg_gen = pParam->fParam - OP_PARM_REG_GEN8_START;
         pParam->fUse  |= DISUSE_REG_GEN8;
         pParam->cb     = 1;
@@ -1620,12 +1620,12 @@
     }
     else
-    if (pParam->param <= OP_PARM_REG_FP_END)
+    if (pParam->fParam <= OP_PARM_REG_FP_END)
     {
         /* FPU registers. */
-        pParam->base.reg_fp = pParam->param - OP_PARM_REG_FP_START;
+        pParam->base.reg_fp = pParam->fParam - OP_PARM_REG_FP_START;
         pParam->fUse  |= DISUSE_REG_FP;
         pParam->cb     = 10;
     }
-    Assert(!(pParam->param >= OP_PARM_REG_GEN64_START && pParam->param <= OP_PARM_REG_GEN64_END));
+    Assert(!(pParam->fParam >= OP_PARM_REG_GEN64_START && pParam->fParam <= OP_PARM_REG_GEN64_END));
 
     /* else - not supported for now registers. */
@@ -2298,11 +2298,10 @@
 static void disasmModRMReg(PDISCPUSTATE pCpu, PCDISOPCODE pOp, unsigned idx, PDISOPPARAM pParam, int fRegAddr)
 {
-    int subtype, type, mod;
     NOREF(pOp); NOREF(pCpu);
 
-    mod     = pCpu->ModRM.Bits.Mod;
-
-    type    = OP_PARM_VTYPE(pParam->param);
-    subtype = OP_PARM_VSUBTYPE(pParam->param);
+    unsigned mod     = pCpu->ModRM.Bits.Mod;
+
+    unsigned type    = OP_PARM_VTYPE(pParam->fParam);
+    unsigned subtype = OP_PARM_VSUBTYPE(pParam->fParam);
     if (fRegAddr)
         subtype = (pCpu->uAddrMode == DISCPUMODE_64BIT) ? OP_PARM_q : OP_PARM_d;
Index: /trunk/src/VBox/Disassembler/DisasmFormatYasm.cpp
===================================================================
--- /trunk/src/VBox/Disassembler/DisasmFormatYasm.cpp	(revision 41739)
+++ /trunk/src/VBox/Disassembler/DisasmFormatYasm.cpp	(revision 41740)
@@ -543,9 +543,9 @@
             case OP_FLD:
                 if (pCpu->bOpCode == 0xdb) /* m80fp workaround. */
-                    *(int *)&pCpu->Param1.param &= ~0x1f; /* make it pure OP_PARM_M */
+                    *(int *)&pCpu->Param1.fParam &= ~0x1f; /* make it pure OP_PARM_M */
                 break;
             case OP_LAR: /* hack w -> v, probably not correct. */
-                *(int *)&pCpu->Param2.param &= ~0x1f;
-                *(int *)&pCpu->Param2.param |= OP_PARM_v;
+                *(int *)&pCpu->Param2.fParam &= ~0x1f;
+                *(int *)&pCpu->Param2.fParam |= OP_PARM_v;
                 break;
         }
@@ -559,5 +559,5 @@
 #define PUT_FAR() \
             do { \
-                if (    OP_PARM_VSUBTYPE(pParam->param) == OP_PARM_p \
+                if (    OP_PARM_VSUBTYPE(pParam->fParam) == OP_PARM_p \
                     &&  pOp->uOpcode != OP_LDS /* table bugs? */ \
                     &&  pOp->uOpcode != OP_LES \
@@ -571,5 +571,5 @@
 #define PUT_SIZE_OVERRIDE() \
             do { \
-                switch (OP_PARM_VSUBTYPE(pParam->param)) \
+                switch (OP_PARM_VSUBTYPE(pParam->fParam)) \
                 { \
                     case OP_PARM_v: \
@@ -587,5 +587,5 @@
                     case OP_PARM_q: PUT_SZ("qword "); break; \
                     case OP_PARM_dq: \
-                        if (OP_PARM_VTYPE(pParam->param) != OP_PARM_W) /* these are 128 bit, pray they are all unambiguous.. */ \
+                        if (OP_PARM_VTYPE(pParam->fParam) != OP_PARM_W) /* these are 128 bit, pray they are all unambiguous.. */ \
                             PUT_SZ("qword "); \
                         break; \
@@ -594,5 +594,5 @@
                     case OP_PARM_z: break; \
                     case OP_PARM_NONE: \
-                        if (    OP_PARM_VTYPE(pParam->param) == OP_PARM_M \
+                        if (    OP_PARM_VTYPE(pParam->fParam) == OP_PARM_M \
                             &&  ((pParam->fUse & DISUSE_REG_FP) || pOp->uOpcode == OP_FLD)) \
                             PUT_SZ("tword "); \
@@ -673,5 +673,5 @@
                             /* Work around mov seg,[mem16]  and mov [mem16],seg as these always make a 16-bit mem
                                while the register variants deals with 16, 32 & 64 in the normal fashion. */
-                            if (    pParam->param != OP_PARM_Ev
+                            if (    pParam->fParam != OP_PARM_Ev
                                 ||  pOp->uOpcode != OP_MOV
                                 ||  (   pOp->fParam1 != OP_PARM_Sw
@@ -808,8 +808,8 @@
                                    )
                                 {
-                                    if (OP_PARM_VSUBTYPE(pParam->param) == OP_PARM_b)
+                                    if (OP_PARM_VSUBTYPE(pParam->fParam) == OP_PARM_b)
                                         PUT_SZ_STRICT("strict byte ", "byte ");
-                                    else if (   OP_PARM_VSUBTYPE(pParam->param) == OP_PARM_v
-                                             || OP_PARM_VSUBTYPE(pParam->param) == OP_PARM_z)
+                                    else if (   OP_PARM_VSUBTYPE(pParam->fParam) == OP_PARM_v
+                                             || OP_PARM_VSUBTYPE(pParam->fParam) == OP_PARM_z)
                                         PUT_SZ_STRICT("strict word ", "word ");
                                 }
@@ -831,8 +831,8 @@
                                     )
                                 {
-                                    if (OP_PARM_VSUBTYPE(pParam->param) == OP_PARM_b)
+                                    if (OP_PARM_VSUBTYPE(pParam->fParam) == OP_PARM_b)
                                         PUT_SZ_STRICT("strict byte ", "byte ");
-                                    else if (   OP_PARM_VSUBTYPE(pParam->param) == OP_PARM_v
-                                             || OP_PARM_VSUBTYPE(pParam->param) == OP_PARM_z)
+                                    else if (   OP_PARM_VSUBTYPE(pParam->fParam) == OP_PARM_v
+                                             || OP_PARM_VSUBTYPE(pParam->fParam) == OP_PARM_z)
                                         PUT_SZ_STRICT("strict dword ", "dword ");
                                 }
Index: /trunk/src/VBox/Disassembler/DisasmReg.cpp
===================================================================
--- /trunk/src/VBox/Disassembler/DisasmReg.cpp	(revision 41739)
+++ /trunk/src/VBox/Disassembler/DisasmReg.cpp	(revision 41740)
@@ -203,5 +203,5 @@
 DISDECL(int) DISGetParamSize(PDISCPUSTATE pCpu, PDISOPPARAM pParam)
 {
-    int subtype = OP_PARM_VSUBTYPE(pParam->param);
+    unsigned subtype = OP_PARM_VSUBTYPE(pParam->fParam);
 
     if (subtype == OP_PARM_v)
@@ -224,5 +224,5 @@
     }
 
-    switch(subtype)
+    switch (subtype)
     {
     case OP_PARM_b: