Index: /trunk/include/VBox/dis.h
===================================================================
--- /trunk/include/VBox/dis.h	(revision 41738)
+++ /trunk/include/VBox/dis.h	(revision 41739)
@@ -503,7 +503,7 @@
     /* Because of pvUser2, put the less frequently used bits at the top for
        now. (Might be better off in the middle?) */
-    DISOPPARAM      param3;
-    DISOPPARAM      param2;
-    DISOPPARAM      param1;
+    DISOPPARAM      Param3;
+    DISOPPARAM      Param2;
+    DISOPPARAM      Param1;
 
     /* off: 0x060 (96) */
Index: /trunk/src/VBox/Disassembler/DisasmCore.cpp
===================================================================
--- /trunk/src/VBox/Disassembler/DisasmCore.cpp	(revision 41738)
+++ /trunk/src/VBox/Disassembler/DisasmCore.cpp	(revision 41739)
@@ -471,7 +471,7 @@
 
     // Should contain the parameter type on input
-    pCpu->param1.param = pOp->fParam1;
-    pCpu->param2.param = pOp->fParam2;
-    pCpu->param3.param = pOp->fParam3;
+    pCpu->Param1.param = pOp->fParam1;
+    pCpu->Param2.param = pOp->fParam2;
+    pCpu->Param3.param = pOp->fParam3;
 
     /* Correct the operand size if the instruction is marked as forced or default 64 bits */
@@ -495,18 +495,18 @@
     if (pOp->idxParse1 != IDX_ParseNop)
     {
-        size += pCpu->pfnDisasmFnTable[pOp->idxParse1](uCodePtr, pOp, &pCpu->param1, pCpu);
-        if (fFiltered == false) pCpu->param1.cb = DISGetParamSize(pCpu, &pCpu->param1);
+        size += pCpu->pfnDisasmFnTable[pOp->idxParse1](uCodePtr, pOp, &pCpu->Param1, pCpu);
+        if (fFiltered == false) pCpu->Param1.cb = DISGetParamSize(pCpu, &pCpu->Param1);
     }
 
     if (pOp->idxParse2 != IDX_ParseNop)
     {
-        size += pCpu->pfnDisasmFnTable[pOp->idxParse2](uCodePtr+size, pOp, &pCpu->param2, pCpu);
-        if (fFiltered == false) pCpu->param2.cb = DISGetParamSize(pCpu, &pCpu->param2);
+        size += pCpu->pfnDisasmFnTable[pOp->idxParse2](uCodePtr+size, pOp, &pCpu->Param2, pCpu);
+        if (fFiltered == false) pCpu->Param2.cb = DISGetParamSize(pCpu, &pCpu->Param2);
     }
 
     if (pOp->idxParse3 != IDX_ParseNop)
     {
-        size += pCpu->pfnDisasmFnTable[pOp->idxParse3](uCodePtr+size, pOp, &pCpu->param3, pCpu);
-        if (fFiltered == false) pCpu->param3.cb = DISGetParamSize(pCpu, &pCpu->param3);
+        size += pCpu->pfnDisasmFnTable[pOp->idxParse3](uCodePtr+size, pOp, &pCpu->Param3, pCpu);
+        if (fFiltered == false) pCpu->Param3.cb = DISGetParamSize(pCpu, &pCpu->Param3);
     }
     // else simple one byte instruction
@@ -534,6 +534,6 @@
 
         // Should contain the parameter type on input
-        pCpu->param1.param = fpop->fParam1;
-        pCpu->param2.param = fpop->fParam2;
+        pCpu->Param1.param = fpop->fParam1;
+        pCpu->Param2.param = fpop->fParam2;
     }
     else
@@ -1569,5 +1569,5 @@
             pParam->base.reg_gen = pParam->param - OP_PARM_REG_GEN32_START;
             if (    (pOp->fOpType & DISOPTYPE_REXB_EXTENDS_OPREG)
-                &&  pParam == &pCpu->param1             /* ugly assumption that it only applies to the first parameter */
+                &&  pParam == &pCpu->Param1             /* ugly assumption that it only applies to the first parameter */
                 &&  (pCpu->fPrefix & DISPREFIX_REX)
                 &&  (pCpu->fRexPrefix & DISPREFIX_REX_FLAGS))
@@ -1613,5 +1613,5 @@
         {
             if (    (pOp->fOpType & DISOPTYPE_REXB_EXTENDS_OPREG)
-                &&  pParam == &pCpu->param1             /* ugly assumption that it only applies to the first parameter */
+                &&  pParam == &pCpu->Param1             /* ugly assumption that it only applies to the first parameter */
                 &&  (pCpu->fPrefix & DISPREFIX_REX)
                 &&  (pCpu->fRexPrefix & DISPREFIX_REX_FLAGS))
@@ -2655,5 +2655,5 @@
         case OP_XCHG:
         case OP_XOR:
-            if (pCpu->param1.fUse & (DISUSE_BASE | DISUSE_INDEX | DISUSE_DISPLACEMENT64 | DISUSE_DISPLACEMENT32
+            if (pCpu->Param1.fUse & (DISUSE_BASE | DISUSE_INDEX | DISUSE_DISPLACEMENT64 | DISUSE_DISPLACEMENT32
                                      | DISUSE_DISPLACEMENT16 | DISUSE_DISPLACEMENT8 | DISUSE_RIPDISPLACEMENT32))
                 return;
Index: /trunk/src/VBox/Disassembler/DisasmFormatYasm.cpp
===================================================================
--- /trunk/src/VBox/Disassembler/DisasmFormatYasm.cpp	(revision 41738)
+++ /trunk/src/VBox/Disassembler/DisasmFormatYasm.cpp	(revision 41739)
@@ -543,9 +543,9 @@
             case OP_FLD:
                 if (pCpu->bOpCode == 0xdb) /* m80fp workaround. */
-                    *(int *)&pCpu->param1.param &= ~0x1f; /* make it pure OP_PARM_M */
+                    *(int *)&pCpu->Param1.param &= ~0x1f; /* make it pure OP_PARM_M */
                 break;
             case OP_LAR: /* hack w -> v, probably not correct. */
-                *(int *)&pCpu->param2.param &= ~0x1f;
-                *(int *)&pCpu->param2.param |= OP_PARM_v;
+                *(int *)&pCpu->Param2.param &= ~0x1f;
+                *(int *)&pCpu->Param2.param |= OP_PARM_v;
                 break;
         }
@@ -554,5 +554,5 @@
          * Formatting context and associated macros.
          */
-        PCDISOPPARAM pParam = &pCpu->param1;
+        PCDISOPPARAM pParam = &pCpu->Param1;
         int iParam = 1;
 
@@ -613,7 +613,7 @@
          */
         if (    (pCpu->fPrefix & DISPREFIX_SEG)
-            &&  !DISUSE_IS_EFFECTIVE_ADDR(pCpu->param1.fUse)
-            &&  !DISUSE_IS_EFFECTIVE_ADDR(pCpu->param2.fUse)
-            &&  !DISUSE_IS_EFFECTIVE_ADDR(pCpu->param3.fUse))
+            &&  !DISUSE_IS_EFFECTIVE_ADDR(pCpu->Param1.fUse)
+            &&  !DISUSE_IS_EFFECTIVE_ADDR(pCpu->Param2.fUse)
+            &&  !DISUSE_IS_EFFECTIVE_ADDR(pCpu->Param3.fUse))
         {
             PUT_STR(s_szSegPrefix[pCpu->idxSegPrefix], 2);
@@ -1113,6 +1113,6 @@
                     switch (++iParam)
                     {
-                        case 2: pParam = &pCpu->param2; break;
-                        case 3: pParam = &pCpu->param3; break;
+                        case 2: pParam = &pCpu->Param2; break;
+                        case 3: pParam = &pCpu->Param3; break;
                         default: pParam = NULL; break;
                     }
@@ -1292,7 +1292,7 @@
         /* no effective address which it may apply to. */
         Assert((pCpu->fPrefix & DISPREFIX_SEG) || pCpu->uCpuMode == DISCPUMODE_64BIT);
-        if (    !DISUSE_IS_EFFECTIVE_ADDR(pCpu->param1.fUse)
-            &&  !DISUSE_IS_EFFECTIVE_ADDR(pCpu->param2.fUse)
-            &&  !DISUSE_IS_EFFECTIVE_ADDR(pCpu->param3.fUse))
+        if (    !DISUSE_IS_EFFECTIVE_ADDR(pCpu->Param1.fUse)
+            &&  !DISUSE_IS_EFFECTIVE_ADDR(pCpu->Param2.fUse)
+            &&  !DISUSE_IS_EFFECTIVE_ADDR(pCpu->Param3.fUse))
             return true;
     }
@@ -1449,5 +1449,5 @@
     /* shl eax,1 will be assembled to the form without the immediate byte. */
     if (    pCpu->pCurInstr->fParam2 == OP_PARM_Ib
-        &&  (uint8_t)pCpu->param2.parval == 1)
+        &&  (uint8_t)pCpu->Param2.parval == 1)
     {
         switch (pCpu->pCurInstr->uOpcode)
Index: /trunk/src/VBox/VMM/VMMAll/EMAll.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMAll/EMAll.cpp	(revision 41738)
+++ /trunk/src/VBox/VMM/VMMAll/EMAll.cpp	(revision 41739)
@@ -809,9 +809,9 @@
 
     /* Source to make DISQueryParamVal read the register value - ugly hack */
-    int rc = DISQueryParamVal(pRegFrame, pDis, &pDis->param1, &param1, DISQPVWHICH_SRC);
+    int rc = DISQueryParamVal(pRegFrame, pDis, &pDis->Param1, &param1, DISQPVWHICH_SRC);
     if(RT_FAILURE(rc))
         return VERR_EM_INTERPRETER;
 
-    rc = DISQueryParamVal(pRegFrame, pDis, &pDis->param2, &param2, DISQPVWHICH_SRC);
+    rc = DISQueryParamVal(pRegFrame, pDis, &pDis->Param2, &param2, DISQPVWHICH_SRC);
     if(RT_FAILURE(rc))
         return VERR_EM_INTERPRETER;
@@ -826,5 +826,5 @@
             uint64_t valpar1, valpar2;
 
-            AssertReturn(pDis->param1.cb == pDis->param2.cb, VERR_EM_INTERPRETER);
+            AssertReturn(pDis->Param1.cb == pDis->Param2.cb, VERR_EM_INTERPRETER);
             switch(param1.type)
             {
@@ -835,5 +835,5 @@
             case DISQPV_TYPE_ADDRESS:
                 pParam1 = (RTGCPTR)param1.val.val64;
-                pParam1 = emConvertToFlatAddr(pVM, pRegFrame, pDis, &pDis->param1, pParam1);
+                pParam1 = emConvertToFlatAddr(pVM, pRegFrame, pDis, &pDis->Param1, pParam1);
                 EM_ASSERT_FAULT_RETURN(pParam1 == pvFault, VERR_EM_INTERPRETER);
                 rc = emRamRead(pVM, pVCpu, pRegFrame, &valpar1, pParam1, param1.size);
@@ -854,5 +854,5 @@
             case DISQPV_TYPE_ADDRESS:
                 pParam2 = (RTGCPTR)param2.val.val64;
-                pParam2 = emConvertToFlatAddr(pVM, pRegFrame, pDis, &pDis->param2, pParam2);
+                pParam2 = emConvertToFlatAddr(pVM, pRegFrame, pDis, &pDis->Param2, pParam2);
                 EM_ASSERT_FAULT_RETURN(pParam2 == pvFault, VERR_EM_INTERPRETER);
                 rc = emRamRead(pVM, pVCpu, pRegFrame, &valpar2, pParam2, param2.size);
@@ -879,8 +879,8 @@
                 {
                 case 1: //special case for AH etc
-                        rc = DISWriteReg8(pRegFrame, pDis->param1.base.reg_gen,  (uint8_t )valpar2); break;
-                case 2: rc = DISWriteReg16(pRegFrame, pDis->param1.base.reg_gen, (uint16_t)valpar2); break;
-                case 4: rc = DISWriteReg32(pRegFrame, pDis->param1.base.reg_gen, (uint32_t)valpar2); break;
-                case 8: rc = DISWriteReg64(pRegFrame, pDis->param1.base.reg_gen, valpar2); break;
+                        rc = DISWriteReg8(pRegFrame, pDis->Param1.base.reg_gen,  (uint8_t )valpar2); break;
+                case 2: rc = DISWriteReg16(pRegFrame, pDis->Param1.base.reg_gen, (uint16_t)valpar2); break;
+                case 4: rc = DISWriteReg32(pRegFrame, pDis->Param1.base.reg_gen, (uint32_t)valpar2); break;
+                case 8: rc = DISWriteReg64(pRegFrame, pDis->Param1.base.reg_gen, valpar2); break;
                 default: AssertFailedReturn(VERR_EM_INTERPRETER);
                 }
@@ -905,8 +905,8 @@
                 {
                 case 1: //special case for AH etc
-                        rc = DISWriteReg8(pRegFrame, pDis->param2.base.reg_gen,  (uint8_t )valpar1);    break;
-                case 2: rc = DISWriteReg16(pRegFrame, pDis->param2.base.reg_gen, (uint16_t)valpar1);    break;
-                case 4: rc = DISWriteReg32(pRegFrame, pDis->param2.base.reg_gen, (uint32_t)valpar1);    break;
-                case 8: rc = DISWriteReg64(pRegFrame, pDis->param2.base.reg_gen, valpar1);              break;
+                        rc = DISWriteReg8(pRegFrame, pDis->Param2.base.reg_gen,  (uint8_t )valpar1);    break;
+                case 2: rc = DISWriteReg16(pRegFrame, pDis->Param2.base.reg_gen, (uint16_t)valpar1);    break;
+                case 4: rc = DISWriteReg32(pRegFrame, pDis->Param2.base.reg_gen, (uint32_t)valpar1);    break;
+                case 8: rc = DISWriteReg64(pRegFrame, pDis->Param2.base.reg_gen, valpar1);              break;
                 default: AssertFailedReturn(VERR_EM_INTERPRETER);
                 }
@@ -943,5 +943,5 @@
     NOREF(pvFault);
 
-    int rc = DISQueryParamVal(pRegFrame, pDis, &pDis->param1, &param1, DISQPVWHICH_DST);
+    int rc = DISQueryParamVal(pRegFrame, pDis, &pDis->Param1, &param1, DISQPVWHICH_DST);
     if(RT_FAILURE(rc))
         return VERR_EM_INTERPRETER;
@@ -959,5 +959,5 @@
             {
                 pParam1 = (RTGCPTR)param1.val.val64;
-                pParam1 = emConvertToFlatAddr(pVM, pRegFrame, pDis, &pDis->param1, pParam1);
+                pParam1 = emConvertToFlatAddr(pVM, pRegFrame, pDis, &pDis->Param1, pParam1);
 #ifdef IN_RC
                 /* Safety check (in theory it could cross a page boundary and fault there though) */
@@ -1013,5 +1013,5 @@
     NOREF(pvFault);
 
-    int rc = DISQueryParamVal(pRegFrame, pDis, &pDis->param1, &param1, DISQPVWHICH_DST);
+    int rc = DISQueryParamVal(pRegFrame, pDis, &pDis->Param1, &param1, DISQPVWHICH_DST);
     if(RT_FAILURE(rc))
         return VERR_EM_INTERPRETER;
@@ -1049,11 +1049,11 @@
                 /* pop [esp+xx] uses esp after the actual pop! */
                 AssertCompile(DISGREG_ESP == DISGREG_SP);
-                if (    (pDis->param1.fUse & DISUSE_BASE)
-                    &&  (pDis->param1.fUse & (DISUSE_REG_GEN16|DISUSE_REG_GEN32))
-                    &&  pDis->param1.base.reg_gen == DISGREG_ESP
+                if (    (pDis->Param1.fUse & DISUSE_BASE)
+                    &&  (pDis->Param1.fUse & (DISUSE_REG_GEN16|DISUSE_REG_GEN32))
+                    &&  pDis->Param1.base.reg_gen == DISGREG_ESP
                    )
                    pParam1 = (RTGCPTR)((RTGCUINTPTR)pParam1 + param1.size);
 
-                pParam1 = emConvertToFlatAddr(pVM, pRegFrame, pDis, &pDis->param1, pParam1);
+                pParam1 = emConvertToFlatAddr(pVM, pRegFrame, pDis, &pDis->Param1, pParam1);
                 EM_ASSERT_FAULT_RETURN(pParam1 == pvFault || (RTGCPTR)pRegFrame->esp == pvFault, VERR_EM_INTERPRETER);
                 rc = emRamWrite(pVM, pVCpu, pRegFrame, pParam1, &valpar1, param1.size);
@@ -1095,9 +1095,9 @@
     NOREF(pvFault);
 
-    int rc = DISQueryParamVal(pRegFrame, pDis, &pDis->param1, &param1, DISQPVWHICH_DST);
+    int rc = DISQueryParamVal(pRegFrame, pDis, &pDis->Param1, &param1, DISQPVWHICH_DST);
     if(RT_FAILURE(rc))
         return VERR_EM_INTERPRETER;
 
-    rc = DISQueryParamVal(pRegFrame, pDis, &pDis->param2, &param2, DISQPVWHICH_SRC);
+    rc = DISQueryParamVal(pRegFrame, pDis, &pDis->Param2, &param2, DISQPVWHICH_SRC);
     if(RT_FAILURE(rc))
         return VERR_EM_INTERPRETER;
@@ -1112,13 +1112,13 @@
             uint64_t valpar1, valpar2;
 
-            if (pDis->param1.cb != pDis->param2.cb)
+            if (pDis->Param1.cb != pDis->Param2.cb)
             {
-                if (pDis->param1.cb < pDis->param2.cb)
+                if (pDis->Param1.cb < pDis->Param2.cb)
                 {
-                    AssertMsgFailed(("%s at %RGv parameter mismatch %d vs %d!!\n", emGetMnemonic(pDis), (RTGCPTR)pRegFrame->rip, pDis->param1.cb, pDis->param2.cb)); /* should never happen! */
+                    AssertMsgFailed(("%s at %RGv parameter mismatch %d vs %d!!\n", emGetMnemonic(pDis), (RTGCPTR)pRegFrame->rip, pDis->Param1.cb, pDis->Param2.cb)); /* should never happen! */
                     return VERR_EM_INTERPRETER;
                 }
                 /* Or %Ev, Ib -> just a hack to save some space; the data width of the 1st parameter determines the real width */
-                pDis->param2.cb = pDis->param1.cb;
+                pDis->Param2.cb = pDis->Param1.cb;
                 param2.size     = param1.size;
             }
@@ -1128,5 +1128,5 @@
             {
                 pParam1 = (RTGCPTR)param1.val.val64;
-                pParam1 = emConvertToFlatAddr(pVM, pRegFrame, pDis, &pDis->param1, pParam1);
+                pParam1 = emConvertToFlatAddr(pVM, pRegFrame, pDis, &pDis->Param1, pParam1);
                 EM_ASSERT_FAULT_RETURN(pParam1 == pvFault, VERR_EM_INTERPRETER);
                 rc = emRamRead(pVM, pVCpu, pRegFrame, &valpar1, pParam1, param1.size);
@@ -1193,23 +1193,23 @@
 
 #if HC_ARCH_BITS == 32 && !defined(VBOX_WITH_HYBRID_32BIT_KERNEL_IN_R0)
-    Assert(pDis->param1.cb <= 4);
-#endif
-
-    int rc = DISQueryParamVal(pRegFrame, pDis, &pDis->param1, &param1, DISQPVWHICH_DST);
+    Assert(pDis->Param1.cb <= 4);
+#endif
+
+    int rc = DISQueryParamVal(pRegFrame, pDis, &pDis->Param1, &param1, DISQPVWHICH_DST);
     if(RT_FAILURE(rc))
         return VERR_EM_INTERPRETER;
 
-    rc = DISQueryParamVal(pRegFrame, pDis, &pDis->param2, &param2, DISQPVWHICH_SRC);
+    rc = DISQueryParamVal(pRegFrame, pDis, &pDis->Param2, &param2, DISQPVWHICH_SRC);
     if(RT_FAILURE(rc))
         return VERR_EM_INTERPRETER;
 
-    if (pDis->param1.cb != pDis->param2.cb)
-    {
-        AssertMsgReturn(pDis->param1.cb >= pDis->param2.cb, /* should never happen! */
-                        ("%s at %RGv parameter mismatch %d vs %d!!\n", emGetMnemonic(pDis), (RTGCPTR)pRegFrame->rip, pDis->param1.cb, pDis->param2.cb),
+    if (pDis->Param1.cb != pDis->Param2.cb)
+    {
+        AssertMsgReturn(pDis->Param1.cb >= pDis->Param2.cb, /* should never happen! */
+                        ("%s at %RGv parameter mismatch %d vs %d!!\n", emGetMnemonic(pDis), (RTGCPTR)pRegFrame->rip, pDis->Param1.cb, pDis->Param2.cb),
                         VERR_EM_INTERPRETER);
 
         /* Or %Ev, Ib -> just a hack to save some space; the data width of the 1st parameter determines the real width */
-        pDis->param2.cb = pDis->param1.cb;
+        pDis->Param2.cb = pDis->Param1.cb;
         param2.size       = param1.size;
     }
@@ -1230,5 +1230,5 @@
 
     RTGCPTR GCPtrPar1 = param1.val.val64;
-    GCPtrPar1 = emConvertToFlatAddr(pVM, pRegFrame, pDis, &pDis->param1, GCPtrPar1);
+    GCPtrPar1 = emConvertToFlatAddr(pVM, pRegFrame, pDis, &pDis->Param1, GCPtrPar1);
     PGMPAGEMAPLOCK Lock;
     rc = PGMPhysGCPtr2CCPtr(pVCpu, GCPtrPar1, &pvParam1, &Lock);
@@ -1236,12 +1236,12 @@
 
     /* Try emulate it with a one-shot #PF handler in place. (RC) */
-    Log2(("%s %RGv imm%d=%RX64\n", emGetMnemonic(pDis), GCPtrPar1, pDis->param2.cb*8, ValPar2));
+    Log2(("%s %RGv imm%d=%RX64\n", emGetMnemonic(pDis), GCPtrPar1, pDis->Param2.cb*8, ValPar2));
 
     RTGCUINTREG32 eflags = 0;
-    rc = pfnEmulate(pvParam1, ValPar2, pDis->param2.cb, &eflags);
+    rc = pfnEmulate(pvParam1, ValPar2, pDis->Param2.cb, &eflags);
     PGMPhysReleasePageMappingLock(pVM, &Lock);
     if (RT_FAILURE(rc))
     {
-        Log(("%s %RGv imm%d=%RX64-> emulation failed due to page fault!\n", emGetMnemonic(pDis), GCPtrPar1, pDis->param2.cb*8, ValPar2));
+        Log(("%s %RGv imm%d=%RX64-> emulation failed due to page fault!\n", emGetMnemonic(pDis), GCPtrPar1, pDis->Param2.cb*8, ValPar2));
         return VERR_EM_INTERPRETER;
     }
@@ -1264,9 +1264,9 @@
     NOREF(pvFault);
     DISQPVPARAMVAL param1, param2;
-    int rc = DISQueryParamVal(pRegFrame, pDis, &pDis->param1, &param1, DISQPVWHICH_DST);
+    int rc = DISQueryParamVal(pRegFrame, pDis, &pDis->Param1, &param1, DISQPVWHICH_DST);
     if(RT_FAILURE(rc))
         return VERR_EM_INTERPRETER;
 
-    rc = DISQueryParamVal(pRegFrame, pDis, &pDis->param2, &param2, DISQPVWHICH_SRC);
+    rc = DISQueryParamVal(pRegFrame, pDis, &pDis->Param2, &param2, DISQPVWHICH_SRC);
     if(RT_FAILURE(rc))
         return VERR_EM_INTERPRETER;
@@ -1281,13 +1281,13 @@
             uint64_t valpar1, valpar2;
 
-            if (pDis->param1.cb != pDis->param2.cb)
+            if (pDis->Param1.cb != pDis->Param2.cb)
             {
-                if (pDis->param1.cb < pDis->param2.cb)
+                if (pDis->Param1.cb < pDis->Param2.cb)
                 {
-                    AssertMsgFailed(("%s at %RGv parameter mismatch %d vs %d!!\n", emGetMnemonic(pDis), (RTGCPTR)pRegFrame->rip, pDis->param1.cb, pDis->param2.cb)); /* should never happen! */
+                    AssertMsgFailed(("%s at %RGv parameter mismatch %d vs %d!!\n", emGetMnemonic(pDis), (RTGCPTR)pRegFrame->rip, pDis->Param1.cb, pDis->Param2.cb)); /* should never happen! */
                     return VERR_EM_INTERPRETER;
                 }
                 /* Or %Ev, Ib -> just a hack to save some space; the data width of the 1st parameter determines the real width */
-                pDis->param2.cb = pDis->param1.cb;
+                pDis->Param2.cb = pDis->Param1.cb;
                 param2.size     = param1.size;
             }
@@ -1297,5 +1297,5 @@
             {
                 pParam1 = (RTGCPTR)param1.val.val64;
-                pParam1 = emConvertToFlatAddr(pVM, pRegFrame, pDis, &pDis->param1, pParam1);
+                pParam1 = emConvertToFlatAddr(pVM, pRegFrame, pDis, &pDis->Param1, pParam1);
                 EM_ASSERT_FAULT_RETURN(pParam1 == pvFault, VERR_EM_INTERPRETER);
                 rc = emRamRead(pVM, pVCpu, pRegFrame, &valpar1, pParam1, param1.size);
@@ -1368,9 +1368,9 @@
 {
     DISQPVPARAMVAL param1, param2;
-    int rc = DISQueryParamVal(pRegFrame, pDis, &pDis->param1, &param1, DISQPVWHICH_DST);
+    int rc = DISQueryParamVal(pRegFrame, pDis, &pDis->Param1, &param1, DISQPVWHICH_DST);
     if(RT_FAILURE(rc))
         return VERR_EM_INTERPRETER;
 
-    rc = DISQueryParamVal(pRegFrame, pDis, &pDis->param2, &param2, DISQPVWHICH_SRC);
+    rc = DISQueryParamVal(pRegFrame, pDis, &pDis->Param2, &param2, DISQPVWHICH_SRC);
     if(RT_FAILURE(rc))
         return VERR_EM_INTERPRETER;
@@ -1391,5 +1391,5 @@
 
             pParam1 = (RTGCPTR)param1.val.val64;
-            pParam1 = emConvertToFlatAddr(pVM, pRegFrame, pDis, &pDis->param1, pParam1);
+            pParam1 = emConvertToFlatAddr(pVM, pRegFrame, pDis, &pDis->Param1, pParam1);
 
             /* Register or immediate data */
@@ -1450,9 +1450,9 @@
 
     DISQPVPARAMVAL param1, param2;
-    int rc = DISQueryParamVal(pRegFrame, pDis, &pDis->param1, &param1, DISQPVWHICH_DST);
+    int rc = DISQueryParamVal(pRegFrame, pDis, &pDis->Param1, &param1, DISQPVWHICH_DST);
     if(RT_FAILURE(rc))
         return VERR_EM_INTERPRETER;
 
-    rc = DISQueryParamVal(pRegFrame, pDis, &pDis->param2, &param2, DISQPVWHICH_SRC);
+    rc = DISQueryParamVal(pRegFrame, pDis, &pDis->Param2, &param2, DISQPVWHICH_SRC);
     if(RT_FAILURE(rc))
         return VERR_EM_INTERPRETER;
@@ -1471,5 +1471,5 @@
     ValPar2 &= 7;
 
-    GCPtrPar1 = emConvertToFlatAddr(pVM, pRegFrame, pDis, &pDis->param1, GCPtrPar1);
+    GCPtrPar1 = emConvertToFlatAddr(pVM, pRegFrame, pDis, &pDis->Param1, GCPtrPar1);
 #ifdef IN_RC
     Assert(TRPMHasTrap(pVCpu));
@@ -1490,5 +1490,5 @@
     {
         Log(("emInterpretLockBitTest %s: %RGv imm%d=%RX64 -> emulation failed due to page fault!\n",
-             emGetMnemonic(pDis), GCPtrPar1, pDis->param2.cb*8, ValPar2));
+             emGetMnemonic(pDis), GCPtrPar1, pDis->Param2.cb*8, ValPar2));
         return VERR_EM_INTERPRETER;
     }
@@ -1512,9 +1512,9 @@
     NOREF(pvFault);
     DISQPVPARAMVAL param1, param2;
-    int rc = DISQueryParamVal(pRegFrame, pDis, &pDis->param1, &param1, DISQPVWHICH_DST);
+    int rc = DISQueryParamVal(pRegFrame, pDis, &pDis->Param1, &param1, DISQPVWHICH_DST);
     if(RT_FAILURE(rc))
         return VERR_EM_INTERPRETER;
 
-    rc = DISQueryParamVal(pRegFrame, pDis, &pDis->param2, &param2, DISQPVWHICH_SRC);
+    rc = DISQueryParamVal(pRegFrame, pDis, &pDis->Param2, &param2, DISQPVWHICH_SRC);
     if(RT_FAILURE(rc))
         return VERR_EM_INTERPRETER;
@@ -1542,5 +1542,5 @@
             case DISQPV_TYPE_ADDRESS:
                 pDest = (RTGCPTR)param1.val.val64;
-                pDest = emConvertToFlatAddr(pVM, pRegFrame, pDis, &pDis->param1, pDest);
+                pDest = emConvertToFlatAddr(pVM, pRegFrame, pDis, &pDis->Param1, pDest);
                 break;
 
@@ -1590,5 +1590,5 @@
             case DISQPV_TYPE_ADDRESS:
                 pSrc = (RTGCPTR)param2.val.val64;
-                pSrc = emConvertToFlatAddr(pVM, pRegFrame, pDis, &pDis->param2, pSrc);
+                pSrc = emConvertToFlatAddr(pVM, pRegFrame, pDis, &pDis->Param2, pSrc);
                 break;
 
@@ -1609,8 +1609,8 @@
                 switch(param1.size)
                 {
-                case 1: rc = DISWriteReg8(pRegFrame, pDis->param1.base.reg_gen,  (uint8_t) val64); break;
-                case 2: rc = DISWriteReg16(pRegFrame, pDis->param1.base.reg_gen, (uint16_t)val64); break;
-                case 4: rc = DISWriteReg32(pRegFrame, pDis->param1.base.reg_gen, (uint32_t)val64); break;
-                case 8: rc = DISWriteReg64(pRegFrame, pDis->param1.base.reg_gen, val64); break;
+                case 1: rc = DISWriteReg8(pRegFrame, pDis->Param1.base.reg_gen,  (uint8_t) val64); break;
+                case 2: rc = DISWriteReg16(pRegFrame, pDis->Param1.base.reg_gen, (uint16_t)val64); break;
+                case 4: rc = DISWriteReg32(pRegFrame, pDis->Param1.base.reg_gen, (uint32_t)val64); break;
+                case 8: rc = DISWriteReg64(pRegFrame, pDis->Param1.base.reg_gen, val64); break;
                 default:
                     return VERR_EM_INTERPRETER;
@@ -1803,13 +1803,13 @@
 
 #if HC_ARCH_BITS == 32 && !defined(VBOX_WITH_HYBRID_32BIT_KERNEL_IN_R0)
-    Assert(pDis->param1.cb <= 4);
+    Assert(pDis->Param1.cb <= 4);
 #endif
 
     /* Source to make DISQueryParamVal read the register value - ugly hack */
-    int rc = DISQueryParamVal(pRegFrame, pDis, &pDis->param1, &param1, DISQPVWHICH_SRC);
+    int rc = DISQueryParamVal(pRegFrame, pDis, &pDis->Param1, &param1, DISQPVWHICH_SRC);
     if(RT_FAILURE(rc))
         return VERR_EM_INTERPRETER;
 
-    rc = DISQueryParamVal(pRegFrame, pDis, &pDis->param2, &param2, DISQPVWHICH_SRC);
+    rc = DISQueryParamVal(pRegFrame, pDis, &pDis->Param2, &param2, DISQPVWHICH_SRC);
     if(RT_FAILURE(rc))
         return VERR_EM_INTERPRETER;
@@ -1831,10 +1831,10 @@
     uint64_t eflags;
 
-    AssertReturn(pDis->param1.cb == pDis->param2.cb, VERR_EM_INTERPRETER);
+    AssertReturn(pDis->Param1.cb == pDis->Param2.cb, VERR_EM_INTERPRETER);
     switch(param1.type)
     {
     case DISQPV_TYPE_ADDRESS:
         GCPtrPar1 = param1.val.val64;
-        GCPtrPar1 = emConvertToFlatAddr(pVM, pRegFrame, pDis, &pDis->param1, GCPtrPar1);
+        GCPtrPar1 = emConvertToFlatAddr(pVM, pRegFrame, pDis, &pDis->Param1, GCPtrPar1);
 
         rc = PGMPhysGCPtr2CCPtr(pVCpu, GCPtrPar1, &pvParam1, &Lock);
@@ -1849,7 +1849,7 @@
 
     if (pDis->fPrefix & DISPREFIX_LOCK)
-        eflags = EMEmulateLockCmpXchg(pvParam1, &pRegFrame->rax, valpar, pDis->param2.cb);
+        eflags = EMEmulateLockCmpXchg(pvParam1, &pRegFrame->rax, valpar, pDis->Param2.cb);
     else
-        eflags = EMEmulateCmpXchg(pvParam1, &pRegFrame->rax, valpar, pDis->param2.cb);
+        eflags = EMEmulateCmpXchg(pvParam1, &pRegFrame->rax, valpar, pDis->Param2.cb);
 
     LogFlow(("%s %RGv rax=%RX64 %RX64 ZF=%d\n", emGetMnemonic(pDis), GCPtrPar1, pRegFrame->rax, valpar, !!(eflags & X86_EFL_ZF)));
@@ -1875,5 +1875,5 @@
 
     /* Source to make DISQueryParamVal read the register value - ugly hack */
-    int rc = DISQueryParamVal(pRegFrame, pDis, &pDis->param1, &param1, DISQPVWHICH_SRC);
+    int rc = DISQueryParamVal(pRegFrame, pDis, &pDis->Param1, &param1, DISQPVWHICH_SRC);
     if(RT_FAILURE(rc))
         return VERR_EM_INTERPRETER;
@@ -1884,10 +1884,10 @@
     PGMPAGEMAPLOCK Lock;
 
-    AssertReturn(pDis->param1.cb == 8, VERR_EM_INTERPRETER);
+    AssertReturn(pDis->Param1.cb == 8, VERR_EM_INTERPRETER);
     switch(param1.type)
     {
     case DISQPV_TYPE_ADDRESS:
         GCPtrPar1 = param1.val.val64;
-        GCPtrPar1 = emConvertToFlatAddr(pVM, pRegFrame, pDis, &pDis->param1, GCPtrPar1);
+        GCPtrPar1 = emConvertToFlatAddr(pVM, pRegFrame, pDis, &pDis->Param1, GCPtrPar1);
 
         rc = PGMPhysGCPtr2CCPtr(pVCpu, GCPtrPar1, &pvParam1, &Lock);
@@ -1931,9 +1931,9 @@
 
     /* Source to make DISQueryParamVal read the register value - ugly hack */
-    int rc = DISQueryParamVal(pRegFrame, pDis, &pDis->param1, &param1, DISQPVWHICH_SRC);
+    int rc = DISQueryParamVal(pRegFrame, pDis, &pDis->Param1, &param1, DISQPVWHICH_SRC);
     if(RT_FAILURE(rc))
         return VERR_EM_INTERPRETER;
 
-    rc = DISQueryParamRegPtr(pRegFrame, pDis, &pDis->param2, &pvParamReg2, &cbParamReg2);
+    rc = DISQueryParamRegPtr(pRegFrame, pDis, &pDis->Param2, &pvParamReg2, &cbParamReg2);
     Assert(cbParamReg2 <= 4);
     if(RT_FAILURE(rc))
@@ -1951,9 +1951,9 @@
             PGMPAGEMAPLOCK  Lock;
 
-            AssertReturn(pDis->param1.cb == pDis->param2.cb, VERR_EM_INTERPRETER);
+            AssertReturn(pDis->Param1.cb == pDis->Param2.cb, VERR_EM_INTERPRETER);
             switch(param1.type)
             {
             case DISQPV_TYPE_ADDRESS:
-                GCPtrPar1 = emConvertToFlatAddr(pVM, pRegFrame, pDis, &pDis->param1, (RTRCUINTPTR)param1.val.val64);
+                GCPtrPar1 = emConvertToFlatAddr(pVM, pRegFrame, pDis, &pDis->Param1, (RTRCUINTPTR)param1.val.val64);
 #ifdef IN_RC
                 EM_ASSERT_FAULT_RETURN(GCPtrPar1 == pvFault, VERR_EM_INTERPRETER);
@@ -2054,5 +2054,5 @@
     NOREF(pvFault); NOREF(pVM); NOREF(pcbSize);
 
-    VBOXSTRICTRC rc = DISQueryParamVal(pRegFrame, pDis, &pDis->param1, &param1, DISQPVWHICH_SRC);
+    VBOXSTRICTRC rc = DISQueryParamVal(pRegFrame, pDis, &pDis->Param1, &param1, DISQPVWHICH_SRC);
     if(RT_FAILURE(rc))
         return VERR_EM_INTERPRETER;
@@ -2389,5 +2389,5 @@
     NOREF(pvFault); NOREF(pcbSize);
 
-    int rc = DISQueryParamVal(pRegFrame, pDis, &pDis->param1, &param1, DISQPVWHICH_SRC);
+    int rc = DISQueryParamVal(pRegFrame, pDis, &pDis->Param1, &param1, DISQPVWHICH_SRC);
     if(RT_FAILURE(rc))
         return VERR_EM_INTERPRETER;
@@ -2419,5 +2419,5 @@
     uint64_t    cr0 = CPUMGetGuestCR0(pVCpu);
 
-    int rc = DISQueryParamVal(pRegFrame, pDis, &pDis->param1, &param1, DISQPVWHICH_SRC);
+    int rc = DISQueryParamVal(pRegFrame, pDis, &pDis->Param1, &param1, DISQPVWHICH_SRC);
     if(RT_FAILURE(rc))
         return VERR_EM_INTERPRETER;
@@ -2428,6 +2428,6 @@
         if(param1.size != sizeof(uint16_t))
             return VERR_EM_INTERPRETER;
-        LogFlow(("emInterpretSmsw %d <- cr0 (%x)\n", pDis->param1.base.reg_gen, cr0));
-        rc = DISWriteReg16(pRegFrame, pDis->param1.base.reg_gen, cr0);
+        LogFlow(("emInterpretSmsw %d <- cr0 (%x)\n", pDis->Param1.base.reg_gen, cr0));
+        rc = DISWriteReg16(pRegFrame, pDis->Param1.base.reg_gen, cr0);
         break;
 
@@ -2441,5 +2441,5 @@
 
         pParam1 = (RTGCPTR)param1.val.val64;
-        pParam1 = emConvertToFlatAddr(pVM, pRegFrame, pDis, &pDis->param1, pParam1);
+        pParam1 = emConvertToFlatAddr(pVM, pRegFrame, pDis, &pDis->Param1, pParam1);
         LogFlow(("emInterpretSmsw %RGv <- cr0 (%x)\n", pParam1, cr0));
 
@@ -2468,9 +2468,9 @@
 {
     NOREF(pvFault); NOREF(pcbSize);
-    if ((pDis->param1.fUse == DISUSE_REG_GEN32 || pDis->param1.fUse == DISUSE_REG_GEN64) && pDis->param2.fUse == DISUSE_REG_CR)
-        return EMInterpretCRxRead(pVM, pVCpu, pRegFrame, pDis->param1.base.reg_gen, pDis->param2.base.reg_ctrl);
-
-    if (pDis->param1.fUse == DISUSE_REG_CR && (pDis->param2.fUse == DISUSE_REG_GEN32 || pDis->param2.fUse == DISUSE_REG_GEN64))
-        return EMInterpretCRxWrite(pVM, pVCpu, pRegFrame, pDis->param1.base.reg_ctrl, pDis->param2.base.reg_gen);
+    if ((pDis->Param1.fUse == DISUSE_REG_GEN32 || pDis->Param1.fUse == DISUSE_REG_GEN64) && pDis->Param2.fUse == DISUSE_REG_CR)
+        return EMInterpretCRxRead(pVM, pVCpu, pRegFrame, pDis->Param1.base.reg_gen, pDis->Param2.base.reg_ctrl);
+
+    if (pDis->Param1.fUse == DISUSE_REG_CR && (pDis->Param2.fUse == DISUSE_REG_GEN32 || pDis->Param2.fUse == DISUSE_REG_GEN64))
+        return EMInterpretCRxWrite(pVM, pVCpu, pRegFrame, pDis->Param1.base.reg_ctrl, pDis->Param2.base.reg_gen);
 
     AssertMsgFailedReturn(("Unexpected control register move\n"), VERR_EM_INTERPRETER);
@@ -2558,12 +2558,12 @@
     NOREF(pvFault); NOREF(pcbSize);
 
-    if((pDis->param1.fUse == DISUSE_REG_GEN32 || pDis->param1.fUse == DISUSE_REG_GEN64) && pDis->param2.fUse == DISUSE_REG_DBG)
-    {
-        rc = EMInterpretDRxRead(pVM, pVCpu, pRegFrame, pDis->param1.base.reg_gen, pDis->param2.base.reg_dbg);
+    if((pDis->Param1.fUse == DISUSE_REG_GEN32 || pDis->Param1.fUse == DISUSE_REG_GEN64) && pDis->Param2.fUse == DISUSE_REG_DBG)
+    {
+        rc = EMInterpretDRxRead(pVM, pVCpu, pRegFrame, pDis->Param1.base.reg_gen, pDis->Param2.base.reg_dbg);
     }
     else
-    if(pDis->param1.fUse == DISUSE_REG_DBG && (pDis->param2.fUse == DISUSE_REG_GEN32 || pDis->param2.fUse == DISUSE_REG_GEN64))
-    {
-        rc = EMInterpretDRxWrite(pVM, pVCpu, pRegFrame, pDis->param1.base.reg_dbg, pDis->param2.base.reg_gen);
+    if(pDis->Param1.fUse == DISUSE_REG_DBG && (pDis->Param2.fUse == DISUSE_REG_GEN32 || pDis->Param2.fUse == DISUSE_REG_GEN64))
+    {
+        rc = EMInterpretDRxWrite(pVM, pVCpu, pRegFrame, pDis->Param1.base.reg_dbg, pDis->Param2.base.reg_gen);
     }
     else
@@ -2583,5 +2583,5 @@
     NOREF(pVM); NOREF(pvFault); NOREF(pcbSize);
 
-    int rc = DISQueryParamVal(pRegFrame, pDis, &pDis->param1, &param1, DISQPVWHICH_SRC);
+    int rc = DISQueryParamVal(pRegFrame, pDis, &pDis->Param1, &param1, DISQPVWHICH_SRC);
     if(RT_FAILURE(rc))
         return VERR_EM_INTERPRETER;
@@ -2637,5 +2637,5 @@
     AssertReturn(CPUMIsGuestInRealMode(pVCpu), VERR_EM_INTERPRETER);
 
-    int rc = DISQueryParamVal(pRegFrame, pDis, &pDis->param1, &param1, DISQPVWHICH_SRC);
+    int rc = DISQueryParamVal(pRegFrame, pDis, &pDis->Param1, &param1, DISQPVWHICH_SRC);
     if(RT_FAILURE(rc))
         return VERR_EM_INTERPRETER;
@@ -2644,5 +2644,5 @@
     {
     case DISQPV_TYPE_ADDRESS:
-        pParam1 = emConvertToFlatAddr(pVM, pRegFrame, pDis, &pDis->param1, param1.val.val16);
+        pParam1 = emConvertToFlatAddr(pVM, pRegFrame, pDis, &pDis->Param1, param1.val.val16);
         break;
 
@@ -3141,5 +3141,5 @@
      * Whitelisted instructions are safe.
      */
-    if (    pDis->param1.cb > 4
+    if (    pDis->Param1.cb > 4
         &&  CPUMIsGuestIn64BitCode(pVCpu, pRegFrame))
     {
Index: /trunk/src/VBox/VMM/VMMAll/IOMAll.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMAll/IOMAll.cpp	(revision 41738)
+++ /trunk/src/VBox/VMM/VMMAll/IOMAll.cpp	(revision 41739)
@@ -958,8 +958,8 @@
     uint64_t    uPort = 0;
     unsigned    cbSize = 0;
-    bool fRc = iomGetRegImmData(pCpu, &pCpu->param2, pRegFrame, &uPort, &cbSize);
+    bool fRc = iomGetRegImmData(pCpu, &pCpu->Param2, pRegFrame, &uPort, &cbSize);
     AssertMsg(fRc, ("Failed to get reg/imm port number!\n")); NOREF(fRc);
 
-    cbSize = DISGetParamSize(pCpu, &pCpu->param1);
+    cbSize = DISGetParamSize(pCpu, &pCpu->Param1);
     Assert(cbSize > 0);
     VBOXSTRICTRC rcStrict = IOMInterpretCheckPortIOAccess(pVM, pRegFrame, uPort, cbSize);
@@ -976,5 +976,5 @@
              * Store the result in the AL|AX|EAX register.
              */
-            fRc = iomSaveDataToReg(pCpu, &pCpu->param1, pRegFrame, u32Data);
+            fRc = iomSaveDataToReg(pCpu, &pCpu->Param1, pRegFrame, u32Data);
             AssertMsg(fRc, ("Failed to store register value!\n")); NOREF(fRc);
         }
@@ -1018,5 +1018,5 @@
     uint64_t    uPort = 0;
     unsigned    cbSize = 0;
-    bool fRc = iomGetRegImmData(pCpu, &pCpu->param1, pRegFrame, &uPort, &cbSize);
+    bool fRc = iomGetRegImmData(pCpu, &pCpu->Param1, pRegFrame, &uPort, &cbSize);
     AssertMsg(fRc, ("Failed to get reg/imm port number!\n")); NOREF(fRc);
 
@@ -1025,5 +1025,5 @@
     {
         uint64_t u64Data = 0;
-        fRc = iomGetRegImmData(pCpu, &pCpu->param2, pRegFrame, &u64Data, &cbSize);
+        fRc = iomGetRegImmData(pCpu, &pCpu->Param2, pRegFrame, &u64Data, &cbSize);
         AssertMsg(fRc, ("Failed to get reg value!\n")); NOREF(fRc);
 
Index: /trunk/src/VBox/VMM/VMMAll/IOMAllMMIO.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMAll/IOMAllMMIO.cpp	(revision 41738)
+++ /trunk/src/VBox/VMM/VMMAll/IOMAllMMIO.cpp	(revision 41739)
@@ -538,5 +538,5 @@
      * and call the handler function to get the data.
      */
-    unsigned cb = DISGetParamSize(pCpu, &pCpu->param2);
+    unsigned cb = DISGetParamSize(pCpu, &pCpu->Param2);
     AssertMsg(cb > 0 && cb <= sizeof(uint64_t), ("cb=%d\n", cb));
 
@@ -568,5 +568,5 @@
          * Store the result to register (parameter 1).
          */
-        bool fRc = iomSaveDataToReg(pCpu, &pCpu->param1, pRegFrame, u64Data);
+        bool fRc = iomSaveDataToReg(pCpu, &pCpu->Param1, pRegFrame, u64Data);
         AssertMsg(fRc, ("Failed to store register value!\n")); NOREF(fRc);
     }
@@ -599,5 +599,5 @@
     unsigned cb = 0;
     uint64_t u64Data  = 0;
-    bool fRc = iomGetRegImmData(pCpu, &pCpu->param2, pRegFrame, &u64Data, &cb);
+    bool fRc = iomGetRegImmData(pCpu, &pCpu->Param2, pRegFrame, &u64Data, &cb);
     AssertMsg(fRc, ("Failed to get reg/imm port number!\n")); NOREF(fRc);
 
@@ -701,5 +701,5 @@
      * Get data size.
      */
-    unsigned cb = DISGetParamSize(pCpu, &pCpu->param1);
+    unsigned cb = DISGetParamSize(pCpu, &pCpu->Param1);
     AssertMsg(cb > 0 && cb <= sizeof(uint64_t), ("cb=%d\n", cb));
     int      offIncrement = pRegFrame->eflags.Bits.u1DF ? -(signed)cb : (signed)cb;
@@ -954,5 +954,5 @@
      * Get data size.
      */
-    unsigned cb = DISGetParamSize(pCpu, &pCpu->param1);
+    unsigned cb = DISGetParamSize(pCpu, &pCpu->Param1);
     AssertMsg(cb > 0 && cb <= sizeof(uint64_t), ("cb=%d\n", cb));
     int      offIncrement = pRegFrame->eflags.Bits.u1DF ? -(signed)cb : (signed)cb;
@@ -1068,5 +1068,5 @@
      * Get data size.
      */
-    unsigned cb = DISGetParamSize(pCpu, &pCpu->param2);
+    unsigned cb = DISGetParamSize(pCpu, &pCpu->Param2);
     AssertMsg(cb > 0 && cb <= sizeof(uint64_t), ("cb=%d\n", cb));
     int     offIncrement = pRegFrame->eflags.Bits.u1DF ? -(signed)cb : (signed)cb;
@@ -1118,8 +1118,8 @@
     uint64_t uData2 = 0;
     int rc;
-    if (iomGetRegImmData(pCpu, &pCpu->param1, pRegFrame, &uData1, &cb))
+    if (iomGetRegImmData(pCpu, &pCpu->Param1, pRegFrame, &uData1, &cb))
         /* cmp reg, [MMIO]. */
         rc = iomMMIODoRead(pVM, pRange, GCPhysFault, &uData2, cb);
-    else if (iomGetRegImmData(pCpu, &pCpu->param2, pRegFrame, &uData2, &cb))
+    else if (iomGetRegImmData(pCpu, &pCpu->Param2, pRegFrame, &uData2, &cb))
         /* cmp [MMIO], reg|imm. */
         rc = iomMMIODoRead(pVM, pRange, GCPhysFault, &uData1, cb);
@@ -1187,5 +1187,5 @@
 #endif
 
-    if (iomGetRegImmData(pCpu, &pCpu->param1, pRegFrame, &uData1, &cb))
+    if (iomGetRegImmData(pCpu, &pCpu->Param1, pRegFrame, &uData1, &cb))
     {
 #if HC_ARCH_BITS == 32
@@ -1199,5 +1199,5 @@
         rc = iomMMIODoRead(pVM, pRange, GCPhysFault, &uData2, cb);
     }
-    else if (iomGetRegImmData(pCpu, &pCpu->param2, pRegFrame, &uData2, &cb))
+    else if (iomGetRegImmData(pCpu, &pCpu->Param2, pRegFrame, &uData2, &cb))
     {
 #if HC_ARCH_BITS == 32
@@ -1233,5 +1233,5 @@
         {
             /* Store result to register. */
-            bool fRc = iomSaveDataToReg(pCpu, &pCpu->param1, pRegFrame, uData1);
+            bool fRc = iomSaveDataToReg(pCpu, &pCpu->Param1, pRegFrame, uData1);
             AssertMsg(fRc, ("Failed to store register value!\n")); NOREF(fRc);
         }
@@ -1273,10 +1273,10 @@
     int         rc;
 
-    if (iomGetRegImmData(pCpu, &pCpu->param1, pRegFrame, &uData1, &cb))
+    if (iomGetRegImmData(pCpu, &pCpu->Param1, pRegFrame, &uData1, &cb))
     {
         /* and test, [MMIO]. */
         rc = iomMMIODoRead(pVM, pRange, GCPhysFault, &uData2, cb);
     }
-    else if (iomGetRegImmData(pCpu, &pCpu->param2, pRegFrame, &uData2, &cb))
+    else if (iomGetRegImmData(pCpu, &pCpu->Param2, pRegFrame, &uData2, &cb))
     {
         /* test [MMIO], reg|imm. */
@@ -1330,5 +1330,5 @@
     unsigned    cbIgnored;
 
-    if (!iomGetRegImmData(pCpu, &pCpu->param2, pRegFrame, &uBit, &cbIgnored))
+    if (!iomGetRegImmData(pCpu, &pCpu->Param2, pRegFrame, &uBit, &cbIgnored))
     {
         AssertMsgFailed(("Disassember BT problem..\n"));
@@ -1336,5 +1336,5 @@
     }
     /* The size of the memory operand only matters here. */
-    unsigned cbData = DISGetParamSize(pCpu, &pCpu->param1);
+    unsigned cbData = DISGetParamSize(pCpu, &pCpu->Param1);
 
     /* bt [MMIO], reg|imm. */
@@ -1376,5 +1376,5 @@
     uint64_t    uData1 = 0;
     uint64_t    uData2 = 0;
-    if (iomGetRegImmData(pCpu, &pCpu->param1, pRegFrame, &uData1, &cb))
+    if (iomGetRegImmData(pCpu, &pCpu->Param1, pRegFrame, &uData1, &cb))
     {
         /* xchg reg, [MMIO]. */
@@ -1388,5 +1388,5 @@
             {
                 /* Store result to register. */
-                bool fRc = iomSaveDataToReg(pCpu, &pCpu->param1, pRegFrame, uData2);
+                bool fRc = iomSaveDataToReg(pCpu, &pCpu->Param1, pRegFrame, uData2);
                 AssertMsg(fRc, ("Failed to store register value!\n")); NOREF(fRc);
             }
@@ -1397,5 +1397,5 @@
             Assert(rc == VINF_IOM_R3_MMIO_READ || rc == VINF_PATM_HC_MMIO_PATCH_READ);
     }
-    else if (iomGetRegImmData(pCpu, &pCpu->param2, pRegFrame, &uData2, &cb))
+    else if (iomGetRegImmData(pCpu, &pCpu->Param2, pRegFrame, &uData2, &cb))
     {
         /* xchg [MMIO], reg. */
@@ -1408,5 +1408,5 @@
             {
                 /* Store result to register. */
-                bool fRc = iomSaveDataToReg(pCpu, &pCpu->param2, pRegFrame, uData1);
+                bool fRc = iomSaveDataToReg(pCpu, &pCpu->Param2, pRegFrame, uData1);
                 AssertMsg(fRc, ("Failed to store register value!\n")); NOREF(fRc);
             }
@@ -1535,8 +1535,8 @@
         {
             STAM_PROFILE_START(&pVM->iom.s.StatRZInstMov, b);
-            AssertMsg(uErrorCode == UINT32_MAX || DISUSE_IS_EFFECTIVE_ADDR(pDis->param1.fUse) == !!(uErrorCode & X86_TRAP_PF_RW), ("flags1=%#llx/%RTbool flags2=%#llx/%RTbool ErrCd=%#x\n", pDis->param1.fUse, DISUSE_IS_EFFECTIVE_ADDR(pDis->param1.fUse), pDis->param2.fUse, DISUSE_IS_EFFECTIVE_ADDR(pDis->param2.fUse), uErrorCode));
+            AssertMsg(uErrorCode == UINT32_MAX || DISUSE_IS_EFFECTIVE_ADDR(pDis->Param1.fUse) == !!(uErrorCode & X86_TRAP_PF_RW), ("flags1=%#llx/%RTbool flags2=%#llx/%RTbool ErrCd=%#x\n", pDis->Param1.fUse, DISUSE_IS_EFFECTIVE_ADDR(pDis->Param1.fUse), pDis->Param2.fUse, DISUSE_IS_EFFECTIVE_ADDR(pDis->Param2.fUse), uErrorCode));
             if (uErrorCode != UINT32_MAX    /* EPT+MMIO optimization */
                 ? uErrorCode & X86_TRAP_PF_RW
-                : DISUSE_IS_EFFECTIVE_ADDR(pDis->param1.fUse))
+                : DISUSE_IS_EFFECTIVE_ADDR(pDis->Param1.fUse))
                 rc = iomInterpretMOVxXWrite(pVM, pCtxCore, pDis, pRange, GCPhysFault);
             else
@@ -2311,5 +2311,5 @@
     uint64_t    Port = 0;
     unsigned    cb = 0;
-    bool fRc = iomGetRegImmData(pCpu, &pCpu->param1, pRegFrame, &Port, &cb);
+    bool fRc = iomGetRegImmData(pCpu, &pCpu->Param1, pRegFrame, &Port, &cb);
     AssertMsg(fRc, ("Failed to get reg/imm port number!\n")); NOREF(fRc);
     if (pCpu->pCurInstr->uOpcode == OP_OUTSB)
Index: /trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp	(revision 41738)
+++ /trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp	(revision 41739)
@@ -761,5 +761,5 @@
 #endif
 
-    LogFlow(("Reused instr %RGv %d at %RGv param1.fUse=%llx param1.reg=%d\n", pRegFrame->rip, pDis->pCurInstr->uOpcode, pvFault, pDis->param1.fUse,  pDis->param1.base.reg_gen));
+    LogFlow(("Reused instr %RGv %d at %RGv param1.fUse=%llx param1.reg=%d\n", pRegFrame->rip, pDis->pCurInstr->uOpcode, pvFault, pDis->Param1.fUse,  pDis->Param1.base.reg_gen));
 
     /* Non-supervisor mode write means it's used for something else. */
@@ -804,7 +804,7 @@
             return false;
     }
-    if (    (    (pDis->param1.fUse & DISUSE_REG_GEN32)
-             ||  (pDis->param1.fUse & DISUSE_REG_GEN64))
-        &&  (pDis->param1.base.reg_gen == DISGREG_ESP))
+    if (    (    (pDis->Param1.fUse & DISUSE_REG_GEN32)
+             ||  (pDis->Param1.fUse & DISUSE_REG_GEN64))
+        &&  (pDis->Param1.base.reg_gen == DISGREG_ESP))
     {
         Log4(("pgmPoolMonitorIsReused: ESP\n"));
@@ -887,5 +887,5 @@
                                           PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysFault, RTGCPTR pvFault)
 {
-    unsigned uIncrement = pDis->param1.cb;
+    unsigned uIncrement = pDis->Param1.cb;
     NOREF(pVM);
 
@@ -975,8 +975,8 @@
 #if defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0) || defined(IN_RC)
     uint32_t    iPrevSubset = PGMRZDynMapPushAutoSubset(pVCpu);
-    pgmPoolMonitorChainChanging(pVCpu, pPool, pPage, GCPhysFault, pvFault, DISGetParamSize(pDis, &pDis->param1));
+    pgmPoolMonitorChainChanging(pVCpu, pPool, pPage, GCPhysFault, pvFault, DISGetParamSize(pDis, &pDis->Param1));
     PGMRZDynMapPopAutoSubset(pVCpu, iPrevSubset);
 #else
-    pgmPoolMonitorChainChanging(pVCpu, pPool, pPage, GCPhysFault, pvFault, DISGetParamSize(pDis, &pDis->param1));
+    pgmPoolMonitorChainChanging(pVCpu, pPool, pPage, GCPhysFault, pvFault, DISGetParamSize(pDis, &pDis->Param1));
 #endif
 
@@ -1123,5 +1123,5 @@
     if (    pPage->GCPtrLastAccessHandlerRip >= pRegFrame->rip - 0x40      /* observed loops in Windows 7 x64 */
         &&  pPage->GCPtrLastAccessHandlerRip <  pRegFrame->rip + 0x40
-        &&  pvFault == (pPage->GCPtrLastAccessHandlerFault + pDis->param1.cb)
+        &&  pvFault == (pPage->GCPtrLastAccessHandlerFault + pDis->Param1.cb)
         &&  pVCpu->pgm.s.cPoolAccessHandler == pPage->cLastAccessHandler + 1)
     {
Index: /trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp	(revision 41738)
+++ /trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp	(revision 41739)
@@ -2923,5 +2923,5 @@
     NOREF(uASID);
 
-    int rc = DISQueryParamVal(pRegFrame, pCpu, &pCpu->param1, &param1, DISQPVWHICH_SRC);
+    int rc = DISQueryParamVal(pRegFrame, pCpu, &pCpu->Param1, &param1, DISQPVWHICH_SRC);
     if (RT_FAILURE(rc))
         return VERR_EM_INTERPRETER;
Index: /trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp	(revision 41738)
+++ /trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp	(revision 41739)
@@ -3704,6 +3704,6 @@
                         uint32_t intInfo2;
 
-                        LogFlow(("Realmode: INT %x\n", pDis->param1.parval & 0xff));
-                        intInfo2  = pDis->param1.parval & 0xff;
+                        LogFlow(("Realmode: INT %x\n", pDis->Param1.parval & 0xff));
+                        intInfo2  = pDis->Param1.parval & 0xff;
                         intInfo2 |= (1 << VMX_EXIT_INTERRUPTION_INFO_VALID_SHIFT);
                         intInfo2 |= (VMX_EXIT_INTERRUPTION_INFO_TYPE_SW << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT);
Index: /trunk/src/VBox/VMM/VMMR3/CSAM.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMR3/CSAM.cpp	(revision 41738)
+++ /trunk/src/VBox/VMM/VMMR3/CSAM.cpp	(revision 41739)
@@ -800,6 +800,6 @@
     {
     case OP_INT:
-        Assert(pCpu->param1.fUse & DISUSE_IMMEDIATE8);
-        if (pCpu->param1.parval == 3)
+        Assert(pCpu->Param1.fUse & DISUSE_IMMEDIATE8);
+        if (pCpu->Param1.parval == 3)
         {
             //two byte int 3
@@ -1097,12 +1097,12 @@
                      * Any register is allowed as long as source and destination are identical.
                      */
-                    if (    cpu.param1.fUse != DISUSE_REG_GEN32
-                        ||  (   cpu.param2.flags != DISUSE_REG_GEN32
-                             && (   !(cpu.param2.flags & DISUSE_REG_GEN32)
-                                 || !(cpu.param2.flags & (DISUSE_DISPLACEMENT8|DISUSE_DISPLACEMENT16|DISUSE_DISPLACEMENT32))
-                                 ||  cpu.param2.parval != 0
+                    if (    cpu.Param1.fUse != DISUSE_REG_GEN32
+                        ||  (   cpu.Param2.flags != DISUSE_REG_GEN32
+                             && (   !(cpu.Param2.flags & DISUSE_REG_GEN32)
+                                 || !(cpu.Param2.flags & (DISUSE_DISPLACEMENT8|DISUSE_DISPLACEMENT16|DISUSE_DISPLACEMENT32))
+                                 ||  cpu.Param2.parval != 0
                                 )
                             )
-                        ||  cpu.param1.base.reg_gen32 != cpu.param2.base.reg_gen32
+                        ||  cpu.Param1.base.reg_gen32 != cpu.Param2.base.reg_gen32
                        )
                     {
@@ -1115,6 +1115,6 @@
                 {
                     if (    (pCurInstrGC & 0x3) != 0
-                        ||  cpu.param1.fUse != DISUSE_REG_GEN32
-                        ||  cpu.param1.base.reg_gen32 != USE_REG_EBP
+                        ||  cpu.Param1.fUse != DISUSE_REG_GEN32
+                        ||  cpu.Param1.base.reg_gen32 != USE_REG_EBP
                        )
                     {
@@ -1141,6 +1141,6 @@
                 {
                     if (    (pCurInstrGC & 0x3) != 0
-                        ||  cpu.param1.fUse != DISUSE_REG_GEN32
-                        ||  cpu.param1.base.reg_gen32 != USE_REG_ESP
+                        ||  cpu.Param1.fUse != DISUSE_REG_GEN32
+                        ||  cpu.Param1.base.reg_gen32 != USE_REG_ESP
                        )
                     {
@@ -1328,12 +1328,12 @@
         // For our first attempt, we'll handle only simple relative jumps and calls (immediate offset coded in instruction)
         if (    ((cpu.pCurInstr->fOpType & DISOPTYPE_CONTROLFLOW) && (OP_PARM_VTYPE(cpu.pCurInstr->fParam1) == OP_PARM_J))
-            ||  (cpu.pCurInstr->uOpcode == OP_CALL && cpu.param1.fUse == DISUSE_DISPLACEMENT32))  /* simple indirect call (call dword ptr [address]) */
+            ||  (cpu.pCurInstr->uOpcode == OP_CALL && cpu.Param1.fUse == DISUSE_DISPLACEMENT32))  /* simple indirect call (call dword ptr [address]) */
         {
             /* We need to parse 'call dword ptr [address]' type of calls to catch cpuid instructions in some recent Linux distributions (e.g. OpenSuse 10.3) */
             if (    cpu.pCurInstr->uOpcode == OP_CALL
-                &&  cpu.param1.fUse == DISUSE_DISPLACEMENT32)
+                &&  cpu.Param1.fUse == DISUSE_DISPLACEMENT32)
             {
                 addr = 0;
-                PGMPhysSimpleReadGCPtr(pVCpu, &addr, (RTRCUINTPTR)cpu.param1.uDisp.i32, sizeof(addr));
+                PGMPhysSimpleReadGCPtr(pVCpu, &addr, (RTRCUINTPTR)cpu.Param1.uDisp.i32, sizeof(addr));
             }
             else
@@ -1342,5 +1342,5 @@
             if (addr == 0)
             {
-                Log(("We don't support far jumps here!! (%08X)\n", cpu.param1.fUse));
+                Log(("We don't support far jumps here!! (%08X)\n", cpu.Param1.fUse));
                 rc = VINF_SUCCESS;
                 break;
@@ -1399,8 +1399,8 @@
         else
         if (    cpu.pCurInstr->uOpcode == OP_JMP
-            &&  (cpu.param1.fUse & (DISUSE_DISPLACEMENT32|DISUSE_INDEX|DISUSE_SCALE)) == (DISUSE_DISPLACEMENT32|DISUSE_INDEX|DISUSE_SCALE)
+            &&  (cpu.Param1.fUse & (DISUSE_DISPLACEMENT32|DISUSE_INDEX|DISUSE_SCALE)) == (DISUSE_DISPLACEMENT32|DISUSE_INDEX|DISUSE_SCALE)
            )
         {
-            RTRCPTR  pJumpTableGC = (RTRCPTR)cpu.param1.disp32;
+            RTRCPTR  pJumpTableGC = (RTRCPTR)cpu.Param1.disp32;
             uint8_t *pJumpTableHC;
             int      rc2;
@@ -1415,10 +1415,10 @@
                     uint64_t fFlags;
 
-                    addr = pJumpTableGC + cpu.param1.scale * i;
+                    addr = pJumpTableGC + cpu.Param1.scale * i;
                     /* Same page? */
                     if (PAGE_ADDRESS(addr) != PAGE_ADDRESS(pJumpTableGC))
                         break;
 
-                    addr = *(RTRCPTR *)(pJumpTableHC + cpu.param1.scale * i);
+                    addr = *(RTRCPTR *)(pJumpTableHC + cpu.Param1.scale * i);
 
                     rc2 = PGMGstGetPage(pVCpu, addr, &fFlags, NULL);
Index: /trunk/src/VBox/VMM/VMMR3/EMRaw.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMR3/EMRaw.cpp	(revision 41738)
+++ /trunk/src/VBox/VMM/VMMR3/EMRaw.cpp	(revision 41739)
@@ -990,17 +990,17 @@
 
             case OP_MOV_CR:
-                if (Cpu.param1.fUse & DISUSE_REG_GEN32)
+                if (Cpu.Param1.fUse & DISUSE_REG_GEN32)
                 {
                     //read
-                    Assert(Cpu.param2.fUse & DISUSE_REG_CR);
-                    Assert(Cpu.param2.base.reg_ctrl <= DISCREG_CR4);
-                    STAM_COUNTER_INC(&pStats->StatMovReadCR[Cpu.param2.base.reg_ctrl]);
+                    Assert(Cpu.Param2.fUse & DISUSE_REG_CR);
+                    Assert(Cpu.Param2.base.reg_ctrl <= DISCREG_CR4);
+                    STAM_COUNTER_INC(&pStats->StatMovReadCR[Cpu.Param2.base.reg_ctrl]);
                 }
                 else
                 {
                     //write
-                    Assert(Cpu.param1.fUse & DISUSE_REG_CR);
-                    Assert(Cpu.param1.base.reg_ctrl <= DISCREG_CR4);
-                    STAM_COUNTER_INC(&pStats->StatMovWriteCR[Cpu.param1.base.reg_ctrl]);
+                    Assert(Cpu.Param1.fUse & DISUSE_REG_CR);
+                    Assert(Cpu.Param1.base.reg_ctrl <= DISCREG_CR4);
+                    STAM_COUNTER_INC(&pStats->StatMovWriteCR[Cpu.Param1.base.reg_ctrl]);
                 }
                 break;
@@ -1100,5 +1100,5 @@
 
                         if (    Cpu.pCurInstr->uOpcode == OP_MOV_CR
-                            &&  Cpu.param1.fUse == DISUSE_REG_CR /* write */
+                            &&  Cpu.Param1.fUse == DISUSE_REG_CR /* write */
                            )
                         {
Index: /trunk/src/VBox/VMM/VMMR3/HWACCM.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMR3/HWACCM.cpp	(revision 41738)
+++ /trunk/src/VBox/VMM/VMMR3/HWACCM.cpp	(revision 41739)
@@ -1833,17 +1833,17 @@
         pPatch->cbOp     = cbOp;
 
-        if (pDis->param1.fUse == DISUSE_DISPLACEMENT32)
+        if (pDis->Param1.fUse == DISUSE_DISPLACEMENT32)
         {
             /* write. */
-            if (pDis->param2.fUse == DISUSE_REG_GEN32)
+            if (pDis->Param2.fUse == DISUSE_REG_GEN32)
             {
                 pPatch->enmType     = HWACCMTPRINSTR_WRITE_REG;
-                pPatch->uSrcOperand = pDis->param2.base.reg_gen;
+                pPatch->uSrcOperand = pDis->Param2.base.reg_gen;
             }
             else
             {
-                Assert(pDis->param2.fUse == DISUSE_IMMEDIATE32);
+                Assert(pDis->Param2.fUse == DISUSE_IMMEDIATE32);
                 pPatch->enmType     = HWACCMTPRINSTR_WRITE_IMM;
-                pPatch->uSrcOperand = pDis->param2.parval;
+                pPatch->uSrcOperand = pDis->Param2.parval;
             }
             rc = PGMPhysSimpleWriteGCPtr(pVCpu, pCtx->rip, aVMMCall, sizeof(aVMMCall));
@@ -1857,8 +1857,8 @@
             RTGCPTR  oldrip   = pCtx->rip;
             uint32_t oldcbOp  = cbOp;
-            uint32_t uMmioReg = pDis->param1.base.reg_gen;
+            uint32_t uMmioReg = pDis->Param1.base.reg_gen;
 
             /* read */
-            Assert(pDis->param1.fUse == DISUSE_REG_GEN32);
+            Assert(pDis->Param1.fUse == DISUSE_REG_GEN32);
 
             /* Found:
@@ -1872,8 +1872,8 @@
             if (    rc == VINF_SUCCESS
                 &&  pDis->pCurInstr->uOpcode == OP_SHR
-                &&  pDis->param1.fUse == DISUSE_REG_GEN32
-                &&  pDis->param1.base.reg_gen == uMmioReg
-                &&  pDis->param2.fUse == DISUSE_IMMEDIATE8
-                &&  pDis->param2.parval == 4
+                &&  pDis->Param1.fUse == DISUSE_REG_GEN32
+                &&  pDis->Param1.base.reg_gen == uMmioReg
+                &&  pDis->Param2.fUse == DISUSE_IMMEDIATE8
+                &&  pDis->Param2.parval == 4
                 &&  oldcbOp + cbOp < sizeof(pVM->hwaccm.s.aPatches[idx].aOpcode))
             {
@@ -1890,5 +1890,5 @@
                 szInstr[1] = 0x0F;
                 szInstr[2] = 0x20;
-                szInstr[3] = 0xC0 | pDis->param1.base.reg_gen;
+                szInstr[3] = 0xC0 | pDis->Param1.base.reg_gen;
                 for (unsigned i = 4; i < pPatch->cbOp; i++)
                     szInstr[i] = 0x90;  /* nop */
@@ -1906,5 +1906,5 @@
             {
                 pPatch->enmType     = HWACCMTPRINSTR_READ;
-                pPatch->uDstOperand = pDis->param1.base.reg_gen;
+                pPatch->uDstOperand = pDis->Param1.base.reg_gen;
 
                 rc = PGMPhysSimpleWriteGCPtr(pVCpu, pCtx->rip, aVMMCall, sizeof(aVMMCall));
@@ -2008,5 +2008,5 @@
         pPatch->enmType = HWACCMTPRINSTR_JUMP_REPLACEMENT;
 
-        if (pDis->param1.fUse == DISUSE_DISPLACEMENT32)
+        if (pDis->Param1.fUse == DISUSE_DISPLACEMENT32)
         {
             /*
@@ -2028,5 +2028,5 @@
                 *
                 */
-            bool fUsesEax = (pDis->param2.fUse == DISUSE_REG_GEN32 && pDis->param2.base.reg_gen == DISGREG_EAX);
+            bool fUsesEax = (pDis->Param2.fUse == DISUSE_REG_GEN32 && pDis->Param2.base.reg_gen == DISGREG_EAX);
 
             aPatch[off++] = 0x51;    /* push ecx */
@@ -2036,17 +2036,17 @@
             aPatch[off++] = 0x31;    /* xor edx, edx */
             aPatch[off++] = 0xD2;
-            if (pDis->param2.fUse == DISUSE_REG_GEN32)
+            if (pDis->Param2.fUse == DISUSE_REG_GEN32)
             {
                 if (!fUsesEax)
                 {
                     aPatch[off++] = 0x89;    /* mov eax, src_reg */
-                    aPatch[off++] = MAKE_MODRM(3, pDis->param2.base.reg_gen, DISGREG_EAX);
+                    aPatch[off++] = MAKE_MODRM(3, pDis->Param2.base.reg_gen, DISGREG_EAX);
                 }
             }
             else
             {
-                Assert(pDis->param2.fUse == DISUSE_IMMEDIATE32);
+                Assert(pDis->Param2.fUse == DISUSE_IMMEDIATE32);
                 aPatch[off++] = 0xB8;    /* mov eax, immediate */
-                *(uint32_t *)&aPatch[off] = pDis->param2.parval;
+                *(uint32_t *)&aPatch[off] = pDis->Param2.parval;
                 off += sizeof(uint32_t);
             }
@@ -2079,11 +2079,11 @@
                 *
                 */
-            Assert(pDis->param1.fUse == DISUSE_REG_GEN32);
-
-            if (pDis->param1.base.reg_gen != DISGREG_ECX)
+            Assert(pDis->Param1.fUse == DISUSE_REG_GEN32);
+
+            if (pDis->Param1.base.reg_gen != DISGREG_ECX)
                 aPatch[off++] = 0x51;    /* push ecx */
-            if (pDis->param1.base.reg_gen != DISGREG_EDX )
+            if (pDis->Param1.base.reg_gen != DISGREG_EDX )
                 aPatch[off++] = 0x52;    /* push edx */
-            if (pDis->param1.base.reg_gen != DISGREG_EAX)
+            if (pDis->Param1.base.reg_gen != DISGREG_EAX)
                 aPatch[off++] = 0x50;    /* push eax */
 
@@ -2098,15 +2098,15 @@
             aPatch[off++] = 0x32;
 
-            if (pDis->param1.base.reg_gen != DISGREG_EAX)
+            if (pDis->Param1.base.reg_gen != DISGREG_EAX)
             {
                 aPatch[off++] = 0x89;    /* mov dst_reg, eax */
-                aPatch[off++] = MAKE_MODRM(3, DISGREG_EAX, pDis->param1.base.reg_gen);
+                aPatch[off++] = MAKE_MODRM(3, DISGREG_EAX, pDis->Param1.base.reg_gen);
             }
 
-            if (pDis->param1.base.reg_gen != DISGREG_EAX)
+            if (pDis->Param1.base.reg_gen != DISGREG_EAX)
                 aPatch[off++] = 0x58;    /* pop eax */
-            if (pDis->param1.base.reg_gen != DISGREG_EDX )
+            if (pDis->Param1.base.reg_gen != DISGREG_EDX )
                 aPatch[off++] = 0x5A;    /* pop edx */
-            if (pDis->param1.base.reg_gen != DISGREG_ECX)
+            if (pDis->Param1.base.reg_gen != DISGREG_ECX)
                 aPatch[off++] = 0x59;    /* pop ecx */
         }
Index: /trunk/src/VBox/VMM/VMMR3/PATM.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMR3/PATM.cpp	(revision 41738)
+++ /trunk/src/VBox/VMM/VMMR3/PATM.cpp	(revision 41739)
@@ -1399,6 +1399,6 @@
            )
         {
-            Assert(pCpu->param1.cb <= 4 || pCpu->param1.cb == 6);
-            if (    pCpu->param1.cb == 6 /* far call/jmp */
+            Assert(pCpu->Param1.cb <= 4 || pCpu->Param1.cb == 6);
+            if (    pCpu->Param1.cb == 6 /* far call/jmp */
                 ||  (pCpu->pCurInstr->uOpcode == OP_CALL && !(pPatch->flags & PATMFL_SUPPORT_CALLS))
                 ||  (OP_PARM_VTYPE(pCpu->pCurInstr->fParam1) != OP_PARM_J && !(pPatch->flags & PATMFL_SUPPORT_INDIRECT_CALLS))
@@ -1558,6 +1558,6 @@
            )
         {
-            Assert(pCpu->param1.cb <= 4 || pCpu->param1.cb == 6);
-            if (    pCpu->param1.cb == 6 /* far call/jmp */
+            Assert(pCpu->Param1.cb <= 4 || pCpu->Param1.cb == 6);
+            if (    pCpu->Param1.cb == 6 /* far call/jmp */
                 ||  (pCpu->pCurInstr->uOpcode == OP_CALL && !(pPatch->flags & PATMFL_SUPPORT_CALLS))
                 ||  (OP_PARM_VTYPE(pCpu->pCurInstr->fParam1) != OP_PARM_J && !(pPatch->flags & PATMFL_SUPPORT_INDIRECT_CALLS))
@@ -1701,5 +1701,5 @@
         if (pTargetGC == 0)
         {
-            Log(("We don't support far jumps here!! (%08X)\n", pCpu->param1.fUse));
+            Log(("We don't support far jumps here!! (%08X)\n", pCpu->Param1.fUse));
             return VERR_PATCHING_REFUSED;
         }
@@ -1748,6 +1748,6 @@
         {
             /* mov ss, src? */
-            if (    (pCpu->param1.fUse & DISUSE_REG_SEG)
-                &&  (pCpu->param1.base.reg_seg == DISSELREG_SS))
+            if (    (pCpu->Param1.fUse & DISUSE_REG_SEG)
+                &&  (pCpu->Param1.base.reg_seg == DISSELREG_SS))
             {
                 Log(("Force recompilation of next instruction for OP_MOV at %RRv\n", pCurInstrGC));
@@ -1757,7 +1757,7 @@
 #if 0 /* necessary for Haiku */
             else
-            if (    (pCpu->param2.fUse & DISUSE_REG_SEG)
-                &&  (pCpu->param2.base.reg_seg == USE_REG_SS)
-                &&  (pCpu->param1.fUse & (DISUSE_REG_GEN32|DISUSE_REG_GEN16)))     /** @todo memory operand must in theory be handled too */
+            if (    (pCpu->Param2.fUse & DISUSE_REG_SEG)
+                &&  (pCpu->Param2.base.reg_seg == USE_REG_SS)
+                &&  (pCpu->Param1.fUse & (DISUSE_REG_GEN32|DISUSE_REG_GEN16)))     /** @todo memory operand must in theory be handled too */
             {
                 /* mov GPR, ss */
@@ -1945,6 +1945,6 @@
          * In that case we'll jump to the original instruction and continue from there. Otherwise an int 3 is executed.
          */
-        Assert(pCpu->param1.cb == 4 || pCpu->param1.cb == 6);
-        if (pPatch->flags & PATMFL_SUPPORT_INDIRECT_CALLS && pCpu->param1.cb == 4 /* no far calls! */)
+        Assert(pCpu->Param1.cb == 4 || pCpu->Param1.cb == 6);
+        if (pPatch->flags & PATMFL_SUPPORT_INDIRECT_CALLS && pCpu->Param1.cb == 4 /* no far calls! */)
         {
             rc = patmPatchGenCall(pVM, pPatch, pCpu, pCurInstrGC, (RTRCPTR)0xDEADBEEF, true);
@@ -1962,6 +1962,6 @@
          * In that case we'll jump to the original instruction and continue from there. Otherwise an int 3 is executed.
          */
-        Assert(pCpu->param1.cb == 4 || pCpu->param1.cb == 6);
-        if (pPatch->flags & PATMFL_SUPPORT_INDIRECT_CALLS && pCpu->param1.cb == 4 /* no far jumps! */)
+        Assert(pCpu->Param1.cb == 4 || pCpu->Param1.cb == 6);
+        if (pPatch->flags & PATMFL_SUPPORT_INDIRECT_CALLS && pCpu->Param1.cb == 4 /* no far jumps! */)
         {
             rc = patmPatchGenJump(pVM, pPatch, pCpu, pCurInstrGC);
@@ -2133,5 +2133,5 @@
 
             bool disret = patmR3DisInstr(pVM, pPatch, pOrgJumpGC, pOrgJumpHC, PATMREAD_ORGCODE, &cpu, NULL);
-            if (!disret || cpu.pCurInstr->uOpcode != OP_CALL || cpu.param1.cb != 4 /* only near calls */)
+            if (!disret || cpu.pCurInstr->uOpcode != OP_CALL || cpu.Param1.cb != 4 /* only near calls */)
                 return VINF_SUCCESS;
         }
@@ -2242,5 +2242,5 @@
             if (pTargetGC == 0)
             {
-                Log(("We don't support far jumps here!! (%08X)\n", cpu.param1.fUse));
+                Log(("We don't support far jumps here!! (%08X)\n", cpu.Param1.fUse));
                 rc = VERR_PATCHING_REFUSED;
                 break;
@@ -2461,5 +2461,5 @@
             if (addr == 0)
             {
-                Log(("We don't support far jumps here!! (%08X)\n", cpu.param1.fUse));
+                Log(("We don't support far jumps here!! (%08X)\n", cpu.Param1.fUse));
                 rc = VERR_PATCHING_REFUSED;
                 break;
@@ -3581,5 +3581,5 @@
     if (pTargetGC == 0)
     {
-        Log(("We don't support far jumps here!! (%08X)\n", pCpu->param1.fUse));
+        Log(("We don't support far jumps here!! (%08X)\n", pCpu->Param1.fUse));
         rc = VERR_PATCHING_REFUSED;
         goto failure;
@@ -3673,5 +3673,5 @@
         goto failure;
 
-    if (pCpu->param2.fUse != DISUSE_DISPLACEMENT32)
+    if (pCpu->Param2.fUse != DISUSE_DISPLACEMENT32)
         goto failure;
 
@@ -3752,5 +3752,5 @@
     if (cbInstr > MAX_INSTR_SIZE)
         return VERR_PATCHING_REFUSED;
-    if (cpu.param2.fUse != DISUSE_DISPLACEMENT32)
+    if (cpu.Param2.fUse != DISUSE_DISPLACEMENT32)
         return VERR_PATCHING_REFUSED;
 
@@ -3914,6 +3914,6 @@
     case OP_JMP:
         Assert(pPatch->flags & PATMFL_JUMP_CONFLICT);
-        Assert(pCpu->param1.fUse & DISUSE_IMMEDIATE32_REL);
-        if (!(pCpu->param1.fUse & DISUSE_IMMEDIATE32_REL))
+        Assert(pCpu->Param1.fUse & DISUSE_IMMEDIATE32_REL);
+        if (!(pCpu->Param1.fUse & DISUSE_IMMEDIATE32_REL))
             goto failure;
 
@@ -3949,7 +3949,7 @@
      * references the target instruction in the conflict patch.
      */
-    RTRCPTR pJmpDest = PATMR3GuestGCPtrToPatchGCPtr(pVM, pInstrGC + pCpu->cbInstr + (int32_t)pCpu->param1.parval);
-
-    AssertMsg(pJmpDest, ("PATMR3GuestGCPtrToPatchGCPtr failed for %RRv\n", pInstrGC + pCpu->cbInstr + (int32_t)pCpu->param1.parval));
+    RTRCPTR pJmpDest = PATMR3GuestGCPtrToPatchGCPtr(pVM, pInstrGC + pCpu->cbInstr + (int32_t)pCpu->Param1.parval);
+
+    AssertMsg(pJmpDest, ("PATMR3GuestGCPtrToPatchGCPtr failed for %RRv\n", pInstrGC + pCpu->cbInstr + (int32_t)pCpu->Param1.parval));
     pPatch->pPatchJumpDestGC = pJmpDest;
 
@@ -5199,5 +5199,5 @@
         && (pConflictPatch->flags & PATMFL_CODE32)
         && (cpu.pCurInstr->uOpcode == OP_JMP || (cpu.pCurInstr->fOpType & DISOPTYPE_COND_CONTROLFLOW))
-        && (cpu.param1.fUse & DISUSE_IMMEDIATE32_REL))
+        && (cpu.Param1.fUse & DISUSE_IMMEDIATE32_REL))
     {
         /* Hint patches must be enabled first. */
Index: /trunk/src/VBox/VMM/VMMR3/PATMPatch.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMR3/PATMPatch.cpp	(revision 41738)
+++ /trunk/src/VBox/VMM/VMMR3/PATMPatch.cpp	(revision 41739)
@@ -694,5 +694,5 @@
     {
         Log(("patmPatchGenIndirectCall\n"));
-        Assert(pCpu->param1.cb == 4);
+        Assert(pCpu->Param1.cb == 4);
         Assert(OP_PARM_VTYPE(pCpu->pCurInstr->fParam1) != OP_PARM_J);
 
@@ -790,5 +790,5 @@
 
     Log(("patmPatchGenIndirectJump\n"));
-    Assert(pCpu->param1.cb == 4);
+    Assert(pCpu->Param1.cb == 4);
     Assert(OP_PARM_VTYPE(pCpu->pCurInstr->fParam1) != OP_PARM_J);
 
@@ -857,5 +857,5 @@
     /** @note optimization: multiple identical ret instruction in a single patch can share a single patched ret. */
     if (    pPatch->pTempInfo->pPatchRetInstrGC
-        &&  pPatch->pTempInfo->uPatchRetParam1 == (uint32_t)pCpu->param1.parval) /* nr of bytes popped off the stack should be identical of course! */
+        &&  pPatch->pTempInfo->uPatchRetParam1 == (uint32_t)pCpu->Param1.parval) /* nr of bytes popped off the stack should be identical of course! */
     {
         Assert(pCpu->pCurInstr->uOpcode == OP_RETN);
@@ -891,5 +891,5 @@
     {
         pPatch->pTempInfo->pPatchRetInstrGC = pPatchRetInstrGC;
-        pPatch->pTempInfo->uPatchRetParam1  = pCpu->param1.parval;
+        pPatch->pTempInfo->uPatchRetParam1  = pCpu->Param1.parval;
     }
     return rc;
@@ -1164,19 +1164,19 @@
         // mov DRx, GPR
         pPB[0] = 0x89;      //mov disp32, GPR
-        Assert(pCpu->param1.fUse & DISUSE_REG_DBG);
-        Assert(pCpu->param2.fUse & DISUSE_REG_GEN32);
-
-        dbgreg = pCpu->param1.base.reg_dbg;
-        reg    = pCpu->param2.base.reg_gen;
+        Assert(pCpu->Param1.fUse & DISUSE_REG_DBG);
+        Assert(pCpu->Param2.fUse & DISUSE_REG_GEN32);
+
+        dbgreg = pCpu->Param1.base.reg_dbg;
+        reg    = pCpu->Param2.base.reg_gen;
     }
     else
     {
         // mov GPR, DRx
-        Assert(pCpu->param1.fUse & DISUSE_REG_GEN32);
-        Assert(pCpu->param2.fUse & DISUSE_REG_DBG);
+        Assert(pCpu->Param1.fUse & DISUSE_REG_GEN32);
+        Assert(pCpu->Param2.fUse & DISUSE_REG_DBG);
 
         pPB[0] = 0x8B;      // mov GPR, disp32
-        reg    = pCpu->param1.base.reg_gen;
-        dbgreg = pCpu->param2.base.reg_dbg;
+        reg    = pCpu->Param1.base.reg_gen;
+        dbgreg = pCpu->Param2.base.reg_dbg;
     }
 
@@ -1214,18 +1214,18 @@
         // mov CRx, GPR
         pPB[0] = 0x89;      //mov disp32, GPR
-        ctrlreg = pCpu->param1.base.reg_ctrl;
-        reg     = pCpu->param2.base.reg_gen;
-        Assert(pCpu->param1.fUse & DISUSE_REG_CR);
-        Assert(pCpu->param2.fUse & DISUSE_REG_GEN32);
+        ctrlreg = pCpu->Param1.base.reg_ctrl;
+        reg     = pCpu->Param2.base.reg_gen;
+        Assert(pCpu->Param1.fUse & DISUSE_REG_CR);
+        Assert(pCpu->Param2.fUse & DISUSE_REG_GEN32);
     }
     else
     {
         // mov GPR, DRx
-        Assert(pCpu->param1.fUse & DISUSE_REG_GEN32);
-        Assert(pCpu->param2.fUse & DISUSE_REG_CR);
+        Assert(pCpu->Param1.fUse & DISUSE_REG_GEN32);
+        Assert(pCpu->Param2.fUse & DISUSE_REG_CR);
 
         pPB[0]  = 0x8B;      // mov GPR, disp32
-        reg     = pCpu->param1.base.reg_gen;
-        ctrlreg = pCpu->param2.base.reg_ctrl;
+        reg     = pCpu->Param1.base.reg_gen;
+        ctrlreg = pCpu->Param2.base.reg_ctrl;
     }
 
@@ -1292,5 +1292,5 @@
     if (pCpu->fPrefix & DISPREFIX_OPSIZE)
         pPB[offset++] = 0x66; /* size override -> 16 bits pop */
-    pPB[offset++] = 0x58 + pCpu->param1.base.reg_gen;
+    pPB[offset++] = 0x58 + pCpu->Param1.base.reg_gen;
     PATCHGEN_EPILOG(pPatch, offset);
 
@@ -1325,5 +1325,5 @@
     PATCHGEN_PROLOG(pVM, pPatch);
 
-    if (pCpu->param1.fUse == DISUSE_REG_GEN32 || pCpu->param1.fUse == DISUSE_REG_GEN16)
+    if (pCpu->Param1.fUse == DISUSE_REG_GEN32 || pCpu->Param1.fUse == DISUSE_REG_GEN16)
     {
         /* Register operand */
@@ -1335,5 +1335,5 @@
         pPB[offset++] = 0x8B;              // mov       destreg, CPUMCTX.tr/ldtr
         /* Modify REG part according to destination of original instruction */
-        pPB[offset++] = MAKE_MODRM(0, pCpu->param1.base.reg_gen, 5);
+        pPB[offset++] = MAKE_MODRM(0, pCpu->Param1.base.reg_gen, 5);
         if (pCpu->pCurInstr->uOpcode == OP_STR)
         {
Index: /trunk/src/VBox/VMM/VMMRC/TRPMRCHandlers.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMRC/TRPMRCHandlers.cpp	(revision 41738)
+++ /trunk/src/VBox/VMM/VMMRC/TRPMRCHandlers.cpp	(revision 41739)
@@ -738,12 +738,12 @@
              * Little hack to make the code below not fail
              */
-            pCpu->param1.fUse  = DISUSE_IMMEDIATE8;
-            pCpu->param1.parval = 3;
+            pCpu->Param1.fUse  = DISUSE_IMMEDIATE8;
+            pCpu->Param1.parval = 3;
             /* fallthru */
         case OP_INT:
         {
-            Assert(pCpu->param1.fUse & DISUSE_IMMEDIATE8);
+            Assert(pCpu->Param1.fUse & DISUSE_IMMEDIATE8);
             Assert(!(PATMIsPatchGCAddr(pVM, PC)));
-            if (pCpu->param1.parval == 3)
+            if (pCpu->Param1.parval == 3)
             {
                 /* Int 3 replacement patch? */
@@ -754,5 +754,5 @@
                 }
             }
-            rc = TRPMForwardTrap(pVCpu, pRegFrame, (uint32_t)pCpu->param1.parval, pCpu->cbInstr, TRPM_TRAP_NO_ERRORCODE, TRPM_SOFTWARE_INT, 0xd);
+            rc = TRPMForwardTrap(pVCpu, pRegFrame, (uint32_t)pCpu->Param1.parval, pCpu->cbInstr, TRPM_TRAP_NO_ERRORCODE, TRPM_SOFTWARE_INT, 0xd);
             if (RT_SUCCESS(rc) && rc != VINF_EM_RAW_GUEST_TRAP)
                 return trpmGCExitTrap(pVM, pVCpu, VINF_SUCCESS, pRegFrame);
@@ -840,11 +840,11 @@
              * Little hack to make the code below not fail
              */
-            pCpu->param1.fUse  = DISUSE_IMMEDIATE8;
-            pCpu->param1.parval = 3;
+            pCpu->Param1.fUse  = DISUSE_IMMEDIATE8;
+            pCpu->Param1.parval = 3;
             /* fall thru */
         case OP_INT:
         {
-            Assert(pCpu->param1.fUse & DISUSE_IMMEDIATE8);
-            rc = TRPMForwardTrap(pVCpu, pRegFrame, (uint32_t)pCpu->param1.parval, pCpu->cbInstr, TRPM_TRAP_NO_ERRORCODE, TRPM_SOFTWARE_INT, 0xd);
+            Assert(pCpu->Param1.fUse & DISUSE_IMMEDIATE8);
+            rc = TRPMForwardTrap(pVCpu, pRegFrame, (uint32_t)pCpu->Param1.parval, pCpu->cbInstr, TRPM_TRAP_NO_ERRORCODE, TRPM_SOFTWARE_INT, 0xd);
             if (RT_SUCCESS(rc) && rc != VINF_EM_RAW_GUEST_TRAP)
                 return trpmGCExitTrap(pVM, pVCpu, VINF_SUCCESS, pRegFrame);
Index: /trunk/src/VBox/VMM/include/CSAMInternal.h
===================================================================
--- /trunk/src/VBox/VMM/include/CSAMInternal.h	(revision 41738)
+++ /trunk/src/VBox/VMM/include/CSAMInternal.h	(revision 41739)
@@ -251,21 +251,21 @@
 {
     uint32_t disp;
-    if (pCpu->param1.fUse & DISUSE_IMMEDIATE8_REL)
-    {
-        disp = (int32_t)(char)pCpu->param1.parval;
+    if (pCpu->Param1.fUse & DISUSE_IMMEDIATE8_REL)
+    {
+        disp = (int32_t)(char)pCpu->Param1.parval;
     }
     else
-    if (pCpu->param1.fUse & DISUSE_IMMEDIATE16_REL)
-    {
-        disp = (int32_t)(uint16_t)pCpu->param1.parval;
+    if (pCpu->Param1.fUse & DISUSE_IMMEDIATE16_REL)
+    {
+        disp = (int32_t)(uint16_t)pCpu->Param1.parval;
     }
     else
-    if (pCpu->param1.fUse & DISUSE_IMMEDIATE32_REL)
-    {
-        disp = (int32_t)pCpu->param1.parval;
+    if (pCpu->Param1.fUse & DISUSE_IMMEDIATE32_REL)
+    {
+        disp = (int32_t)pCpu->Param1.parval;
     }
     else
     {
-        Log(("We don't support far jumps here!! (%08X)\n", pCpu->param1.fUse));
+        Log(("We don't support far jumps here!! (%08X)\n", pCpu->Param1.fUse));
         return 0;
     }
Index: /trunk/src/VBox/VMM/include/PATMInternal.h
===================================================================
--- /trunk/src/VBox/VMM/include/PATMInternal.h	(revision 41738)
+++ /trunk/src/VBox/VMM/include/PATMInternal.h	(revision 41739)
@@ -761,21 +761,21 @@
 {
     uint32_t disp;
-    if (pCpu->param1.fUse & DISUSE_IMMEDIATE8_REL)
+    if (pCpu->Param1.fUse & DISUSE_IMMEDIATE8_REL)
     {
-        disp = (int32_t)(char)pCpu->param1.parval;
+        disp = (int32_t)(char)pCpu->Param1.parval;
     }
     else
-    if (pCpu->param1.fUse & DISUSE_IMMEDIATE16_REL)
+    if (pCpu->Param1.fUse & DISUSE_IMMEDIATE16_REL)
     {
-        disp = (int32_t)(uint16_t)pCpu->param1.parval;
+        disp = (int32_t)(uint16_t)pCpu->Param1.parval;
     }
     else
-    if (pCpu->param1.fUse & DISUSE_IMMEDIATE32_REL)
+    if (pCpu->Param1.fUse & DISUSE_IMMEDIATE32_REL)
     {
-        disp = (int32_t)pCpu->param1.parval;
+        disp = (int32_t)pCpu->Param1.parval;
     }
     else
     {
-        Log(("We don't support far jumps here!! (%08X)\n", pCpu->param1.fUse));
+        Log(("We don't support far jumps here!! (%08X)\n", pCpu->Param1.fUse));
         return 0;
     }
Index: /trunk/src/VBox/VMM/testcase/tstVMStruct.h
===================================================================
--- /trunk/src/VBox/VMM/testcase/tstVMStruct.h	(revision 41738)
+++ /trunk/src/VBox/VMM/testcase/tstVMStruct.h	(revision 41739)
@@ -1398,7 +1398,7 @@
 #ifndef VBOX_FOR_DTRACE_LIB
     GEN_CHECK_SIZE(DISCPUSTATE);
-    GEN_CHECK_OFF(DISCPUSTATE, param1);
-    GEN_CHECK_OFF(DISCPUSTATE, param2);
-    GEN_CHECK_OFF(DISCPUSTATE, param3);
+    GEN_CHECK_OFF(DISCPUSTATE, Param1);
+    GEN_CHECK_OFF(DISCPUSTATE, Param2);
+    GEN_CHECK_OFF(DISCPUSTATE, Param3);
     GEN_CHECK_OFF(DISCPUSTATE, i32SibDisp);
     GEN_CHECK_OFF(DISCPUSTATE, fFilter);