Index: /trunk/include/VBox/dis.h
===================================================================
--- /trunk/include/VBox/dis.h	(revision 41733)
+++ /trunk/include/VBox/dis.h	(revision 41734)
@@ -48,5 +48,5 @@
 } DISCPUMODE;
 
-/** @name Prefix byte flags (DISCPUSTATE::fRexPrefix).
+/** @name Prefix byte flags (DISCPUSTATE::fPrefix).
  * @{
  */
@@ -534,5 +534,5 @@
     uint8_t         opmode;
     /** Per instruction prefix settings. */
-    uint8_t         prefix;
+    uint8_t         fPrefix;
     /* off: 0x070 (112) */
     /** REX prefix value (64 bits only). */
Index: /trunk/src/VBox/Devices/PC/BIOS-new/MakeDebianBiosAssembly.cpp
===================================================================
--- /trunk/src/VBox/Devices/PC/BIOS-new/MakeDebianBiosAssembly.cpp	(revision 41733)
+++ /trunk/src/VBox/Devices/PC/BIOS-new/MakeDebianBiosAssembly.cpp	(revision 41734)
@@ -833,7 +833,7 @@
      *        modrm.reg != 0. Those encodings should be invalid AFAICT. */
 
-    if (   (   pCpuState->opcode  == 0x8f            /* group 1a */
-            || pCpuState->opcode  == 0xc7            /* group 11 */
-            || pCpuState->opcode  == 0xc6            /* group 11 - not verified */
+    if (   (   pCpuState->bOpCode  == 0x8f            /* group 1a */
+            || pCpuState->bOpCode  == 0xc7            /* group 11 */
+            || pCpuState->bOpCode  == 0xc6            /* group 11 - not verified */
            )
         && pCpuState->ModRM.Bits.Reg != 0)
@@ -841,5 +841,5 @@
     /** @todo "TEST Eb,Ib" (f6 0f 08) ends up with no mnemonic as well as
      *        wrong length (2 instead of 3)! */
-    else if (   pCpuState->opcode == 0xf6
+    else if (   pCpuState->bOpCode == 0xf6
              && pb[1] == 0x0f
              && pb[2] == 0x08
@@ -847,5 +847,5 @@
         fDifferent = true;
     /** @todo "INSB Yb,DX" (6c) ends up with no mnemonic here. */
-    else if (pCpuState->opcode == 0x6c && RT_C_IS_SPACE(*pszBuf))
+    else if (pCpuState->bOpCode == 0x6c && RT_C_IS_SPACE(*pszBuf))
         fDifferent = true;
     /*
Index: /trunk/src/VBox/Disassembler/DisasmCore.cpp
===================================================================
--- /trunk/src/VBox/Disassembler/DisasmCore.cpp	(revision 41733)
+++ /trunk/src/VBox/Disassembler/DisasmCore.cpp	(revision 41734)
@@ -304,5 +304,5 @@
         pCpu->opmode        = enmCpuMode;
     }
-    pCpu->prefix            = DISPREFIX_NONE;
+    pCpu->fPrefix           = DISPREFIX_NONE;
     pCpu->idxSegPrefix      = DISSELREG_DS;
     pCpu->uInstrAddr        = uInstrAddr;
@@ -346,5 +346,5 @@
                 /** Last prefix byte (for SSE2 extension tables); don't include the REX prefix */
                 pCpu->bLastPrefix = opcode;
-                pCpu->prefix &= ~DISPREFIX_REX;
+                pCpu->fPrefix &= ~DISPREFIX_REX;
             }
 
@@ -363,5 +363,5 @@
                     || pCpu->idxSegPrefix >= DISSELREG_FS)
                 {
-                    pCpu->prefix    |= DISPREFIX_SEG;
+                    pCpu->fPrefix   |= DISPREFIX_SEG;
                 }
                 iByte += sizeof(uint8_t);
@@ -370,5 +370,5 @@
             // lock prefix byte
             case OP_LOCK:
-                pCpu->prefix |= DISPREFIX_LOCK;
+                pCpu->fPrefix |= DISPREFIX_LOCK;
                 iByte       += sizeof(uint8_t);
                 continue;   //fetch the next byte
@@ -376,5 +376,5 @@
             // address size override prefix byte
             case OP_ADDRSIZE:
-                pCpu->prefix |= DISPREFIX_ADDRSIZE;
+                pCpu->fPrefix |= DISPREFIX_ADDRSIZE;
                 if (pCpu->mode == DISCPUMODE_16BIT)
                     pCpu->addrmode = DISCPUMODE_32BIT;
@@ -390,5 +390,5 @@
             // operand size override prefix byte
             case OP_OPSIZE:
-                pCpu->prefix |= DISPREFIX_OPSIZE;
+                pCpu->fPrefix |= DISPREFIX_OPSIZE;
                 if (pCpu->mode == DISCPUMODE_16BIT)
                     pCpu->opmode = DISCPUMODE_32BIT;
@@ -401,10 +401,10 @@
             // rep and repne are not really prefixes, but we'll treat them as such
             case OP_REPE:
-                pCpu->prefix |= DISPREFIX_REP;
+                pCpu->fPrefix |= DISPREFIX_REP;
                 iByte       += sizeof(uint8_t);
                 continue;   //fetch the next byte
 
             case OP_REPNE:
-                pCpu->prefix |= DISPREFIX_REPNE;
+                pCpu->fPrefix |= DISPREFIX_REPNE;
                 iByte       += sizeof(uint8_t);
                 continue;   //fetch the next byte
@@ -413,5 +413,5 @@
                 Assert(pCpu->mode == DISCPUMODE_64BIT);
                 /* REX prefix byte */
-                pCpu->prefix    |= DISPREFIX_REX;
+                pCpu->fPrefix   |= DISPREFIX_REX;
                 pCpu->fRexPrefix = DISPREFIX_REX_OP_2_FLAGS(paOneByteMap[codebyte].param1);
                 iByte           += sizeof(uint8_t);
@@ -438,5 +438,5 @@
         *pcbInstr = iByte;
 
-    if (pCpu->prefix & DISPREFIX_LOCK)
+    if (pCpu->fPrefix & DISPREFIX_LOCK)
         disValidateLockSequence(pCpu);
 
@@ -482,5 +482,5 @@
         else
         if (    (pOp->optype & DISOPTYPE_DEFAULT_64_OP_SIZE)
-            &&  !(pCpu->prefix & DISPREFIX_OPSIZE))
+            &&  !(pCpu->fPrefix & DISPREFIX_OPSIZE))
             pCpu->opmode = DISCPUMODE_64BIT;
     }
@@ -561,5 +561,5 @@
         else
         if (    (fpop->optype & DISOPTYPE_DEFAULT_64_OP_SIZE)
-            &&  !(pCpu->prefix & DISPREFIX_OPSIZE))
+            &&  !(pCpu->fPrefix & DISPREFIX_OPSIZE))
             pCpu->opmode = DISCPUMODE_64BIT;
     }
@@ -662,5 +662,5 @@
     pCpu->SIB.Bits.Scale = SIB_SCALE(SIB);
 
-    if (pCpu->prefix & DISPREFIX_REX)
+    if (pCpu->fPrefix & DISPREFIX_REX)
     {
         /* REX.B extends the Base field if not scaled index + disp32 */
@@ -695,5 +695,5 @@
     pCpu->SIB.Bits.Scale = SIB_SCALE(SIB);
 
-    if (pCpu->prefix & DISPREFIX_REX)
+    if (pCpu->fPrefix & DISPREFIX_REX)
     {
         /* REX.B extends the Base field. */
@@ -739,7 +739,7 @@
                 if (    pCpu->pCurInstr->opcode == OP_MOV_CR
                     &&  pCpu->opmode == DISCPUMODE_32BIT
-                    &&  (pCpu->prefix & DISPREFIX_LOCK))
+                    &&  (pCpu->fPrefix & DISPREFIX_LOCK))
                 {
-                    pCpu->prefix &= ~DISPREFIX_LOCK;
+                    pCpu->fPrefix &= ~DISPREFIX_LOCK;
                     pParam->base.reg_ctrl = DISCREG_CR8;
                 }
@@ -1080,5 +1080,5 @@
         pCpu->ModRM.Bits.Mod = 3;
 
-    if (pCpu->prefix & DISPREFIX_REX)
+    if (pCpu->fPrefix & DISPREFIX_REX)
     {
         Assert(pCpu->mode == DISCPUMODE_64BIT);
@@ -1126,5 +1126,5 @@
         pCpu->ModRM.Bits.Mod = 3;
 
-    if (pCpu->prefix & DISPREFIX_REX)
+    if (pCpu->fPrefix & DISPREFIX_REX)
     {
         Assert(pCpu->mode == DISCPUMODE_64BIT);
@@ -1570,5 +1570,5 @@
             if (    (pOp->optype & DISOPTYPE_REXB_EXTENDS_OPREG)
                 &&  pParam == &pCpu->param1             /* ugly assumption that it only applies to the first parameter */
-                &&  (pCpu->prefix & DISPREFIX_REX)
+                &&  (pCpu->fPrefix & DISPREFIX_REX)
                 &&  (pCpu->fRexPrefix & DISPREFIX_REX_FLAGS))
                 pParam->base.reg_gen += 8;
@@ -1614,5 +1614,5 @@
             if (    (pOp->optype & DISOPTYPE_REXB_EXTENDS_OPREG)
                 &&  pParam == &pCpu->param1             /* ugly assumption that it only applies to the first parameter */
-                &&  (pCpu->prefix & DISPREFIX_REX)
+                &&  (pCpu->fPrefix & DISPREFIX_REX)
                 &&  (pCpu->fRexPrefix & DISPREFIX_REX_FLAGS))
                 pParam->base.reg_gen += 8;              /* least significant byte of R8-R15 */
@@ -1760,5 +1760,5 @@
 
                 /* Cancel prefix changes. */
-                pCpu->prefix &= ~DISPREFIX_OPSIZE;
+                pCpu->fPrefix &= ~DISPREFIX_OPSIZE;
                 pCpu->opmode  = pCpu->mode;
             }
@@ -1772,5 +1772,5 @@
 
                 /* Cancel prefix changes. */
-                pCpu->prefix &= ~DISPREFIX_REPNE;
+                pCpu->fPrefix &= ~DISPREFIX_REPNE;
             }
             break;
@@ -1783,5 +1783,5 @@
 
                 /* Cancel prefix changes. */
-                pCpu->prefix &= ~DISPREFIX_REP;
+                pCpu->fPrefix &= ~DISPREFIX_REP;
             }
             break;
@@ -1827,5 +1827,5 @@
 
                 /* Cancel prefix changes. */
-                pCpu->prefix &= ~DISPREFIX_OPSIZE;
+                pCpu->fPrefix &= ~DISPREFIX_OPSIZE;
                 pCpu->opmode  = pCpu->mode;
             }
@@ -1844,5 +1844,5 @@
 
                 /* Cancel prefix changes. */
-                pCpu->prefix &= ~DISPREFIX_REPNE;
+                pCpu->fPrefix &= ~DISPREFIX_REPNE;
             }
         }
@@ -1878,5 +1878,5 @@
 
             /* Cancel prefix changes. */
-            pCpu->prefix &= ~DISPREFIX_OPSIZE;
+            pCpu->fPrefix &= ~DISPREFIX_OPSIZE;
             pCpu->opmode  = pCpu->mode;
         }
@@ -1895,8 +1895,8 @@
     NOREF(pParam);
 
-    if (pCpu->prefix & DISPREFIX_REP)
+    if (pCpu->fPrefix & DISPREFIX_REP)
     {
         pOp = &g_aMapX86_NopPause[1]; /* PAUSE */
-        pCpu->prefix &= ~DISPREFIX_REP;
+        pCpu->fPrefix &= ~DISPREFIX_REP;
     }
     else
@@ -2185,5 +2185,5 @@
     reg   = MODRM_REG(modrm);
 
-    if (pCpu->prefix & DISPREFIX_OPSIZE)
+    if (pCpu->fPrefix & DISPREFIX_OPSIZE)
         reg += 8;   //2nd table
 
@@ -2206,5 +2206,5 @@
     modrm = disReadByte(pCpu, uCodePtr);
     reg   = MODRM_REG(modrm);
-    if (pCpu->prefix & DISPREFIX_OPSIZE)
+    if (pCpu->fPrefix & DISPREFIX_OPSIZE)
         reg += 8;   //2nd table
 
@@ -2228,5 +2228,5 @@
     modrm = disReadByte(pCpu, uCodePtr);
     reg   = MODRM_REG(modrm);
-    if (pCpu->prefix & DISPREFIX_OPSIZE)
+    if (pCpu->fPrefix & DISPREFIX_OPSIZE)
         reg += 8;   //2nd table
 
@@ -2330,9 +2330,9 @@
     {
     case OP_PARM_b:
-        Assert(idx < (pCpu->prefix & DISPREFIX_REX ? 16U : 8U));
+        Assert(idx < (pCpu->fPrefix & DISPREFIX_REX ? 16U : 8U));
 
         /* AH, BH, CH & DH map to DIL, SIL, EBL & SPL when a rex prefix is present. */
         /* Intel® 64 and IA-32 Architectures Software Developer’s Manual: 3.4.1.1 */
-        if (    (pCpu->prefix & DISPREFIX_REX)
+        if (    (pCpu->fPrefix & DISPREFIX_REX)
             &&  idx >= DISGREG_AH
             &&  idx <= DISGREG_BH)
@@ -2346,5 +2346,5 @@
 
     case OP_PARM_w:
-        Assert(idx < (pCpu->prefix & DISPREFIX_REX ? 16U : 8U));
+        Assert(idx < (pCpu->fPrefix & DISPREFIX_REX ? 16U : 8U));
 
         pParam->fUse |= DISUSE_REG_GEN16;
@@ -2353,5 +2353,5 @@
 
     case OP_PARM_d:
-        Assert(idx < (pCpu->prefix & DISPREFIX_REX ? 16U : 8U));
+        Assert(idx < (pCpu->fPrefix & DISPREFIX_REX ? 16U : 8U));
 
         pParam->fUse |= DISUSE_REG_GEN32;
@@ -2618,5 +2618,5 @@
 static void disValidateLockSequence(PDISCPUSTATE pCpu)
 {
-    Assert(pCpu->prefix & DISPREFIX_LOCK);
+    Assert(pCpu->fPrefix & DISPREFIX_LOCK);
 
     /*
Index: /trunk/src/VBox/Disassembler/DisasmFormatYasm.cpp
===================================================================
--- /trunk/src/VBox/Disassembler/DisasmFormatYasm.cpp	(revision 41733)
+++ /trunk/src/VBox/Disassembler/DisasmFormatYasm.cpp	(revision 41734)
@@ -392,5 +392,5 @@
     if (    pOp->opcode == OP_INVALID
         ||  (   pOp->opcode == OP_ILLUD2
-             && (pCpu->prefix & DISPREFIX_LOCK)))
+             && (pCpu->fPrefix & DISPREFIX_LOCK)))
     {
 
@@ -401,9 +401,9 @@
          * Prefixes
          */
-        if (pCpu->prefix & DISPREFIX_LOCK)
+        if (pCpu->fPrefix & DISPREFIX_LOCK)
             PUT_SZ("lock ");
-        if(pCpu->prefix & DISPREFIX_REP)
+        if(pCpu->fPrefix & DISPREFIX_REP)
             PUT_SZ("rep ");
-        else if(pCpu->prefix & DISPREFIX_REPNE)
+        else if(pCpu->fPrefix & DISPREFIX_REPNE)
             PUT_SZ("repne ");
 
@@ -604,5 +604,5 @@
 #define PUT_SEGMENT_OVERRIDE() \
         do { \
-            if (pCpu->prefix & DISPREFIX_SEG) \
+            if (pCpu->fPrefix & DISPREFIX_SEG) \
                 PUT_STR(s_szSegPrefix[pCpu->idxSegPrefix], 3); \
         } while (0)
@@ -612,5 +612,5 @@
          * Segment prefixing for instructions that doesn't do memory access.
          */
-        if (    (pCpu->prefix & DISPREFIX_SEG)
+        if (    (pCpu->fPrefix & DISPREFIX_SEG)
             &&  !DISUSE_IS_EFFECTIVE_ADDR(pCpu->param1.fUse)
             &&  !DISUSE_IS_EFFECTIVE_ADDR(pCpu->param2.fUse)
@@ -1291,5 +1291,5 @@
     {
         /* no effective address which it may apply to. */
-        Assert((pCpu->prefix & DISPREFIX_SEG) || pCpu->mode == DISCPUMODE_64BIT);
+        Assert((pCpu->fPrefix & DISPREFIX_SEG) || pCpu->mode == DISCPUMODE_64BIT);
         if (    !DISUSE_IS_EFFECTIVE_ADDR(pCpu->param1.fUse)
             &&  !DISUSE_IS_EFFECTIVE_ADDR(pCpu->param2.fUse)
@@ -1301,5 +1301,5 @@
     if (fPrefixes & DISPREFIX_ADDRSIZE)
     {
-        Assert(pCpu->prefix & DISPREFIX_ADDRSIZE);
+        Assert(pCpu->fPrefix & DISPREFIX_ADDRSIZE);
         if (    pCpu->pCurInstr->param3 == OP_PARM_NONE
             &&  pCpu->pCurInstr->param2 == OP_PARM_NONE
Index: /trunk/src/VBox/Disassembler/DisasmReg.cpp
===================================================================
--- /trunk/src/VBox/Disassembler/DisasmReg.cpp	(revision 41733)
+++ /trunk/src/VBox/Disassembler/DisasmReg.cpp	(revision 41734)
@@ -259,5 +259,5 @@
 DISDECL(DISSELREG) DISDetectSegReg(PDISCPUSTATE pCpu, PDISOPPARAM pParam)
 {
-    if (pCpu->prefix & DISPREFIX_SEG)
+    if (pCpu->fPrefix & DISPREFIX_SEG)
         /* Use specified SEG: prefix. */
         return (DISSELREG)pCpu->idxSegPrefix;
@@ -280,5 +280,5 @@
 DISDECL(uint8_t) DISQuerySegPrefixByte(PDISCPUSTATE pCpu)
 {
-    Assert(pCpu->prefix & DISPREFIX_SEG);
+    Assert(pCpu->fPrefix & DISPREFIX_SEG);
     switch (pCpu->idxSegPrefix)
     {
Index: /trunk/src/VBox/Runtime/testcase/tstLdrDisasmTest.cpp
===================================================================
--- /trunk/src/VBox/Runtime/testcase/tstLdrDisasmTest.cpp	(revision 41733)
+++ /trunk/src/VBox/Runtime/testcase/tstLdrDisasmTest.cpp	(revision 41734)
@@ -107,6 +107,6 @@
     int rc = DISInstrWithReader(CodeIndex, DISCPUMODE_32BIT, DisasmTest1ReadCode, 0, pCpu, &cb);
     *pcb = cb;
-    MY_PRINTF(("DISCoreOneEx -> rc=%d cb=%d  Cpu: opcode=%#x pCurInstr=%p (42=%d)\n", \
-               rc, cb, pCpu->opcode, pCpu->pCurInstr, 42)); \
+    MY_PRINTF(("DISCoreOneEx -> rc=%d cb=%d  Cpu: bOpCode=%#x pCurInstr=%p (42=%d)\n", \
+               rc, cb, pCpu->bOpCode, pCpu->pCurInstr, 42)); \
     return rc;
 }
Index: /trunk/src/VBox/VMM/VMMAll/EMAll.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMAll/EMAll.cpp	(revision 41733)
+++ /trunk/src/VBox/VMM/VMMAll/EMAll.cpp	(revision 41734)
@@ -789,6 +789,6 @@
         case OP_LMSW:       return "Lmsw";
         case OP_SMSW:       return "Smsw";
-        case OP_CMPXCHG:    return pDis->prefix & DISPREFIX_LOCK ? "Lock CmpXchg"   : "CmpXchg";
-        case OP_CMPXCHG8B:  return pDis->prefix & DISPREFIX_LOCK ? "Lock CmpXchg8b" : "CmpXchg8b";
+        case OP_CMPXCHG:    return pDis->fPrefix & DISPREFIX_LOCK ? "Lock CmpXchg"   : "CmpXchg";
+        case OP_CMPXCHG8B:  return pDis->fPrefix & DISPREFIX_LOCK ? "Lock CmpXchg8b" : "CmpXchg8b";
 
         default:
@@ -1652,5 +1652,5 @@
 
     /* Don't support any but these three prefix bytes. */
-    if ((pDis->prefix & ~(DISPREFIX_ADDRSIZE|DISPREFIX_OPSIZE|DISPREFIX_REP|DISPREFIX_REX)))
+    if ((pDis->fPrefix & ~(DISPREFIX_ADDRSIZE|DISPREFIX_OPSIZE|DISPREFIX_REP|DISPREFIX_REX)))
         return VERR_EM_INTERPRETER;
 
@@ -1693,5 +1693,5 @@
     offIncrement = pRegFrame->eflags.Bits.u1DF ? -(signed)cbSize : (signed)cbSize;
 
-    if (!(pDis->prefix & DISPREFIX_REP))
+    if (!(pDis->fPrefix & DISPREFIX_REP))
     {
         LogFlow(("emInterpretStosWD dest=%04X:%RGv (%RGv) cbSize=%d\n", pRegFrame->es, GCOffset, GCDest, cbSize));
@@ -1848,5 +1848,5 @@
     LogFlow(("%s %RGv rax=%RX64 %RX64\n", emGetMnemonic(pDis), GCPtrPar1, pRegFrame->rax, valpar));
 
-    if (pDis->prefix & DISPREFIX_LOCK)
+    if (pDis->fPrefix & DISPREFIX_LOCK)
         eflags = EMEmulateLockCmpXchg(pvParam1, &pRegFrame->rax, valpar, pDis->param2.cb);
     else
@@ -1901,5 +1901,5 @@
     LogFlow(("%s %RGv=%08x eax=%08x\n", emGetMnemonic(pDis), pvParam1, pRegFrame->eax));
 
-    if (pDis->prefix & DISPREFIX_LOCK)
+    if (pDis->fPrefix & DISPREFIX_LOCK)
         eflags = EMEmulateLockCmpXchg8b(pvParam1, &pRegFrame->eax, &pRegFrame->edx, pRegFrame->ebx, pRegFrame->ecx);
     else
@@ -1970,5 +1970,5 @@
             LogFlow(("XAdd %RGv=%p reg=%08llx\n", GCPtrPar1, pvParam1, *(uint64_t *)pvParamReg2));
 
-            if (pDis->prefix & DISPREFIX_LOCK)
+            if (pDis->fPrefix & DISPREFIX_LOCK)
                 eflags = EMEmulateLockXAdd(pvParam1, pvParamReg2, cbParamReg2);
             else
@@ -2654,5 +2654,5 @@
     AssertRCReturn(rc, VERR_EM_INTERPRETER);
 
-    if (!(pDis->prefix & DISPREFIX_OPSIZE))
+    if (!(pDis->fPrefix & DISPREFIX_OPSIZE))
         dtr32.uAddr &= 0xffffff; /* 16 bits operand size */
 
@@ -3030,5 +3030,5 @@
     /* Note: The Intel manual claims there's a REX version of RDMSR that's slightly
              different, so we play safe by completely disassembling the instruction. */
-    Assert(!(pDis->prefix & DISPREFIX_REX));
+    Assert(!(pDis->fPrefix & DISPREFIX_REX));
     NOREF(pDis); NOREF(pvFault); NOREF(pcbSize);
     return EMInterpretRdmsr(pVM, pVCpu, pRegFrame);
@@ -3104,6 +3104,6 @@
 
 #ifdef IN_RC
-    if (    (pDis->prefix & (DISPREFIX_REPNE | DISPREFIX_REP))
-        ||  (   (pDis->prefix & DISPREFIX_LOCK)
+    if (    (pDis->fPrefix & (DISPREFIX_REPNE | DISPREFIX_REP))
+        ||  (   (pDis->fPrefix & DISPREFIX_LOCK)
              && pDis->pCurInstr->opcode != OP_CMPXCHG
              && pDis->pCurInstr->opcode != OP_CMPXCHG8B
@@ -3116,9 +3116,9 @@
        )
 #else
-    if (    (pDis->prefix & DISPREFIX_REPNE)
-        ||  (   (pDis->prefix & DISPREFIX_REP)
+    if (    (pDis->fPrefix & DISPREFIX_REPNE)
+        ||  (   (pDis->fPrefix & DISPREFIX_REP)
              && pDis->pCurInstr->opcode != OP_STOSWD
             )
-        ||  (   (pDis->prefix & DISPREFIX_LOCK)
+        ||  (   (pDis->fPrefix & DISPREFIX_LOCK)
              && pDis->pCurInstr->opcode != OP_OR
              && pDis->pCurInstr->opcode != OP_AND
@@ -3228,5 +3228,5 @@
 # define INTERPRET_CASE_EX_LOCK_PARAM3(opcode, Instr, InstrFn, pfnEmulate, pfnEmulateLock) \
         case opcode:\
-            if (pDis->prefix & DISPREFIX_LOCK) \
+            if (pDis->fPrefix & DISPREFIX_LOCK) \
                 rc = emInterpretLock##InstrFn(pVM, pVCpu, pDis, pRegFrame, pvFault, pcbSize, pfnEmulateLock); \
             else \
Index: /trunk/src/VBox/VMM/VMMAll/IOMAllMMIO.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMAll/IOMAllMMIO.cpp	(revision 41733)
+++ /trunk/src/VBox/VMM/VMMAll/IOMAllMMIO.cpp	(revision 41734)
@@ -670,5 +670,5 @@
      * We do not support segment prefixes or REPNE.
      */
-    if (pCpu->prefix & (DISPREFIX_SEG | DISPREFIX_REPNE))
+    if (pCpu->fPrefix & (DISPREFIX_SEG | DISPREFIX_REPNE))
         return VINF_IOM_R3_MMIO_READ_WRITE; /** @todo -> interpret whatever. */
 
@@ -679,5 +679,5 @@
      */
     uint32_t cTransfers = 1;
-    if (pCpu->prefix & DISPREFIX_REP)
+    if (pCpu->fPrefix & DISPREFIX_REP)
     {
 #ifndef IN_RC
@@ -767,5 +767,5 @@
 #endif
             /* Update ecx. */
-            if (pCpu->prefix & DISPREFIX_REP)
+            if (pCpu->fPrefix & DISPREFIX_REP)
                 pRegFrame->ecx = cTransfers;
         }
@@ -875,5 +875,5 @@
 
         /* Update ecx on exit. */
-        if (pCpu->prefix & DISPREFIX_REP)
+        if (pCpu->fPrefix & DISPREFIX_REP)
             pRegFrame->ecx = cTransfers;
     }
@@ -928,5 +928,5 @@
      * We do not support segment prefixes or REPNE..
      */
-    if (pCpu->prefix & (DISPREFIX_SEG | DISPREFIX_REPNE))
+    if (pCpu->fPrefix & (DISPREFIX_SEG | DISPREFIX_REPNE))
         return VINF_IOM_R3_MMIO_READ_WRITE; /** @todo -> REM instead of HC */
 
@@ -936,5 +936,5 @@
     uint64_t const fAddrMask = iomDisModeToMask((DISCPUMODE)pCpu->addrmode);
     RTGCUINTREG cTransfers = 1;
-    if (pCpu->prefix & DISPREFIX_REP)
+    if (pCpu->fPrefix & DISPREFIX_REP)
     {
 #ifndef IN_RC
@@ -983,5 +983,5 @@
                 pRegFrame->rdi = ((pRegFrame->rdi + (cTransfers << SIZE_2_SHIFT(cb))) & fAddrMask)
                                | (pRegFrame->rdi & ~fAddrMask);
-                if (pCpu->prefix & DISPREFIX_REP)
+                if (pCpu->fPrefix & DISPREFIX_REP)
                     pRegFrame->rcx &= ~fAddrMask;
             }
@@ -998,5 +998,5 @@
                 pRegFrame->rdi = ((pRegFrame->rdi - (cTransfers << SIZE_2_SHIFT(cb))) & fAddrMask)
                                | (pRegFrame->rdi & ~fAddrMask);
-                if (pCpu->prefix & DISPREFIX_REP)
+                if (pCpu->fPrefix & DISPREFIX_REP)
                     pRegFrame->rcx &= ~fAddrMask;
             }
@@ -1025,5 +1025,5 @@
 
         /* Update rcx on exit. */
-        if (pCpu->prefix & DISPREFIX_REP)
+        if (pCpu->fPrefix & DISPREFIX_REP)
             pRegFrame->rcx = (cTransfers & fAddrMask)
                            | (pRegFrame->rcx & ~fAddrMask);
@@ -1062,5 +1062,5 @@
      * We do not support segment prefixes or REP*.
      */
-    if (pCpu->prefix & (DISPREFIX_SEG | DISPREFIX_REP | DISPREFIX_REPNE))
+    if (pCpu->fPrefix & (DISPREFIX_SEG | DISPREFIX_REP | DISPREFIX_REPNE))
         return VINF_IOM_R3_MMIO_READ_WRITE; /** @todo -> REM instead of HC */
 
@@ -2156,5 +2156,5 @@
     }
 
-    return IOMInterpretINSEx(pVM, pRegFrame, Port, pCpu->prefix, (DISCPUMODE)pCpu->addrmode, cb);
+    return IOMInterpretINSEx(pVM, pRegFrame, Port, pCpu->fPrefix, (DISCPUMODE)pCpu->addrmode, cb);
 }
 
@@ -2325,5 +2325,5 @@
     }
 
-    return IOMInterpretOUTSEx(pVM, pRegFrame, Port, pCpu->prefix, (DISCPUMODE)pCpu->addrmode, cb);
+    return IOMInterpretOUTSEx(pVM, pRegFrame, Port, pCpu->fPrefix, (DISCPUMODE)pCpu->addrmode, cb);
 }
 
Index: /trunk/src/VBox/VMM/VMMAll/PGMAllPhys.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMAll/PGMAllPhys.cpp	(revision 41733)
+++ /trunk/src/VBox/VMM/VMMAll/PGMAllPhys.cpp	(revision 41734)
@@ -108,5 +108,5 @@
             if (     RT_SUCCESS(rc)
                 &&   pDis->mode == DISCPUMODE_32BIT  /** @todo why does this matter? */
-                &&  !(pDis->prefix & (DISPREFIX_REPNE | DISPREFIX_REP | DISPREFIX_SEG)))
+                &&  !(pDis->fPrefix & (DISPREFIX_REPNE | DISPREFIX_REP | DISPREFIX_SEG)))
             {
                 switch (pDis->bOpCode)
Index: /trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp	(revision 41733)
+++ /trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp	(revision 41734)
@@ -793,5 +793,5 @@
         case OP_MOVSWD:
         case OP_STOSWD:
-            if (    pDis->prefix == (DISPREFIX_REP|DISPREFIX_REX)
+            if (    pDis->fPrefix == (DISPREFIX_REP|DISPREFIX_REX)
                 &&  pRegFrame->rcx >= 0x40
                )
@@ -1155,5 +1155,5 @@
          * Simple instructions, no REP prefix.
          */
-        if (!(pDis->prefix & (DISPREFIX_REP | DISPREFIX_REPNE)))
+        if (!(pDis->fPrefix & (DISPREFIX_REP | DISPREFIX_REPNE)))
         {
             rc = pgmPoolAccessHandlerSimple(pVM, pVCpu, pPool, pPage, pDis, pRegFrame, GCPhysFault, pvFault, &fReused);
@@ -1204,5 +1204,5 @@
 
             if (    pDis->mode == DISCPUMODE_32BIT
-                &&  pDis->prefix == DISPREFIX_REP
+                &&  pDis->fPrefix == DISPREFIX_REP
                 &&  pRegFrame->ecx <= 0x20
                 &&  pRegFrame->ecx * 4 <= PAGE_SIZE - ((uintptr_t)pvFault & PAGE_OFFSET_MASK)
@@ -1216,5 +1216,5 @@
             else
             if (    pDis->mode == DISCPUMODE_64BIT
-                &&  pDis->prefix == (DISPREFIX_REP | DISPREFIX_REX)
+                &&  pDis->fPrefix == (DISPREFIX_REP | DISPREFIX_REX)
                 &&  pRegFrame->rcx <= 0x20
                 &&  pRegFrame->rcx * 8 <= PAGE_SIZE - ((uintptr_t)pvFault & PAGE_OFFSET_MASK)
@@ -1238,5 +1238,5 @@
         STAM_COUNTER_INC(&pPool->CTX_MID_Z(StatMonitor,RepPrefix));
         Log4(("pgmPoolAccessHandler: eax=%#x ecx=%#x edi=%#x esi=%#x rip=%RGv opcode=%d prefix=%#x\n",
-              pRegFrame->eax, pRegFrame->ecx, pRegFrame->edi, pRegFrame->esi, (RTGCPTR)pRegFrame->rip, pDis->pCurInstr->opcode, pDis->prefix));
+              pRegFrame->eax, pRegFrame->ecx, pRegFrame->edi, pRegFrame->esi, (RTGCPTR)pRegFrame->rip, pDis->pCurInstr->opcode, pDis->fPrefix));
         fNotReusedNotForking = true;
     }
Index: /trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp	(revision 41733)
+++ /trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp	(revision 41734)
@@ -2418,5 +2418,5 @@
                     Log2(("IOMInterpretOUTSEx %RGv %x size=%d\n", (RTGCPTR)pCtx->rip, IoExitInfo.n.u16Port, uIOSize));
                     STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitIOStringWrite);
-                    rc = IOMInterpretOUTSEx(pVM, CPUMCTX2CORE(pCtx), IoExitInfo.n.u16Port, pDis->prefix, (DISCPUMODE)pDis->addrmode, uIOSize);
+                    rc = IOMInterpretOUTSEx(pVM, CPUMCTX2CORE(pCtx), IoExitInfo.n.u16Port, pDis->fPrefix, (DISCPUMODE)pDis->addrmode, uIOSize);
                 }
                 else
@@ -2424,5 +2424,5 @@
                     Log2(("IOMInterpretINSEx  %RGv %x size=%d\n", (RTGCPTR)pCtx->rip, IoExitInfo.n.u16Port, uIOSize));
                     STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitIOStringRead);
-                    rc = IOMInterpretINSEx(pVM, CPUMCTX2CORE(pCtx), IoExitInfo.n.u16Port, pDis->prefix, (DISCPUMODE)pDis->addrmode, uIOSize);
+                    rc = IOMInterpretINSEx(pVM, CPUMCTX2CORE(pCtx), IoExitInfo.n.u16Port, pDis->fPrefix, (DISCPUMODE)pDis->addrmode, uIOSize);
                 }
             }
Index: /trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp	(revision 41733)
+++ /trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp	(revision 41734)
@@ -3585,5 +3585,5 @@
                         X86EFLAGS eflags;
 
-                        if (pDis->prefix & DISPREFIX_OPSIZE)
+                        if (pDis->fPrefix & DISPREFIX_OPSIZE)
                         {
                             cbParm = 4;
@@ -3627,5 +3627,5 @@
                         X86EFLAGS eflags;
 
-                        if (pDis->prefix & DISPREFIX_OPSIZE)
+                        if (pDis->fPrefix & DISPREFIX_OPSIZE)
                         {
                             cbParm = 4;
@@ -3669,5 +3669,5 @@
                         uint16_t  aIretFrame[3];
 
-                        if (pDis->prefix & (DISPREFIX_OPSIZE | DISPREFIX_ADDRSIZE))
+                        if (pDis->fPrefix & (DISPREFIX_OPSIZE | DISPREFIX_ADDRSIZE))
                         {
                             rc = VERR_EM_INTERPRETER;
@@ -4321,5 +4321,5 @@
                     Log2(("IOMInterpretOUTSEx %RGv %x size=%d\n", (RTGCPTR)pCtx->rip, uPort, cbSize));
                     STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitIOStringWrite);
-                    rc = IOMInterpretOUTSEx(pVM, CPUMCTX2CORE(pCtx), uPort, pDis->prefix, (DISCPUMODE)pDis->addrmode, cbSize);
+                    rc = IOMInterpretOUTSEx(pVM, CPUMCTX2CORE(pCtx), uPort, pDis->fPrefix, (DISCPUMODE)pDis->addrmode, cbSize);
                 }
                 else
@@ -4327,5 +4327,5 @@
                     Log2(("IOMInterpretINSEx  %RGv %x size=%d\n", (RTGCPTR)pCtx->rip, uPort, cbSize));
                     STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitIOStringRead);
-                    rc = IOMInterpretINSEx(pVM, CPUMCTX2CORE(pCtx), uPort, pDis->prefix, (DISCPUMODE)pDis->addrmode, cbSize);
+                    rc = IOMInterpretINSEx(pVM, CPUMCTX2CORE(pCtx), uPort, pDis->fPrefix, (DISCPUMODE)pDis->addrmode, cbSize);
                 }
             }
Index: /trunk/src/VBox/VMM/VMMR3/EMHwaccm.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMR3/EMHwaccm.cpp	(revision 41733)
+++ /trunk/src/VBox/VMM/VMMR3/EMHwaccm.cpp	(revision 41734)
@@ -307,5 +307,5 @@
         rcStrict = VINF_EM_RAW_EMULATE_INSTR;
 
-        if (!(Cpu.prefix & (DISPREFIX_REP | DISPREFIX_REPNE)))
+        if (!(Cpu.fPrefix & (DISPREFIX_REP | DISPREFIX_REPNE)))
         {
             switch (Cpu.pCurInstr->opcode)
@@ -326,5 +326,5 @@
             }
         }
-        else if (Cpu.prefix & DISPREFIX_REP)
+        else if (Cpu.fPrefix & DISPREFIX_REP)
         {
             switch (Cpu.pCurInstr->opcode)
Index: /trunk/src/VBox/VMM/VMMR3/EMRaw.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMR3/EMRaw.cpp	(revision 41733)
+++ /trunk/src/VBox/VMM/VMMR3/EMRaw.cpp	(revision 41734)
@@ -428,5 +428,5 @@
         VBOXSTRICTRC rcStrict = VINF_EM_RAW_EMULATE_INSTR;
 
-        if (!(Cpu.prefix & (DISPREFIX_REP | DISPREFIX_REPNE)))
+        if (!(Cpu.fPrefix & (DISPREFIX_REP | DISPREFIX_REPNE)))
         {
             switch (Cpu.pCurInstr->opcode)
@@ -447,5 +447,5 @@
             }
         }
-        else if (Cpu.prefix & DISPREFIX_REP)
+        else if (Cpu.fPrefix & DISPREFIX_REP)
         {
             switch (Cpu.pCurInstr->opcode)
Index: /trunk/src/VBox/VMM/VMMR3/PATM.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMR3/PATM.cpp	(revision 41733)
+++ /trunk/src/VBox/VMM/VMMR3/PATM.cpp	(revision 41734)
@@ -1654,5 +1654,5 @@
          */
         Log(("patmRecompileCallback: jump to code we've recompiled before %RRv!\n", pCurInstrGC));
-        return patmPatchGenRelJump(pVM, pPatch, pCurInstrGC, OP_JMP, !!(pCpu->prefix & DISPREFIX_OPSIZE));
+        return patmPatchGenRelJump(pVM, pPatch, pCurInstrGC, OP_JMP, !!(pCpu->fPrefix & DISPREFIX_OPSIZE));
     }
 
@@ -1713,5 +1713,5 @@
         }
         else
-            rc = patmPatchGenRelJump(pVM, pPatch, pTargetGC, pCpu->pCurInstr->opcode, !!(pCpu->prefix & DISPREFIX_OPSIZE));
+            rc = patmPatchGenRelJump(pVM, pPatch, pTargetGC, pCpu->pCurInstr->opcode, !!(pCpu->fPrefix & DISPREFIX_OPSIZE));
 
         if (RT_SUCCESS(rc))
@@ -1855,5 +1855,5 @@
             fGenerateJmpBack = false;
 
-        rc = patmPatchGenPopf(pVM, pPatch, pCurInstrGC + pCpu->cbInstr, !!(pCpu->prefix & DISPREFIX_OPSIZE), fGenerateJmpBack);
+        rc = patmPatchGenPopf(pVM, pPatch, pCurInstrGC + pCpu->cbInstr, !!(pCpu->fPrefix & DISPREFIX_OPSIZE), fGenerateJmpBack);
         if (RT_SUCCESS(rc))
         {
@@ -1873,5 +1873,5 @@
 
     case OP_PUSHF:
-        rc = patmPatchGenPushf(pVM, pPatch, !!(pCpu->prefix & DISPREFIX_OPSIZE));
+        rc = patmPatchGenPushf(pVM, pPatch, !!(pCpu->fPrefix & DISPREFIX_OPSIZE));
         if (RT_SUCCESS(rc))
             rc = VWRN_CONTINUE_RECOMPILE;
@@ -1890,5 +1890,5 @@
     case OP_IRET:
         Log(("IRET at %RRv\n", pCurInstrGC));
-        rc = patmPatchGenIret(pVM, pPatch, pCurInstrGC, !!(pCpu->prefix & DISPREFIX_OPSIZE));
+        rc = patmPatchGenIret(pVM, pPatch, pCurInstrGC, !!(pCpu->fPrefix & DISPREFIX_OPSIZE));
         if (RT_SUCCESS(rc))
         {
Index: /trunk/src/VBox/VMM/VMMR3/PATMPatch.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMR3/PATMPatch.cpp	(revision 41733)
+++ /trunk/src/VBox/VMM/VMMR3/PATMPatch.cpp	(revision 41734)
@@ -702,12 +702,12 @@
         offset = 0;
         /* include prefix byte to make sure we don't use the incorrect selector register. */
-        if (pCpu->prefix & DISPREFIX_SEG)
+        if (pCpu->fPrefix & DISPREFIX_SEG)
             pPB[offset++] = DISQuerySegPrefixByte(pCpu);
         pPB[offset++] = 0xFF;              // push r/m32
         pPB[offset++] = MAKE_MODRM(pCpu->ModRM.Bits.Mod, 6 /* group 5 */, pCpu->ModRM.Bits.Rm);
         i = 2;  /* standard offset of modrm bytes */
-        if (pCpu->prefix & DISPREFIX_OPSIZE)
+        if (pCpu->fPrefix & DISPREFIX_OPSIZE)
             i++;    //skip operand prefix
-        if (pCpu->prefix & DISPREFIX_SEG)
+        if (pCpu->fPrefix & DISPREFIX_SEG)
             i++;    //skip segment prefix
 
@@ -798,5 +798,5 @@
     offset = 0;
     /* include prefix byte to make sure we don't use the incorrect selector register. */
-    if (pCpu->prefix & DISPREFIX_SEG)
+    if (pCpu->fPrefix & DISPREFIX_SEG)
         pPB[offset++] = DISQuerySegPrefixByte(pCpu);
 
@@ -804,7 +804,7 @@
     pPB[offset++] = MAKE_MODRM(pCpu->ModRM.Bits.Mod, 6 /* group 5 */, pCpu->ModRM.Bits.Rm);
     i = 2;  /* standard offset of modrm bytes */
-    if (pCpu->prefix & DISPREFIX_OPSIZE)
+    if (pCpu->fPrefix & DISPREFIX_OPSIZE)
         i++;    //skip operand prefix
-    if (pCpu->prefix & DISPREFIX_SEG)
+    if (pCpu->fPrefix & DISPREFIX_SEG)
         i++;    //skip segment prefix
 
@@ -1277,5 +1277,5 @@
     PATCHGEN_PROLOG_NODEF(pVM, pPatch);
     offset = 0;
-    if (pCpu->prefix & DISPREFIX_OPSIZE)
+    if (pCpu->fPrefix & DISPREFIX_OPSIZE)
         pPB[offset++] = 0x66;       /* size override -> 16 bits push */
     pPB[offset++] = 0x16;
@@ -1290,5 +1290,5 @@
     PATCHGEN_PROLOG_NODEF(pVM, pPatch);
     offset = 0;
-    if (pCpu->prefix & DISPREFIX_OPSIZE)
+    if (pCpu->fPrefix & DISPREFIX_OPSIZE)
         pPB[offset++] = 0x66; /* size override -> 16 bits pop */
     pPB[offset++] = 0x58 + pCpu->param1.base.reg_gen;
@@ -1321,5 +1321,5 @@
 
     /** @todo segment prefix (untested) */
-    Assert(pCpu->prefix == DISPREFIX_NONE || pCpu->prefix == DISPREFIX_OPSIZE);
+    Assert(pCpu->fPrefix == DISPREFIX_NONE || pCpu->fPrefix == DISPREFIX_OPSIZE);
 
     PATCHGEN_PROLOG(pVM, pPatch);
@@ -1330,5 +1330,5 @@
         // 8B 15 [32 bits addr]   mov edx, CPUMCTX.tr/ldtr
 
-        if (pCpu->prefix == DISPREFIX_OPSIZE)
+        if (pCpu->fPrefix == DISPREFIX_OPSIZE)
             pPB[offset++] = 0x66;
 
@@ -1361,5 +1361,5 @@
         pPB[offset++] = 0x52;              // push      edx
 
-        if (pCpu->prefix == DISPREFIX_SEG)
+        if (pCpu->fPrefix == DISPREFIX_SEG)
         {
             pPB[offset++] = DISQuerySegPrefixByte(pCpu);
@@ -1370,7 +1370,7 @@
 
         i = 3;  /* standard offset of modrm bytes */
-        if (pCpu->prefix == DISPREFIX_OPSIZE)
+        if (pCpu->fPrefix == DISPREFIX_OPSIZE)
             i++;    //skip operand prefix
-        if (pCpu->prefix == DISPREFIX_SEG)
+        if (pCpu->fPrefix == DISPREFIX_SEG)
             i++;    //skip segment prefix
 
@@ -1421,5 +1421,5 @@
 
     /* @todo segment prefix (untested) */
-    Assert(pCpu->prefix == DISPREFIX_NONE);
+    Assert(pCpu->fPrefix == DISPREFIX_NONE);
 
     // sgdt %Ms
@@ -1456,5 +1456,5 @@
     pPB[offset++] = 0x52;              // push      edx
 
-    if (pCpu->prefix == DISPREFIX_SEG)
+    if (pCpu->fPrefix == DISPREFIX_SEG)
     {
         pPB[offset++] = DISQuerySegPrefixByte(pCpu);
@@ -1465,7 +1465,7 @@
 
     i = 3;  /* standard offset of modrm bytes */
-    if (pCpu->prefix == DISPREFIX_OPSIZE)
+    if (pCpu->fPrefix == DISPREFIX_OPSIZE)
         i++;    //skip operand prefix
-    if (pCpu->prefix == DISPREFIX_SEG)
+    if (pCpu->fPrefix == DISPREFIX_SEG)
         i++;    //skip segment prefix
     rc = patmPatchReadBytes(pVM, &pPB[offset], (RTRCPTR)((RTGCUINTPTR32)pCurInstrGC + i), pCpu->cbInstr - i);
Index: /trunk/src/VBox/VMM/VMMRC/TRPMRCHandlers.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMRC/TRPMRCHandlers.cpp	(revision 41733)
+++ /trunk/src/VBox/VMM/VMMRC/TRPMRCHandlers.cpp	(revision 41734)
@@ -542,5 +542,5 @@
          * Speed up dtrace and don't entrust invalid lock sequences to the recompiler.
          */
-        else if (Cpu.prefix & DISPREFIX_LOCK)
+        else if (Cpu.fPrefix & DISPREFIX_LOCK)
         {
             Log(("TRPMGCTrap06Handler: pc=%08x op=%d\n", pRegFrame->eip, Cpu.pCurInstr->opcode));