Index: /trunk/include/VBox/dis.h
===================================================================
--- /trunk/include/VBox/dis.h	(revision 41732)
+++ /trunk/include/VBox/dis.h	(revision 41733)
@@ -48,5 +48,5 @@
 } DISCPUMODE;
 
-/** @name Prefix byte flags (DISCPUSTATE::prefix_rex).
+/** @name Prefix byte flags (DISCPUSTATE::fRexPrefix).
  * @{
  */
@@ -68,5 +68,5 @@
 /** @} */
 
-/** @name 64 bits prefix byte flags (DISCPUSTATE::prefix_rex).
+/** @name 64 bits prefix byte flags (DISCPUSTATE::fRexPrefix).
  * Requires VBox/disopcode.h.
  * @{
@@ -537,11 +537,11 @@
     /* off: 0x070 (112) */
     /** REX prefix value (64 bits only). */
-    uint8_t         prefix_rex;
+    uint8_t         fRexPrefix;
     /** Segment prefix value (DISSELREG). */
     uint8_t         idxSegPrefix;
     /** Last prefix byte (for SSE2 extension tables). */
-    uint8_t         lastprefix;
+    uint8_t         bLastPrefix;
     /** First opcode byte of instruction. */
-    uint8_t         opcode;
+    uint8_t         bOpCode;
     /* off: 0x074 (116) */
     /** The size of the prefix bytes. */
Index: /trunk/src/VBox/Disassembler/DisasmCore.cpp
===================================================================
--- /trunk/src/VBox/Disassembler/DisasmCore.cpp	(revision 41732)
+++ /trunk/src/VBox/Disassembler/DisasmCore.cpp	(revision 41733)
@@ -345,5 +345,5 @@
             {
                 /** Last prefix byte (for SSE2 extension tables); don't include the REX prefix */
-                pCpu->lastprefix = opcode;
+                pCpu->bLastPrefix = opcode;
                 pCpu->prefix &= ~DISPREFIX_REX;
             }
@@ -414,8 +414,8 @@
                 /* REX prefix byte */
                 pCpu->prefix    |= DISPREFIX_REX;
-                pCpu->prefix_rex = DISPREFIX_REX_OP_2_FLAGS(paOneByteMap[codebyte].param1);
+                pCpu->fRexPrefix = DISPREFIX_REX_OP_2_FLAGS(paOneByteMap[codebyte].param1);
                 iByte           += sizeof(uint8_t);
 
-                if (pCpu->prefix_rex & DISPREFIX_REX_FLAGS_W)
+                if (pCpu->fRexPrefix & DISPREFIX_REX_FLAGS_W)
                     pCpu->opmode = DISCPUMODE_64BIT;  /* overrides size prefix byte */
                 continue;   //fetch the next byte
@@ -426,7 +426,7 @@
         iByte += sizeof(uint8_t); //first opcode byte
 
-        pCpu->opcode = codebyte;
-
-        cbInc = disParseInstruction(uInstrAddr + iByte, &paOneByteMap[pCpu->opcode], pCpu);
+        pCpu->bOpCode = codebyte;
+
+        cbInc = disParseInstruction(uInstrAddr + iByte, &paOneByteMap[pCpu->bOpCode], pCpu);
         iByte += cbInc;
         break;
@@ -527,5 +527,5 @@
     ModRM = disReadByte(pCpu, uCodePtr);
 
-    index = pCpu->opcode - 0xD8;
+    index = pCpu->bOpCode - 0xD8;
     if (ModRM <= 0xBF)
     {
@@ -666,7 +666,7 @@
         /* REX.B extends the Base field if not scaled index + disp32 */
         if (!(pCpu->SIB.Bits.Base == 5 && pCpu->ModRM.Bits.Mod == 0))
-            pCpu->SIB.Bits.Base  |= ((!!(pCpu->prefix_rex & DISPREFIX_REX_FLAGS_B)) << 3);
-
-        pCpu->SIB.Bits.Index |= ((!!(pCpu->prefix_rex & DISPREFIX_REX_FLAGS_X)) << 3);
+            pCpu->SIB.Bits.Base  |= ((!!(pCpu->fRexPrefix & DISPREFIX_REX_FLAGS_B)) << 3);
+
+        pCpu->SIB.Bits.Index |= ((!!(pCpu->fRexPrefix & DISPREFIX_REX_FLAGS_X)) << 3);
     }
 
@@ -698,7 +698,7 @@
     {
         /* REX.B extends the Base field. */
-        pCpu->SIB.Bits.Base  |= ((!!(pCpu->prefix_rex & DISPREFIX_REX_FLAGS_B)) << 3);
+        pCpu->SIB.Bits.Base  |= ((!!(pCpu->fRexPrefix & DISPREFIX_REX_FLAGS_B)) << 3);
         /* REX.X extends the Index field. */
-        pCpu->SIB.Bits.Index |= ((!!(pCpu->prefix_rex & DISPREFIX_REX_FLAGS_X)) << 3);
+        pCpu->SIB.Bits.Index |= ((!!(pCpu->fRexPrefix & DISPREFIX_REX_FLAGS_X)) << 3);
     }
 
@@ -1085,5 +1085,5 @@
 
         /* REX.R extends the Reg field. */
-        pCpu->ModRM.Bits.Reg |= ((!!(pCpu->prefix_rex & DISPREFIX_REX_FLAGS_R)) << 3);
+        pCpu->ModRM.Bits.Reg |= ((!!(pCpu->fRexPrefix & DISPREFIX_REX_FLAGS_R)) << 3);
 
         /* REX.B extends the Rm field if there is no SIB byte nor a 32 bits displacement */
@@ -1094,5 +1094,5 @@
               &&  pCpu->ModRM.Bits.Rm  == 5))
         {
-            pCpu->ModRM.Bits.Rm |= ((!!(pCpu->prefix_rex & DISPREFIX_REX_FLAGS_B)) << 3);
+            pCpu->ModRM.Bits.Rm |= ((!!(pCpu->fRexPrefix & DISPREFIX_REX_FLAGS_B)) << 3);
         }
     }
@@ -1131,5 +1131,5 @@
 
         /* REX.R extends the Reg field. */
-        pCpu->ModRM.Bits.Reg |= ((!!(pCpu->prefix_rex & DISPREFIX_REX_FLAGS_R)) << 3);
+        pCpu->ModRM.Bits.Reg |= ((!!(pCpu->fRexPrefix & DISPREFIX_REX_FLAGS_R)) << 3);
 
         /* REX.B extends the Rm field if there is no SIB byte nor a 32 bits displacement */
@@ -1140,5 +1140,5 @@
               &&  pCpu->ModRM.Bits.Rm  == 5))
         {
-            pCpu->ModRM.Bits.Rm |= ((!!(pCpu->prefix_rex & DISPREFIX_REX_FLAGS_B)) << 3);
+            pCpu->ModRM.Bits.Rm |= ((!!(pCpu->fRexPrefix & DISPREFIX_REX_FLAGS_B)) << 3);
         }
     }
@@ -1571,5 +1571,5 @@
                 &&  pParam == &pCpu->param1             /* ugly assumption that it only applies to the first parameter */
                 &&  (pCpu->prefix & DISPREFIX_REX)
-                &&  (pCpu->prefix_rex & DISPREFIX_REX_FLAGS))
+                &&  (pCpu->fRexPrefix & DISPREFIX_REX_FLAGS))
                 pParam->base.reg_gen += 8;
 
@@ -1615,5 +1615,5 @@
                 &&  pParam == &pCpu->param1             /* ugly assumption that it only applies to the first parameter */
                 &&  (pCpu->prefix & DISPREFIX_REX)
-                &&  (pCpu->prefix_rex & DISPREFIX_REX_FLAGS))
+                &&  (pCpu->fRexPrefix & DISPREFIX_REX_FLAGS))
                 pParam->base.reg_gen += 8;              /* least significant byte of R8-R15 */
         }
@@ -1742,20 +1742,20 @@
 
     /* 2nd byte */
-    pCpu->opcode = disReadByte(pCpu, uCodePtr);
+    pCpu->bOpCode = disReadByte(pCpu, uCodePtr);
 
     /* default to the non-prefixed table. */
-    pOpcode      = &g_aTwoByteMapX86[pCpu->opcode];
+    pOpcode      = &g_aTwoByteMapX86[pCpu->bOpCode];
 
     /* Handle opcode table extensions that rely on the address, repe or repne prefix byte.  */
     /** @todo Should we take the first or last prefix byte in case of multiple prefix bytes??? */
-    if (pCpu->lastprefix)
-    {
-        switch (pCpu->lastprefix)
+    if (pCpu->bLastPrefix)
+    {
+        switch (pCpu->bLastPrefix)
         {
         case OP_OPSIZE: /* 0x66 */
-            if (g_aTwoByteMapX86_PF66[pCpu->opcode].opcode != OP_INVALID)
+            if (g_aTwoByteMapX86_PF66[pCpu->bOpCode].opcode != OP_INVALID)
             {
                 /* Table entry is valid, so use the extension table. */
-                pOpcode = &g_aTwoByteMapX86_PF66[pCpu->opcode];
+                pOpcode = &g_aTwoByteMapX86_PF66[pCpu->bOpCode];
 
                 /* Cancel prefix changes. */
@@ -1766,8 +1766,8 @@
 
         case OP_REPNE:   /* 0xF2 */
-            if (g_aTwoByteMapX86_PFF2[pCpu->opcode].opcode != OP_INVALID)
+            if (g_aTwoByteMapX86_PFF2[pCpu->bOpCode].opcode != OP_INVALID)
             {
                 /* Table entry is valid, so use the extension table. */
-                pOpcode = &g_aTwoByteMapX86_PFF2[pCpu->opcode];
+                pOpcode = &g_aTwoByteMapX86_PFF2[pCpu->bOpCode];
 
                 /* Cancel prefix changes. */
@@ -1777,8 +1777,8 @@
 
         case OP_REPE:  /* 0xF3 */
-            if (g_aTwoByteMapX86_PFF3[pCpu->opcode].opcode != OP_INVALID)
+            if (g_aTwoByteMapX86_PFF3[pCpu->bOpCode].opcode != OP_INVALID)
             {
                 /* Table entry is valid, so use the extension table. */
-                pOpcode = &g_aTwoByteMapX86_PFF3[pCpu->opcode];
+                pOpcode = &g_aTwoByteMapX86_PFF3[pCpu->bOpCode];
 
                 /* Cancel prefix changes. */
@@ -1801,11 +1801,11 @@
 
     /* 3rd byte */
-    pCpu->opcode = disReadByte(pCpu, uCodePtr);
+    pCpu->bOpCode = disReadByte(pCpu, uCodePtr);
 
     /* default to the non-prefixed table. */
-    if (g_apThreeByteMapX86_0F38[pCpu->opcode >> 4])
-    {
-        pOpcode = g_apThreeByteMapX86_0F38[pCpu->opcode >> 4];
-        pOpcode = &pOpcode[pCpu->opcode & 0xf];
+    if (g_apThreeByteMapX86_0F38[pCpu->bOpCode >> 4])
+    {
+        pOpcode = g_apThreeByteMapX86_0F38[pCpu->bOpCode >> 4];
+        pOpcode = &pOpcode[pCpu->bOpCode & 0xf];
     }
     else
@@ -1814,11 +1814,11 @@
     /* Handle opcode table extensions that rely on the address, repne prefix byte.  */
     /** @todo Should we take the first or last prefix byte in case of multiple prefix bytes??? */
-    switch (pCpu->lastprefix)
+    switch (pCpu->bLastPrefix)
     {
     case OP_OPSIZE: /* 0x66 */
-        if (g_apThreeByteMapX86_660F38[pCpu->opcode >> 4])
+        if (g_apThreeByteMapX86_660F38[pCpu->bOpCode >> 4])
         {
-            pOpcode = g_apThreeByteMapX86_660F38[pCpu->opcode >> 4];
-            pOpcode = &pOpcode[pCpu->opcode & 0xf];
+            pOpcode = g_apThreeByteMapX86_660F38[pCpu->bOpCode >> 4];
+            pOpcode = &pOpcode[pCpu->bOpCode & 0xf];
 
             if (pOpcode->opcode != OP_INVALID)
@@ -1834,8 +1834,8 @@
 
     case OP_REPNE:   /* 0xF2 */
-        if (g_apThreeByteMapX86_F20F38[pCpu->opcode >> 4])
+        if (g_apThreeByteMapX86_F20F38[pCpu->bOpCode >> 4])
         {
-            pOpcode = g_apThreeByteMapX86_F20F38[pCpu->opcode >> 4];
-            pOpcode = &pOpcode[pCpu->opcode & 0xf];
+            pOpcode = g_apThreeByteMapX86_F20F38[pCpu->bOpCode >> 4];
+            pOpcode = &pOpcode[pCpu->bOpCode & 0xf];
 
             if (pOpcode->opcode != OP_INVALID)
@@ -1862,14 +1862,14 @@
 
     /* 3rd byte */
-    pCpu->opcode = disReadByte(pCpu, uCodePtr);
+    pCpu->bOpCode = disReadByte(pCpu, uCodePtr);
 
     /** @todo Should we take the first or last prefix byte in case of multiple prefix bytes??? */
-    Assert(pCpu->lastprefix == OP_OPSIZE);
+    Assert(pCpu->bLastPrefix == OP_OPSIZE);
 
     /* default to the non-prefixed table. */
-    if (g_apThreeByteMapX86_660F3A[pCpu->opcode >> 4])
-    {
-        pOpcode = g_apThreeByteMapX86_660F3A[pCpu->opcode >> 4];
-        pOpcode = &pOpcode[pCpu->opcode & 0xf];
+    if (g_apThreeByteMapX86_660F3A[pCpu->bOpCode >> 4])
+    {
+        pOpcode = g_apThreeByteMapX86_660F3A[pCpu->bOpCode >> 4];
+        pOpcode = &pOpcode[pCpu->bOpCode & 0xf];
 
         if (pOpcode->opcode != OP_INVALID)
@@ -1910,5 +1910,5 @@
 unsigned ParseImmGrpl(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
 {
-    int idx = (pCpu->opcode - 0x80) * 8;
+    int idx = (pCpu->bOpCode - 0x80) * 8;
     unsigned size = 0, modrm, reg;
     NOREF(pParam);
@@ -1934,9 +1934,9 @@
     NOREF(pParam);
 
-    switch (pCpu->opcode)
+    switch (pCpu->bOpCode)
     {
     case 0xC0:
     case 0xC1:
-        idx = (pCpu->opcode - 0xC0)*8;
+        idx = (pCpu->bOpCode - 0xC0)*8;
         break;
 
@@ -1945,5 +1945,5 @@
     case 0xD2:
     case 0xD3:
-        idx = (pCpu->opcode - 0xD0 + 2)*8;
+        idx = (pCpu->bOpCode - 0xD0 + 2)*8;
         break;
 
@@ -1970,5 +1970,5 @@
 unsigned ParseGrp3(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
 {
-    int idx = (pCpu->opcode - 0xF6) * 8;
+    int idx = (pCpu->bOpCode - 0xF6) * 8;
     unsigned size = 0, modrm, reg;
     NOREF(pParam);
Index: /trunk/src/VBox/Disassembler/DisasmFormatYasm.cpp
===================================================================
--- /trunk/src/VBox/Disassembler/DisasmFormatYasm.cpp	(revision 41732)
+++ /trunk/src/VBox/Disassembler/DisasmFormatYasm.cpp	(revision 41733)
@@ -494,9 +494,9 @@
              */
             case OP_NOP:
-                if (pCpu->opcode == 0x90)
+                if (pCpu->bOpCode == 0x90)
                     /* fine, fine */;
                 else if (pszFmt[sizeof("nop %Ev") - 1] == '/' && pszFmt[sizeof("nop %Ev")] == 'p')
                     pszFmt = "prefetch %Eb";
-                else if (pCpu->opcode == 0x1f)
+                else if (pCpu->bOpCode == 0x1f)
                 {
                     Assert(pCpu->cbInstr >= 3);
@@ -542,5 +542,5 @@
              */
             case OP_FLD:
-                if (pCpu->opcode == 0xdb) /* m80fp workaround. */
+                if (pCpu->bOpCode == 0xdb) /* m80fp workaround. */
                     *(int *)&pCpu->param1.param &= ~0x1f; /* make it pure OP_PARM_M */
                 break;
@@ -1422,5 +1422,5 @@
 
                 /* 82 (see table A-6). */
-                if (pCpu->opcode == 0x82)
+                if (pCpu->bOpCode == 0x82)
                     return true;
                 break;
@@ -1433,10 +1433,10 @@
             case OP_POP:
             case OP_PUSH:
-                Assert(pCpu->opcode == 0x8f);
+                Assert(pCpu->bOpCode == 0x8f);
                 return true;
 
             case OP_MOV:
-                if (   pCpu->opcode == 0x8a
-                    || pCpu->opcode == 0x8b)
+                if (   pCpu->bOpCode == 0x8a
+                    || pCpu->bOpCode == 0x8b)
                     return true;
                 break;
@@ -1465,5 +1465,5 @@
 
     /* And some more - see table A-6. */
-    if (pCpu->opcode == 0x82)
+    if (pCpu->bOpCode == 0x82)
     {
         switch (pCpu->pCurInstr->opcode)
@@ -1505,5 +1505,5 @@
         case OP_SETLE:
         case OP_SETNLE:
-            AssertMsg(pCpu->opcode >= 0x90 && pCpu->opcode <= 0x9f, ("%#x\n", pCpu->opcode));
+            AssertMsg(pCpu->bOpCode >= 0x90 && pCpu->bOpCode <= 0x9f, ("%#x\n", pCpu->bOpCode));
             if (pCpu->ModRM.Bits.Reg != 2)
                 return true;
@@ -1516,5 +1516,5 @@
      */
     if (    pCpu->pCurInstr->opcode == OP_MOVZX
-        &&  pCpu->opcode == 0xB7
+        &&  pCpu->bOpCode == 0xB7
         &&  (pCpu->mode == DISCPUMODE_16BIT) != !!(fPrefixes & DISPREFIX_OPSIZE))
         return true;
Index: /trunk/src/VBox/Disassembler/testcase/tstDisasm-2.cpp
===================================================================
--- /trunk/src/VBox/Disassembler/testcase/tstDisasm-2.cpp	(revision 41732)
+++ /trunk/src/VBox/Disassembler/testcase/tstDisasm-2.cpp	(revision 41733)
@@ -144,5 +144,5 @@
          /* The 0x8f /0 variant of this instruction doesn't get its /r value verified. */
         case OP_POP:
-            if (    pCpu->opcode == 0x8f
+            if (    pCpu->bOpCode == 0x8f
                 &&  pCpu->ModRM.Bits.Reg != 0)
                 return false;
@@ -151,6 +151,6 @@
         /* The 0xc6 /0 and 0xc7 /0 variants of this instruction don't get their /r values verified. */
         case OP_MOV:
-            if (    (   pCpu->opcode == 0xc6
-                     || pCpu->opcode == 0xc7)
+            if (    (   pCpu->bOpCode == 0xc6
+                     || pCpu->bOpCode == 0xc7)
                 &&  pCpu->ModRM.Bits.Reg != 0)
                 return false;
Index: /trunk/src/VBox/VMM/VMMAll/PGMAllPhys.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMAll/PGMAllPhys.cpp	(revision 41732)
+++ /trunk/src/VBox/VMM/VMMAll/PGMAllPhys.cpp	(revision 41733)
@@ -110,5 +110,5 @@
                 &&  !(pDis->prefix & (DISPREFIX_REPNE | DISPREFIX_REP | DISPREFIX_SEG)))
             {
-                switch (pDis->opcode)
+                switch (pDis->bOpCode)
                 {
                     /** @todo Find other instructions we can safely skip, possibly