Index: /trunk/include/VBox/dis.h
===================================================================
--- /trunk/include/VBox/dis.h	(revision 41731)
+++ /trunk/include/VBox/dis.h	(revision 41732)
@@ -548,5 +548,5 @@
     uint8_t         cbPrefix;
     /** The instruction size. */
-    uint8_t         opsize;
+    uint8_t         cbInstr;
     uint8_t         abUnused[2];
     /* off: 0x078 (120) */
Index: /trunk/include/VBox/vmm/csam.h
===================================================================
--- /trunk/include/VBox/vmm/csam.h	(revision 41731)
+++ /trunk/include/VBox/vmm/csam.h	(revision 41732)
@@ -243,8 +243,8 @@
  * @param   pVM         The VM to operate on.
  * @param   pInstr      Instruction pointer
- * @param   opsize      Instruction size
+ * @param   cbInstr      Instruction size
  * @param   fScanned    Mark as scanned or not
  */
-VMMR3DECL(int) CSAMR3MarkCode(PVM pVM, RTRCPTR pInstr, uint32_t opsize, bool fScanned);
+VMMR3DECL(int) CSAMR3MarkCode(PVM pVM, RTRCPTR pInstr, uint32_t cbInstr, bool fScanned);
 
 /**
Index: /trunk/include/VBox/vmm/trpm.h
===================================================================
--- /trunk/include/VBox/vmm/trpm.h	(revision 41731)
+++ /trunk/include/VBox/vmm/trpm.h	(revision 41732)
@@ -82,5 +82,5 @@
 VMMDECL(void)       TRPMSaveTrap(PVMCPU pVCpu);
 VMMDECL(void)       TRPMRestoreTrap(PVMCPU pVCpu);
-VMMDECL(int)        TRPMForwardTrap(PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, uint32_t iGate, uint32_t opsize, TRPMERRORCODE enmError, TRPMEVENT enmType, int32_t iOrgTrap);
+VMMDECL(int)        TRPMForwardTrap(PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, uint32_t iGate, uint32_t cbInstr, TRPMERRORCODE enmError, TRPMEVENT enmType, int32_t iOrgTrap);
 VMMDECL(int)        TRPMRaiseXcpt(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, X86XCPT enmXcpt);
 VMMDECL(int)        TRPMRaiseXcptErr(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, X86XCPT enmXcpt, uint32_t uErr);
Index: /trunk/src/VBox/Disassembler/DisasmCore.cpp
===================================================================
--- /trunk/src/VBox/Disassembler/DisasmCore.cpp	(revision 41731)
+++ /trunk/src/VBox/Disassembler/DisasmCore.cpp	(revision 41732)
@@ -231,5 +231,5 @@
  * @param   pcbInstr        Where to store the size of the instruction.
  *                          NULL is allowed.  This is also stored in
- *                          PDISCPUSTATE::opsize.
+ *                          PDISCPUSTATE::cbInstr.
  */
 DISDECL(int) DISInstr(const void *pvInstr, DISCPUMODE enmCpuMode, PDISCPUSTATE pCpu, uint32_t *pcbInstr)
@@ -253,5 +253,5 @@
  * @param   pcbInstr        Where to store the size of the instruction.
  *                          NULL is allowed.  This is also stored in
- *                          PDISCPUSTATE::opsize.
+ *                          PDISCPUSTATE::cbInstr.
  */
 DISDECL(int) DISInstrWithReader(RTUINTPTR uInstrAddr, DISCPUMODE enmCpuMode, PFNDISREADBYTES pfnReadBytes, void *pvUser,
@@ -277,5 +277,5 @@
  *                          taken from it.
  * @param   pcbInstr        Where to store the size of the instruction.  (This
- *                          is also stored in PDISCPUSTATE::opsize.)  Optional.
+ *                          is also stored in PDISCPUSTATE::cbInstr.)  Optional.
  */
 DISDECL(int) DISInstEx(RTUINTPTR uInstrAddr, DISCPUMODE enmCpuMode, uint32_t fFilter,
@@ -433,6 +433,6 @@
     }
 
-    AssertMsg(pCpu->opsize == iByte || RT_FAILURE_NP(pCpu->rc), ("%u %u\n", pCpu->opsize, iByte));
-    pCpu->opsize = iByte;
+    AssertMsg(pCpu->cbInstr == iByte || RT_FAILURE_NP(pCpu->rc), ("%u %u\n", pCpu->cbInstr, iByte));
+    pCpu->cbInstr = iByte;
     if (pcbInstr)
         *pcbInstr = iByte;
@@ -2414,5 +2414,5 @@
      * Figure out which case it is.
      */
-    uint32_t  cbInstr = pCpu->opsize;
+    uint32_t  cbInstr = pCpu->cbInstr;
     RTUINTPTR off     = uAddress - pCpu->uInstrAddr;
     if (off < cbInstr)
@@ -2450,5 +2450,5 @@
             RT_BZERO(&pCpu->abInstr[cbInstr], cbGap);
         }
-        pCpu->opsize = cbInstr = off;
+        pCpu->cbInstr = cbInstr = off;
     }
 
@@ -2459,5 +2459,5 @@
     {
         memcpy(&pCpu->abInstr[cbInstr], pbSrc, cbSrc);
-        pCpu->opsize = cbInstr + (uint32_t)cbSrc;
+        pCpu->cbInstr = cbInstr + (uint32_t)cbSrc;
     }
     else
@@ -2465,5 +2465,5 @@
         size_t cbToCopy = sizeof(pCpu->abInstr) - off;
         memcpy(&pCpu->abInstr[cbInstr], pbSrc, cbToCopy);
-        pCpu->opsize = sizeof(pCpu->abInstr);
+        pCpu->cbInstr = sizeof(pCpu->abInstr);
         AssertMsgFailed(("%RTptr LB %zx off=%RTptr (%.*Rhxs)", uAddress, cbSrc, off, sizeof(pCpu->abInstr), pCpu->abInstr));
     }
@@ -2497,7 +2497,7 @@
 /** @todo change this into reading directly into abInstr and use it as a
  *        cache. */
-    if (RT_LIKELY(   pCpu->uInstrAddr + pCpu->opsize == uAddress
-                  && pCpu->opsize + sizeof(bTemp) < sizeof(pCpu->abInstr)))
-        pCpu->abInstr[pCpu->opsize++] = bTemp;
+    if (RT_LIKELY(   pCpu->uInstrAddr + pCpu->cbInstr == uAddress
+                  && pCpu->cbInstr + sizeof(bTemp) < sizeof(pCpu->abInstr)))
+        pCpu->abInstr[pCpu->cbInstr++] = bTemp;
     else
         disStoreInstrBytesSlow(pCpu, uAddress, &bTemp, sizeof(bTemp));
@@ -2518,10 +2518,10 @@
     }
 
-    if (RT_LIKELY(   pCpu->uInstrAddr + pCpu->opsize == uAddress
-                  && pCpu->opsize + sizeof(uTemp) < sizeof(pCpu->abInstr)))
-    {
-        pCpu->abInstr[pCpu->opsize    ] = uTemp.au8[0];
-        pCpu->abInstr[pCpu->opsize + 1] = uTemp.au8[1];
-        pCpu->opsize += 2;
+    if (RT_LIKELY(   pCpu->uInstrAddr + pCpu->cbInstr == uAddress
+                  && pCpu->cbInstr + sizeof(uTemp) < sizeof(pCpu->abInstr)))
+    {
+        pCpu->abInstr[pCpu->cbInstr    ] = uTemp.au8[0];
+        pCpu->abInstr[pCpu->cbInstr + 1] = uTemp.au8[1];
+        pCpu->cbInstr += 2;
     }
     else
@@ -2543,12 +2543,12 @@
     }
 
-    if (RT_LIKELY(   pCpu->uInstrAddr + pCpu->opsize == uAddress
-                  && pCpu->opsize + sizeof(uTemp) < sizeof(pCpu->abInstr)))
-    {
-        pCpu->abInstr[pCpu->opsize    ] = uTemp.au8[0];
-        pCpu->abInstr[pCpu->opsize + 1] = uTemp.au8[1];
-        pCpu->abInstr[pCpu->opsize + 2] = uTemp.au8[2];
-        pCpu->abInstr[pCpu->opsize + 3] = uTemp.au8[3];
-        pCpu->opsize += 4;
+    if (RT_LIKELY(   pCpu->uInstrAddr + pCpu->cbInstr == uAddress
+                  && pCpu->cbInstr + sizeof(uTemp) < sizeof(pCpu->abInstr)))
+    {
+        pCpu->abInstr[pCpu->cbInstr    ] = uTemp.au8[0];
+        pCpu->abInstr[pCpu->cbInstr + 1] = uTemp.au8[1];
+        pCpu->abInstr[pCpu->cbInstr + 2] = uTemp.au8[2];
+        pCpu->abInstr[pCpu->cbInstr + 3] = uTemp.au8[3];
+        pCpu->cbInstr += 4;
     }
     else
@@ -2570,16 +2570,16 @@
     }
 
-    if (RT_LIKELY(   pCpu->uInstrAddr + pCpu->opsize == uAddress
-                  && pCpu->opsize + sizeof(uTemp) < sizeof(pCpu->abInstr)))
-    {
-        pCpu->abInstr[pCpu->opsize    ] = uTemp.au8[0];
-        pCpu->abInstr[pCpu->opsize + 1] = uTemp.au8[1];
-        pCpu->abInstr[pCpu->opsize + 2] = uTemp.au8[2];
-        pCpu->abInstr[pCpu->opsize + 3] = uTemp.au8[3];
-        pCpu->abInstr[pCpu->opsize + 4] = uTemp.au8[4];
-        pCpu->abInstr[pCpu->opsize + 5] = uTemp.au8[5];
-        pCpu->abInstr[pCpu->opsize + 6] = uTemp.au8[6];
-        pCpu->abInstr[pCpu->opsize + 7] = uTemp.au8[7];
-        pCpu->opsize += 8;
+    if (RT_LIKELY(   pCpu->uInstrAddr + pCpu->cbInstr == uAddress
+                  && pCpu->cbInstr + sizeof(uTemp) < sizeof(pCpu->abInstr)))
+    {
+        pCpu->abInstr[pCpu->cbInstr    ] = uTemp.au8[0];
+        pCpu->abInstr[pCpu->cbInstr + 1] = uTemp.au8[1];
+        pCpu->abInstr[pCpu->cbInstr + 2] = uTemp.au8[2];
+        pCpu->abInstr[pCpu->cbInstr + 3] = uTemp.au8[3];
+        pCpu->abInstr[pCpu->cbInstr + 4] = uTemp.au8[4];
+        pCpu->abInstr[pCpu->cbInstr + 5] = uTemp.au8[5];
+        pCpu->abInstr[pCpu->cbInstr + 6] = uTemp.au8[6];
+        pCpu->abInstr[pCpu->cbInstr + 7] = uTemp.au8[7];
+        pCpu->cbInstr += 8;
     }
     else
Index: /trunk/src/VBox/Disassembler/DisasmFormatBytes.cpp
===================================================================
--- /trunk/src/VBox/Disassembler/DisasmFormatBytes.cpp	(revision 41731)
+++ /trunk/src/VBox/Disassembler/DisasmFormatBytes.cpp	(revision 41732)
@@ -39,5 +39,5 @@
 {
     size_t      cchOutput = 0;
-    uint32_t    cb        = pCpu->opsize;
+    uint32_t    cb        = pCpu->cbInstr;
     AssertStmt(cb <= 16, cb = 16);
 
Index: /trunk/src/VBox/Disassembler/DisasmFormatYasm.cpp
===================================================================
--- /trunk/src/VBox/Disassembler/DisasmFormatYasm.cpp	(revision 41731)
+++ /trunk/src/VBox/Disassembler/DisasmFormatYasm.cpp	(revision 41732)
@@ -500,8 +500,8 @@
                 else if (pCpu->opcode == 0x1f)
                 {
-                    Assert(pCpu->opsize >= 3);
+                    Assert(pCpu->cbInstr >= 3);
                     PUT_SZ("db 00fh, 01fh,");
                     PUT_NUM_8(pCpu->ModRM.u);
-                    for (unsigned i = 3; i < pCpu->opsize; i++)
+                    for (unsigned i = 3; i < pCpu->cbInstr; i++)
                     {
                         PUT_C(',');
@@ -907,5 +907,5 @@
                             PUT_SZ(" (");
 
-                        RTUINTPTR uTrgAddr = pCpu->uInstrAddr + pCpu->opsize + offDisplacement;
+                        RTUINTPTR uTrgAddr = pCpu->uInstrAddr + pCpu->cbInstr + offDisplacement;
                         if (pCpu->mode == DISCPUMODE_16BIT)
                             PUT_NUM_16(uTrgAddr);
Index: /trunk/src/VBox/Disassembler/DisasmReg.cpp
===================================================================
--- /trunk/src/VBox/Disassembler/DisasmReg.cpp	(revision 41731)
+++ /trunk/src/VBox/Disassembler/DisasmReg.cpp	(revision 41732)
@@ -625,5 +625,5 @@
             Assert(pCpu->mode == DISCPUMODE_64BIT);
             /* Relative to the RIP of the next instruction. */
-            pParamVal->val.val64 += pParam->uDisp.i32 + pCtx->rip + pCpu->opsize;
+            pParamVal->val.val64 += pParam->uDisp.i32 + pCtx->rip + pCpu->cbInstr;
         }
         return VINF_SUCCESS;
Index: /trunk/src/VBox/Disassembler/DisasmTest.cpp
===================================================================
--- /trunk/src/VBox/Disassembler/DisasmTest.cpp	(revision 41731)
+++ /trunk/src/VBox/Disassembler/DisasmTest.cpp	(revision 41732)
@@ -1,5 +1,5 @@
 /* $Id$ */
 /** @file
- * VBox disassembler - Test application 
+ * VBox disassembler - Test application
  */
 
@@ -47,5 +47,5 @@
 
         RTTESTI_CHECK_RC(rc, VINF_SUCCESS);
-        RTTESTI_CHECK(cb == Cpu.opsize);
+        RTTESTI_CHECK(cb == Cpu.cbInstr);
         RTTESTI_CHECK(cb > 0);
         RTTESTI_CHECK(cb <= 16);
@@ -69,5 +69,5 @@
         if (cErrBefore != RTTestIErrorCount())
             RTTestIFailureDetails("rc=%Rrc, off=%#x (%u) cbInstr=%u enmDisCpuMode=%d\n",
-                                  rc, off, Cpu.opsize, enmDisCpuMode);
+                                  rc, off, Cpu.cbInstr, enmDisCpuMode);
         RTTestIPrintf(RTTESTLVL_ALWAYS, "%s\n", szOutput);
         off += cb;
Index: /trunk/src/VBox/VMM/VMMAll/EMAll.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMAll/EMAll.cpp	(revision 41731)
+++ /trunk/src/VBox/VMM/VMMAll/EMAll.cpp	(revision 41732)
@@ -507,5 +507,5 @@
         if (RT_SUCCESS(rc))
         {
-            Assert(cbOp == pDis->opsize);
+            Assert(cbOp == pDis->cbInstr);
             uint32_t cbIgnored;
             rc = emInterpretInstructionCPUOuter(pVCpu, pDis, pRegFrame, pvFault, EMCODETYPE_SUPERVISOR, &cbIgnored);
@@ -561,5 +561,5 @@
         if (RT_SUCCESS(rc))
         {
-            Assert(cbOp == pDis->opsize);
+            Assert(cbOp == pDis->cbInstr);
             rc = emInterpretInstructionCPUOuter(pVCpu, pDis, pRegFrame, pvFault, EMCODETYPE_SUPERVISOR, pcbWritten);
             if (RT_SUCCESS(rc))
@@ -617,5 +617,5 @@
     VBOXSTRICTRC rc = emInterpretInstructionCPUOuter(pVCpu, pDis, pRegFrame, pvFault, enmCodeType, &cbIgnored);
     if (RT_SUCCESS(rc))
-        pRegFrame->rip += pDis->opsize; /* Move on to the next instruction. */
+        pRegFrame->rip += pDis->cbInstr; /* Move on to the next instruction. */
     return rc;
 #endif
@@ -2688,5 +2688,5 @@
     Assert(pvFault == SELMToFlat(pVM, DISSELREG_CS, pRegFrame, (RTGCPTR)pRegFrame->rip));
 
-    pVCpu->em.s.GCPtrInhibitInterrupts = pRegFrame->eip + pDis->opsize;
+    pVCpu->em.s.GCPtrInhibitInterrupts = pRegFrame->eip + pDis->cbInstr;
     VMCPU_FF_SET(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS);
 
Index: /trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp	(revision 41731)
+++ /trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp	(revision 41732)
@@ -936,5 +936,5 @@
         pRegFrame->rcx--;
     }
-    pRegFrame->rip += pDis->opsize;
+    pRegFrame->rip += pDis->cbInstr;
 
     LogFlow(("pgmPoolAccessHandlerSTOSD: returns\n"));
Index: /trunk/src/VBox/VMM/VMMAll/TRPMAll.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMAll/TRPMAll.cpp	(revision 41731)
+++ /trunk/src/VBox/VMM/VMMAll/TRPMAll.cpp	(revision 41732)
@@ -352,5 +352,5 @@
  * @param   pRegFrame   Pointer to the register frame for the trap.
  * @param   iGate       Trap or interrupt gate number
- * @param   opsize      Instruction size (only relevant for software interrupts)
+ * @param   cbInstr     Instruction size (only relevant for software interrupts)
  * @param   enmError    TRPM_TRAP_HAS_ERRORCODE or TRPM_TRAP_NO_ERRORCODE.
  * @param   enmType     TRPM event type
@@ -358,5 +358,5 @@
  * @internal
  */
-VMMDECL(int) TRPMForwardTrap(PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, uint32_t iGate, uint32_t opsize,
+VMMDECL(int) TRPMForwardTrap(PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, uint32_t iGate, uint32_t cbInstr,
                              TRPMERRORCODE enmError, TRPMEVENT enmType, int32_t iOrgTrap)
 {
@@ -639,6 +639,6 @@
                     if (enmType == TRPM_SOFTWARE_INT)
                     {
-                        Assert(opsize);
-                        pTrapStack[--idx] = pRegFrame->eip + opsize;    /* return address = next instruction */
+                        Assert(cbInstr);
+                        pTrapStack[--idx] = pRegFrame->eip + cbInstr;    /* return address = next instruction */
                     }
                     else
Index: /trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp	(revision 41731)
+++ /trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp	(revision 41732)
@@ -2987,5 +2987,5 @@
             if (RT_SUCCESS(rc) && pDis->pCurInstr->opcode == OP_INVLPG)
             {
-                Assert(cbOp == pDis->opsize);
+                Assert(cbOp == pDis->cbInstr);
                 rc = hmR0svmInterpretInvlPg(pVCpu, pDis, pRegFrame, uASID);
                 if (RT_SUCCESS(rc))
Index: /trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp	(revision 41731)
+++ /trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp	(revision 41732)
@@ -3553,5 +3553,5 @@
 
                     rc = VINF_SUCCESS;
-                    Assert(cbOp == pDis->opsize);
+                    Assert(cbOp == pDis->cbInstr);
                     switch (pDis->pCurInstr->opcode)
                     {
@@ -3563,5 +3563,5 @@
                     case OP_STI:
                         pCtx->eflags.Bits.u1IF = 1;
-                        EMSetInhibitInterruptsPC(pVCpu, pCtx->rip + pDis->opsize);
+                        EMSetInhibitInterruptsPC(pVCpu, pCtx->rip + pDis->cbInstr);
                         Assert(VMCPU_FF_ISSET(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS));
                         rc2 = VMXWriteVMCS(VMX_VMCS32_GUEST_INTERRUPTIBILITY_STATE,
@@ -3574,5 +3574,5 @@
                         fUpdateRIP = false;
                         rc = VINF_EM_HALT;
-                        pCtx->rip += pDis->opsize;
+                        pCtx->rip += pDis->cbInstr;
                         STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitHlt);
                         break;
Index: /trunk/src/VBox/VMM/VMMR3/CSAM.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMR3/CSAM.cpp	(revision 41731)
+++ /trunk/src/VBox/VMM/VMMR3/CSAM.cpp	(revision 41732)
@@ -835,7 +835,7 @@
     case OP_CLI:
     {
-        uint32_t     cbInstr = 0;
-        uint32_t     opsize  = pCpu->opsize;
-        bool         fCode32 = pPage->fCode32;
+        uint32_t     cbInstrs   = 0;
+        uint32_t     cbCurInstr = pCpu->cbInstr;
+        bool         fCode32    = pPage->fCode32;
 
         Assert(fCode32);
@@ -848,15 +848,15 @@
             DISCPUSTATE  cpu;
 
-            if (cbInstr + opsize >= SIZEOF_NEARJUMP32)
+            if (cbInstrs + cbCurInstr >= SIZEOF_NEARJUMP32)
                 break;
 
-            if (csamIsCodeScanned(pVM, pCurInstrGC + opsize, &pPage) == true)
+            if (csamIsCodeScanned(pVM, pCurInstrGC + cbCurInstr, &pPage) == true)
             {
                 /* We've scanned the next instruction(s) already. This means we've followed a branch that ended up there before -> dangerous!! */
-                PATMR3DetectConflict(pVM, pCurInstrGC, pCurInstrGC + opsize);
+                PATMR3DetectConflict(pVM, pCurInstrGC, pCurInstrGC + cbCurInstr);
                 break;
             }
-            pCurInstrGC += opsize;
-            cbInstr     += opsize;
+            pCurInstrGC += cbCurInstr;
+            cbInstrs    += cbCurInstr;
 
             {   /* Force pCurInstrHC out of scope after we stop using it (page lock!) */
@@ -871,5 +871,5 @@
 
                 rc = CSAMR3DISInstr(pVM, pCurInstrGC, pCurInstrHC, (fCode32) ? DISCPUMODE_32BIT : DISCPUMODE_16BIT,
-                                    &cpu, &opsize, NULL, 0);
+                                    &cpu, &cbCurInstr, NULL, 0);
             }
             AssertRC(rc);
@@ -1018,5 +1018,5 @@
         {
             DISCPUSTATE  cpu;
-            uint32_t     opsize;
+            uint32_t     cbInstr;
             int          rc2;
 #ifdef DEBUG
@@ -1054,9 +1054,9 @@
 #ifdef DEBUG
                 rc2 = CSAMR3DISInstr(pVM, pCurInstrGC, pCurInstrHC, (fCode32) ? DISCPUMODE_32BIT : DISCPUMODE_16BIT,
-                                     &cpu, &opsize, szOutput, sizeof(szOutput));
+                                     &cpu, &cbInstr, szOutput, sizeof(szOutput));
                 if (RT_SUCCESS(rc2)) Log(("CSAM Call Analysis: %s", szOutput));
 #else
                 rc2 = CSAMR3DISInstr(pVM, pCurInstrGC, pCurInstrHC, (fCode32) ? DISCPUMODE_32BIT : DISCPUMODE_16BIT,
-                                     &cpu, &opsize, NULL, 0);
+                                     &cpu, &cbInstr, NULL, 0);
 #endif
                 STAM_PROFILE_STOP(&pVM->csam.s.StatTimeDisasm, a);
@@ -1067,12 +1067,12 @@
                 }
 
-                STAM_COUNTER_ADD(&pVM->csam.s.StatNrBytesRead, opsize);
+                STAM_COUNTER_ADD(&pVM->csam.s.StatNrBytesRead, cbInstr);
 
                 RCPTRTYPE(uint8_t *) addr = 0;
                 PCSAMPAGE pJmpPage = NULL;
 
-                if (PAGE_ADDRESS(pCurInstrGC) != PAGE_ADDRESS(pCurInstrGC + opsize - 1))
+                if (PAGE_ADDRESS(pCurInstrGC) != PAGE_ADDRESS(pCurInstrGC + cbInstr - 1))
                 {
-                    if (!PGMGstIsPagePresent(pVM, pCurInstrGC + opsize - 1))
+                    if (!PGMGstIsPagePresent(pVM, pCurInstrGC + cbInstr - 1))
                     {
                         /// @todo fault in the page
@@ -1081,5 +1081,5 @@
                     }
                     //all is fine, let's continue
-                    csamR3CheckPageRecord(pVM, pCurInstrGC + opsize - 1);
+                    csamR3CheckPageRecord(pVM, pCurInstrGC + cbInstr - 1);
                 }
 
@@ -1169,6 +1169,6 @@
                 }
                 /* Mark it as scanned. */
-                csamMarkCode(pVM, pPage, pCurInstrGC, opsize, true);
-                pCurInstrGC += opsize;
+                csamMarkCode(pVM, pPage, pCurInstrGC, cbInstr, true);
+                pCurInstrGC += cbInstr;
             } /* for at most 16 instructions */
 next_function:
@@ -1202,5 +1202,5 @@
     PCSAMPAGE pPage = (PCSAMPAGE)pUserData;
     int rc = VWRN_CONTINUE_ANALYSIS;
-    uint32_t opsize;
+    uint32_t cbInstr;
     int rc2;
     Assert(pVM->cCpus == 1);
@@ -1267,9 +1267,9 @@
 #ifdef DEBUG
             rc2 = CSAMR3DISInstr(pVM, pCurInstrGC, pCurInstrHC, fCode32 ? DISCPUMODE_32BIT : DISCPUMODE_16BIT,
-                                 &cpu, &opsize, szOutput, sizeof(szOutput));
+                                 &cpu, &cbInstr, szOutput, sizeof(szOutput));
             if (RT_SUCCESS(rc2)) Log(("CSAM Analysis: %s", szOutput));
 #else
             rc2 = CSAMR3DISInstr(pVM, pCurInstrGC, pCurInstrHC, fCode32 ? DISCPUMODE_32BIT : DISCPUMODE_16BIT,
-                                 &cpu, &opsize, NULL, 0);
+                                 &cpu, &cbInstr, NULL, 0);
 #endif
             STAM_PROFILE_STOP(&pVM->csam.s.StatTimeDisasm, a);
@@ -1282,14 +1282,14 @@
         }
 
-        STAM_COUNTER_ADD(&pVM->csam.s.StatNrBytesRead, opsize);
-
-        csamMarkCode(pVM, pPage, pCurInstrGC, opsize, true);
+        STAM_COUNTER_ADD(&pVM->csam.s.StatNrBytesRead, cbInstr);
+
+        csamMarkCode(pVM, pPage, pCurInstrGC, cbInstr, true);
 
         RCPTRTYPE(uint8_t *) addr = 0;
         PCSAMPAGE pJmpPage = NULL;
 
-        if (PAGE_ADDRESS(pCurInstrGC) != PAGE_ADDRESS(pCurInstrGC + opsize - 1))
-        {
-            if (!PGMGstIsPagePresent(pVCpu, pCurInstrGC + opsize - 1))
+        if (PAGE_ADDRESS(pCurInstrGC) != PAGE_ADDRESS(pCurInstrGC + cbInstr - 1))
+        {
+            if (!PGMGstIsPagePresent(pVCpu, pCurInstrGC + cbInstr - 1))
             {
                 /// @todo fault in the page
@@ -1299,5 +1299,5 @@
             }
             //all is fine, let's continue
-            csamR3CheckPageRecord(pVM, pCurInstrGC + opsize - 1);
+            csamR3CheckPageRecord(pVM, pCurInstrGC + cbInstr - 1);
         }
         /*
@@ -1317,5 +1317,5 @@
             &&  pCacheRec->pCallExitRec->cInstrAfterRet < CSAM_MAX_CALLEXIT_RET)
         {
-            pCacheRec->pCallExitRec->pInstrAfterRetGC[pCacheRec->pCallExitRec->cInstrAfterRet] = pCurInstrGC + opsize;
+            pCacheRec->pCallExitRec->pInstrAfterRetGC[pCacheRec->pCallExitRec->cInstrAfterRet] = pCurInstrGC + cbInstr;
             pCacheRec->pCallExitRec->cInstrAfterRet++;
         }
@@ -1463,5 +1463,5 @@
             goto done;
         }
-        pCurInstrGC += opsize;
+        pCurInstrGC += cbInstr;
     }
 done:
@@ -2181,10 +2181,10 @@
  * @param   pPage       Patch structure pointer
  * @param   pInstr      Instruction pointer
- * @param   opsize      Instruction size
+ * @param   cbInstr      Instruction size
  * @param   fScanned    Mark as scanned or not
  */
-static void csamMarkCode(PVM pVM, PCSAMPAGE pPage, RTRCPTR pInstr, uint32_t opsize, bool fScanned)
-{
-    LogFlow(("csamMarkCodeAsScanned %RRv opsize=%d\n", pInstr, opsize));
+static void csamMarkCode(PVM pVM, PCSAMPAGE pPage, RTRCPTR pInstr, uint32_t cbInstr, bool fScanned)
+{
+    LogFlow(("csamMarkCodeAsScanned %RRv cbInstr=%d\n", pInstr, cbInstr));
     CSAMMarkPage(pVM, pInstr, fScanned);
 
@@ -2198,5 +2198,5 @@
         if (ASMBitTest(pPage->pBitmap, pInstr & PAGE_OFFSET_MASK) == 0)
         {
-            pPage->uSize += opsize;
+            pPage->uSize += cbInstr;
             STAM_COUNTER_ADD(&pVM->csam.s.StatNrInstr, 1);
         }
@@ -2220,8 +2220,8 @@
  * @param   pVM         The VM to operate on.
  * @param   pInstr      Instruction pointer
- * @param   opsize      Instruction size
+ * @param   cbInstr      Instruction size
  * @param   fScanned    Mark as scanned or not
  */
-VMMR3DECL(int) CSAMR3MarkCode(PVM pVM, RTRCPTR pInstr, uint32_t opsize, bool fScanned)
+VMMR3DECL(int) CSAMR3MarkCode(PVM pVM, RTRCPTR pInstr, uint32_t cbInstr, bool fScanned)
 {
     PCSAMPAGE pPage = 0;
@@ -2236,6 +2236,6 @@
     }
 
-    Log(("CSAMR3MarkCode: %RRv size=%d fScanned=%d\n", pInstr, opsize, fScanned));
-    csamMarkCode(pVM, pPage, pInstr, opsize, fScanned);
+    Log(("CSAMR3MarkCode: %RRv size=%d fScanned=%d\n", pInstr, cbInstr, fScanned));
+    csamMarkCode(pVM, pPage, pInstr, cbInstr, fScanned);
     return VINF_SUCCESS;
 }
Index: /trunk/src/VBox/VMM/VMMR3/DBGFDisas.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMR3/DBGFDisas.cpp	(revision 41731)
+++ /trunk/src/VBox/VMM/VMMR3/DBGFDisas.cpp	(revision 41732)
@@ -500,5 +500,5 @@
     else
     {
-        uint32_t cbBits = State.Cpu.opsize;
+        uint32_t cbBits = State.Cpu.cbInstr;
         uint8_t *pau8Bits = (uint8_t *)alloca(cbBits);
         rc = dbgfR3DisasInstrRead(&State.Cpu, pau8Bits, GCPtr, cbBits);
@@ -542,5 +542,5 @@
 
     if (pcbInstr)
-        *pcbInstr = State.Cpu.opsize;
+        *pcbInstr = State.Cpu.cbInstr;
 
     dbgfR3DisasInstrDone(&State);
Index: /trunk/src/VBox/VMM/VMMR3/EMHwaccm.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMR3/EMHwaccm.cpp	(revision 41731)
+++ /trunk/src/VBox/VMM/VMMR3/EMHwaccm.cpp	(revision 41732)
@@ -354,5 +354,5 @@
         if (IOM_SUCCESS(rcStrict))
         {
-            pCtx->rip += Cpu.opsize;
+            pCtx->rip += Cpu.cbInstr;
             STAM_PROFILE_STOP(&pVCpu->em.s.StatIOEmu, a);
             return VBOXSTRICTRC_TODO(rcStrict);
Index: /trunk/src/VBox/VMM/VMMR3/EMRaw.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMR3/EMRaw.cpp	(revision 41731)
+++ /trunk/src/VBox/VMM/VMMR3/EMRaw.cpp	(revision 41732)
@@ -475,5 +475,5 @@
         if (IOM_SUCCESS(rcStrict))
         {
-            pCtx->rip += Cpu.opsize;
+            pCtx->rip += Cpu.cbInstr;
             STAM_PROFILE_STOP(&pVCpu->em.s.StatIOEmu, a);
             return VBOXSTRICTRC_TODO(rcStrict);
@@ -1048,6 +1048,6 @@
                 case OP_CLI:
                     pCtx->eflags.u32 &= ~X86_EFL_IF;
-                    Assert(Cpu.opsize == 1);
-                    pCtx->rip += Cpu.opsize;
+                    Assert(Cpu.cbInstr == 1);
+                    pCtx->rip += Cpu.cbInstr;
                     STAM_PROFILE_STOP(&pVCpu->em.s.StatPrivEmu, a);
                     return VINF_EM_RESCHEDULE_REM; /* must go to the recompiler now! */
@@ -1055,7 +1055,7 @@
                 case OP_STI:
                     pCtx->eflags.u32 |= X86_EFL_IF;
-                    EMSetInhibitInterruptsPC(pVCpu, pCtx->rip + Cpu.opsize);
-                    Assert(Cpu.opsize == 1);
-                    pCtx->rip += Cpu.opsize;
+                    EMSetInhibitInterruptsPC(pVCpu, pCtx->rip + Cpu.cbInstr);
+                    Assert(Cpu.cbInstr == 1);
+                    pCtx->rip += Cpu.cbInstr;
                     STAM_PROFILE_STOP(&pVCpu->em.s.StatPrivEmu, a);
                     return VINF_SUCCESS;
Index: /trunk/src/VBox/VMM/VMMR3/PATM.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMR3/PATM.cpp	(revision 41731)
+++ /trunk/src/VBox/VMM/VMMR3/PATM.cpp	(revision 41732)
@@ -1414,5 +1414,5 @@
         {
             if (   pCurInstrGC > pPatch->pPrivInstrGC
-                && pCurInstrGC + pCpu->opsize < pPatch->pPrivInstrGC + SIZEOF_NEARJUMP32) /* hardcoded patch jump size; cbPatchJump is still zero */
+                && pCurInstrGC + pCpu->cbInstr < pPatch->pPrivInstrGC + SIZEOF_NEARJUMP32) /* hardcoded patch jump size; cbPatchJump is still zero */
             {
                 Log(("Dangerous unconditional jump ends in our generated patch jump!! (%x vs %x)\n", pCurInstrGC, pPatch->pPrivInstrGC));
@@ -1449,5 +1449,5 @@
     }
 
-    pPatch->cbPatchBlockSize += pCpu->opsize;
+    pPatch->cbPatchBlockSize += pCpu->cbInstr;
 
     /* Illegal instruction -> end of analysis phase for this code block */
@@ -1514,5 +1514,5 @@
     {
         /* The end marker for this kind of patch is any instruction at a location outside our patch jump. */
-        Log(("End of block at %RRv size %d\n", pCurInstrGC, pCpu->opsize));
+        Log(("End of block at %RRv size %d\n", pCurInstrGC, pCpu->cbInstr));
         return VINF_SUCCESS;
     }
@@ -1591,5 +1591,5 @@
     }
 
-    pPatch->cbPatchBlockSize += pCpu->opsize;
+    pPatch->cbPatchBlockSize += pCpu->cbInstr;
 
     /* Illegal instruction -> end of analysis phase for this code block */
@@ -1681,5 +1681,5 @@
     else
     if (pCurInstrGC > pPatch->pInstrGCHighest)
-        pPatch->pInstrGCHighest = pCurInstrGC + pCpu->opsize;
+        pPatch->pInstrGCHighest = pCurInstrGC + pCpu->cbInstr;
 
     /* Illegal instruction -> end of recompile phase for this code block. */
@@ -1790,5 +1790,5 @@
             pPatch->flags   |= PATMFL_INHIBIT_IRQS | PATMFL_GENERATE_JUMPTOGUEST;
             fInhibitIRQInstr = true;
-            pNextInstrGC     = pCurInstrGC + pCpu->opsize;
+            pNextInstrGC     = pCurInstrGC + pCpu->cbInstr;
             Log(("Inhibit irqs for instruction OP_STI at %RRv\n", pCurInstrGC));
         }
@@ -1798,5 +1798,5 @@
         {
             DISCPUSTATE cpu = *pCpu;
-            unsigned    opsize;
+            unsigned    cbInstr;
             int         disret;
             RCPTRTYPE(uint8_t *) pReturnInstrGC;
@@ -1804,5 +1804,5 @@
             pPatch->flags |= PATMFL_FOUND_PATCHEND;
 
-            pNextInstrGC = pCurInstrGC + pCpu->opsize;
+            pNextInstrGC = pCurInstrGC + pCpu->cbInstr;
             {   /* Force pNextInstrHC out of scope after using it */
                 uint8_t *pNextInstrHC = PATMGCVirtToHCVirt(pVM, pCacheRec, pNextInstrGC);
@@ -1814,5 +1814,5 @@
 
                 // Disassemble the next instruction
-                disret = patmR3DisInstr(pVM, pPatch, pNextInstrGC, pNextInstrHC, PATMREAD_ORGCODE, &cpu, &opsize);
+                disret = patmR3DisInstr(pVM, pPatch, pNextInstrGC, pNextInstrHC, PATMREAD_ORGCODE, &cpu, &cbInstr);
             }
             if (disret == false)
@@ -1821,5 +1821,5 @@
                 return VERR_PATCHING_REFUSED;
             }
-            pReturnInstrGC = pNextInstrGC + opsize;
+            pReturnInstrGC = pNextInstrGC + cbInstr;
 
             if (   (pPatch->flags & (PATMFL_DUPLICATE_FUNCTION))
@@ -1848,5 +1848,5 @@
     case OP_POPF:
     {
-        bool fGenerateJmpBack = (pCurInstrGC + pCpu->opsize - pInstrGC >= SIZEOF_NEARJUMP32);
+        bool fGenerateJmpBack = (pCurInstrGC + pCpu->cbInstr - pInstrGC >= SIZEOF_NEARJUMP32);
 
         /* Not an exit point for IDT handler or function replacement patches */
@@ -1855,5 +1855,5 @@
             fGenerateJmpBack = false;
 
-        rc = patmPatchGenPopf(pVM, pPatch, pCurInstrGC + pCpu->opsize, !!(pCpu->prefix & DISPREFIX_OPSIZE), fGenerateJmpBack);
+        rc = patmPatchGenPopf(pVM, pPatch, pCurInstrGC + pCpu->cbInstr, !!(pCpu->prefix & DISPREFIX_OPSIZE), fGenerateJmpBack);
         if (RT_SUCCESS(rc))
         {
@@ -2024,5 +2024,5 @@
     {
         int     rc2;
-        RTRCPTR pNextInstrGC = pCurInstrGC + pCpu->opsize;
+        RTRCPTR pNextInstrGC = pCurInstrGC + pCpu->cbInstr;
 
         pPatch->flags &= ~PATMFL_INHIBIT_IRQS;
@@ -2048,13 +2048,13 @@
         // If single instruction patch, we've copied enough instructions *and* the current instruction is not a relative jump
         if (    (pPatch->flags & PATMFL_CHECK_SIZE)
-             &&  pCurInstrGC + pCpu->opsize - pInstrGC >= SIZEOF_NEARJUMP32
+             &&  pCurInstrGC + pCpu->cbInstr - pInstrGC >= SIZEOF_NEARJUMP32
              &&  !(pCpu->pCurInstr->optype & DISOPTYPE_RELATIVE_CONTROLFLOW)
              &&  !(pPatch->flags & PATMFL_RECOMPILE_NEXT) /* do not do this when the next instruction *must* be executed! */
            )
         {
-            RTRCPTR pNextInstrGC = pCurInstrGC + pCpu->opsize;
+            RTRCPTR pNextInstrGC = pCurInstrGC + pCpu->cbInstr;
 
             // The end marker for this kind of patch is any instruction at a location outside our patch jump
-            Log(("patmRecompileCallback: end found for single instruction patch at %RRv opsize %d\n", pNextInstrGC, pCpu->opsize));
+            Log(("patmRecompileCallback: end found for single instruction patch at %RRv cbInstr %d\n", pNextInstrGC, pCpu->cbInstr));
 
             rc = patmPatchGenJumpToGuest(pVM, pPatch, pNextInstrGC);
@@ -2179,5 +2179,5 @@
     PPATCHINFO pPatch = (PPATCHINFO)pCacheRec->pPatch;
     int rc = VWRN_CONTINUE_ANALYSIS;
-    uint32_t opsize, delta;
+    uint32_t cbInstr, delta;
     R3PTRTYPE(uint8_t *) pCurInstrHC = 0;
     bool disret;
@@ -2199,5 +2199,5 @@
 
         disret = patmR3DisInstrToStr(pVM, pPatch, pCurInstrGC, pCurInstrHC, PATMREAD_RAWCODE,
-                                     &cpu, &opsize, szOutput, sizeof(szOutput));
+                                     &cpu, &cbInstr, szOutput, sizeof(szOutput));
         if (PATMIsPatchGCAddr(pVM, pCurInstrGC))
         {
@@ -2283,5 +2283,5 @@
             rc = VWRN_CONTINUE_ANALYSIS;
         }
-        pCurInstrGC += opsize;
+        pCurInstrGC += cbInstr;
     }
 end:
@@ -2349,5 +2349,5 @@
     PPATCHINFO pPatch = (PPATCHINFO)pCacheRec->pPatch;
     int rc = VWRN_CONTINUE_ANALYSIS;
-    uint32_t opsize;
+    uint32_t cbInstr;
     R3PTRTYPE(uint8_t *) pCurInstrHC = 0;
     bool disret;
@@ -2366,8 +2366,8 @@
 #ifdef LOG_ENABLED
         disret = patmR3DisInstrToStr(pVM, pPatch, pCurInstrGC, pCurInstrHC, PATMREAD_ORGCODE,
-                                     &cpu, &opsize, szOutput, sizeof(szOutput));
+                                     &cpu, &cbInstr, szOutput, sizeof(szOutput));
         Log(("Recompile: %s", szOutput));
 #else
-        disret = patmR3DisInstr(pVM, pPatch, pCurInstrGC, pCurInstrHC, PATMREAD_ORGCODE, &cpu, &opsize);
+        disret = patmR3DisInstr(pVM, pPatch, pCurInstrGC, pCurInstrHC, PATMREAD_ORGCODE, &cpu, &cbInstr);
 #endif
         if (disret == false)
@@ -2392,5 +2392,5 @@
                 uint32_t    opsizenext;
                 uint8_t *pNextInstrHC;
-                RTRCPTR  pNextInstrGC = pCurInstrGC + opsize;
+                RTRCPTR  pNextInstrGC = pCurInstrGC + cbInstr;
 
                 Log(("patmRecompileCodeStream: irqs inhibited by instruction %RRv\n", pNextInstrGC));
@@ -2473,5 +2473,5 @@
                 Log(("patmRecompileCodeStream continue passed conditional jump\n"));
                 /* First we need to finish this linear code stream until the next exit point. */
-                rc = patmRecompileCodeStream(pVM, pInstrGC, pCurInstrGC+opsize, pfnPATMR3Recompile, pCacheRec);
+                rc = patmRecompileCodeStream(pVM, pInstrGC, pCurInstrGC+cbInstr, pfnPATMR3Recompile, pCacheRec);
                 if (RT_FAILURE(rc))
                 {
@@ -2522,5 +2522,5 @@
             goto end;
         }
-        pCurInstrGC += opsize;
+        pCurInstrGC += cbInstr;
     }
 end:
@@ -2631,5 +2631,5 @@
     DISCPUSTATE cpu;
     char szOutput[256];
-    uint32_t opsize, i = 0;
+    uint32_t cbInstr, i = 0;
     bool disret;
 
@@ -2637,11 +2637,11 @@
     {
         disret = patmR3DisInstrToStr(pVM, pPatch, pPatch->pPrivInstrGC + i, NULL, PATMREAD_ORGCODE,
-                                     &cpu, &opsize, szOutput, sizeof(szOutput));
+                                     &cpu, &cbInstr, szOutput, sizeof(szOutput));
         if (disret == false)
             break;
 
         Log(("Org patch jump: %s", szOutput));
-        Assert(opsize);
-        i += opsize;
+        Assert(cbInstr);
+        i += cbInstr;
     }
 #endif
@@ -2656,11 +2656,11 @@
         {
             disret = patmR3DisInstrToStr(pVM, pPatch, pPatch->pPrivInstrGC + i, NULL, PATMREAD_ORGCODE,
-                                         &cpu, &opsize, szOutput, sizeof(szOutput));
+                                         &cpu, &cbInstr, szOutput, sizeof(szOutput));
             if (disret == false)
                 break;
 
             Log(("Org instr: %s", szOutput));
-            Assert(opsize);
-            i += opsize;
+            Assert(cbInstr);
+            i += cbInstr;
         }
     }
@@ -2963,5 +2963,5 @@
     bool disret;
     DISCPUSTATE cpuPush, cpuJmp;
-    uint32_t opsize;
+    uint32_t cbInstr;
     RTRCPTR  pCurInstrGC = pInstrGC;
     uint8_t *pCurInstrHC, *pInstrHC;
@@ -2976,5 +2976,5 @@
      * condition here and only patch the common entypoint once.
      */
-    disret = patmR3DisInstr(pVM, pPatch, pCurInstrGC, pCurInstrHC, PATMREAD_ORGCODE, &cpuPush, &opsize);
+    disret = patmR3DisInstr(pVM, pPatch, pCurInstrGC, pCurInstrHC, PATMREAD_ORGCODE, &cpuPush, &cbInstr);
     Assert(disret);
     if (disret && cpuPush.pCurInstr->opcode == OP_PUSH)
@@ -2982,7 +2982,7 @@
         RTRCPTR  pJmpInstrGC;
         int      rc;
-        pCurInstrGC += opsize;
-
-        disret = patmR3DisInstr(pVM, pPatch, pCurInstrGC, pCurInstrHC, PATMREAD_ORGCODE, &cpuJmp, &opsize);
+        pCurInstrGC += cbInstr;
+
+        disret = patmR3DisInstr(pVM, pPatch, pCurInstrGC, pCurInstrHC, PATMREAD_ORGCODE, &cpuJmp, &cbInstr);
         if (   disret
             && cpuJmp.pCurInstr->opcode == OP_JMP
@@ -3569,11 +3569,11 @@
     RTRCPTR       pTargetGC;
     PPATMPATCHREC pPatchFunction;
-    uint32_t      opsize;
+    uint32_t      cbInstr;
     bool          disret;
 
     Assert(pPatch->flags & PATMFL_REPLACE_FUNCTION_CALL);
-    Assert((pCpu->pCurInstr->opcode == OP_CALL || pCpu->pCurInstr->opcode == OP_JMP) && pCpu->opsize == SIZEOF_NEARJUMP32);
-
-    if ((pCpu->pCurInstr->opcode != OP_CALL && pCpu->pCurInstr->opcode != OP_JMP) || pCpu->opsize != SIZEOF_NEARJUMP32)
+    Assert((pCpu->pCurInstr->opcode == OP_CALL || pCpu->pCurInstr->opcode == OP_JMP) && pCpu->cbInstr == SIZEOF_NEARJUMP32);
+
+    if ((pCpu->pCurInstr->opcode != OP_CALL && pCpu->pCurInstr->opcode != OP_JMP) || pCpu->cbInstr != SIZEOF_NEARJUMP32)
     {
         rc = VERR_PATCHING_REFUSED;
@@ -3604,5 +3604,5 @@
                 break;
 
-            disret = patmR3DisInstr(pVM, pPatch, pTargetGC, pTmpInstrHC, PATMREAD_ORGCODE, &cpu, &opsize);
+            disret = patmR3DisInstr(pVM, pPatch, pTargetGC, pTmpInstrHC, PATMREAD_ORGCODE, &cpu, &cbInstr);
             if (disret == false || cpu.pCurInstr->opcode != OP_JMP)
                 break;
@@ -3639,5 +3639,5 @@
     /* Lowest and highest address for write monitoring. */
     pPatch->pInstrGCLowest  = pInstrGC;
-    pPatch->pInstrGCHighest = pInstrGC + pCpu->opsize;
+    pPatch->pInstrGCHighest = pInstrGC + pCpu->cbInstr;
     PATM_LOG_ORG_PATCH_INSTR(pVM, pPatch, "Call");
 
@@ -3684,5 +3684,5 @@
 
     /* Add relocation record for cached data access. */
-    if (patmPatchAddReloc32(pVM, pPatch, &pPB[pCpu->opsize - sizeof(RTRCPTR)], FIXUP_ABSOLUTE, pPatch->pPrivInstrGC, pVM->patm.s.mmio.pCachedData) != VINF_SUCCESS)
+    if (patmPatchAddReloc32(pVM, pPatch, &pPB[pCpu->cbInstr - sizeof(RTRCPTR)], FIXUP_ABSOLUTE, pPatch->pPrivInstrGC, pVM->patm.s.mmio.pCachedData) != VINF_SUCCESS)
     {
         Log(("Relocation failed for cached mmio address!!\n"));
@@ -3698,5 +3698,5 @@
 
     /* Replace address with that of the cached item. */
-    rc = PGMPhysSimpleDirtyWriteGCPtr(VMMGetCpu0(pVM), pInstrGC + pCpu->opsize - sizeof(RTRCPTR), &pVM->patm.s.mmio.pCachedData, sizeof(RTRCPTR));
+    rc = PGMPhysSimpleDirtyWriteGCPtr(VMMGetCpu0(pVM), pInstrGC + pCpu->cbInstr - sizeof(RTRCPTR), &pVM->patm.s.mmio.pCachedData, sizeof(RTRCPTR));
     AssertRC(rc);
     if (RT_FAILURE(rc))
@@ -3733,5 +3733,5 @@
 {
     DISCPUSTATE   cpu;
-    uint32_t      opsize;
+    uint32_t      cbInstr;
     bool          disret;
     uint8_t      *pInstrHC;
@@ -3745,5 +3745,5 @@
     /* Disassemble mmio instruction. */
     disret = patmR3DisInstrNoStrOpMode(pVM, pPatch, pInstrGC, pInstrHC, PATMREAD_ORGCODE,
-                                       &cpu, &opsize);
+                                       &cpu, &cbInstr);
     if (disret == false)
     {
@@ -3752,6 +3752,6 @@
     }
 
-    AssertMsg(opsize <= MAX_INSTR_SIZE, ("privileged instruction too big %d!!\n", opsize));
-    if (opsize > MAX_INSTR_SIZE)
+    AssertMsg(cbInstr <= MAX_INSTR_SIZE, ("privileged instruction too big %d!!\n", cbInstr));
+    if (cbInstr > MAX_INSTR_SIZE)
         return VERR_PATCHING_REFUSED;
     if (cpu.param2.fUse != DISUSE_DISPLACEMENT32)
@@ -3759,5 +3759,5 @@
 
     /* Add relocation record for cached data access. */
-    if (patmPatchAddReloc32(pVM, pPatch, &pInstrHC[cpu.opsize - sizeof(RTRCPTR)], FIXUP_ABSOLUTE) != VINF_SUCCESS)
+    if (patmPatchAddReloc32(pVM, pPatch, &pInstrHC[cpu.cbInstr - sizeof(RTRCPTR)], FIXUP_ABSOLUTE) != VINF_SUCCESS)
     {
         Log(("Relocation failed for cached mmio address!!\n"));
@@ -3765,9 +3765,9 @@
     }
     /* Replace address with that of the cached item. */
-    *(RTRCPTR *)&pInstrHC[cpu.opsize - sizeof(RTRCPTR)] = pVM->patm.s.mmio.pCachedData;
+    *(RTRCPTR *)&pInstrHC[cpu.cbInstr - sizeof(RTRCPTR)] = pVM->patm.s.mmio.pCachedData;
 
     /* Lowest and highest address for write monitoring. */
     pPatch->pInstrGCLowest  = pInstrGC;
-    pPatch->pInstrGCHighest = pInstrGC + cpu.opsize;
+    pPatch->pInstrGCHighest = pInstrGC + cpu.cbInstr;
 
     PATM_LOG_ORG_PATCH_INSTR(pVM, pPatch, "MMIO");
@@ -3859,5 +3859,5 @@
     /* Lowest and highest address for write monitoring. */
     pPatch->pInstrGCLowest  = pInstrGC;
-    pPatch->pInstrGCHighest = pInstrGC + pCpu->opsize;
+    pPatch->pInstrGCHighest = pInstrGC + pCpu->cbInstr;
 
     pPatch->uState = PATCH_ENABLED;
@@ -3921,9 +3921,9 @@
             goto failure;
 
-        Assert(pCpu->opsize == SIZEOF_NEARJUMP32 || pCpu->opsize == SIZEOF_NEAR_COND_JUMP32);
-        if (pCpu->opsize != SIZEOF_NEARJUMP32 && pCpu->opsize != SIZEOF_NEAR_COND_JUMP32)
+        Assert(pCpu->cbInstr == SIZEOF_NEARJUMP32 || pCpu->cbInstr == SIZEOF_NEAR_COND_JUMP32);
+        if (pCpu->cbInstr != SIZEOF_NEARJUMP32 && pCpu->cbInstr != SIZEOF_NEAR_COND_JUMP32)
             goto failure;
 
-        if (PAGE_ADDRESS(pInstrGC) != PAGE_ADDRESS(pInstrGC + pCpu->opsize))
+        if (PAGE_ADDRESS(pInstrGC) != PAGE_ADDRESS(pInstrGC + pCpu->cbInstr))
         {
             STAM_COUNTER_INC(&pVM->patm.s.StatPageBoundaryCrossed);
@@ -3940,7 +3940,7 @@
 
     // make a copy of the guest code bytes that will be overwritten
-    Assert(pCpu->opsize <= sizeof(pPatch->aPrivInstr));
-    Assert(pCpu->opsize >= SIZEOF_NEARJUMP32);
-    pPatch->cbPatchJump = pCpu->opsize;
+    Assert(pCpu->cbInstr <= sizeof(pPatch->aPrivInstr));
+    Assert(pCpu->cbInstr >= SIZEOF_NEARJUMP32);
+    pPatch->cbPatchJump = pCpu->cbInstr;
 
     rc = PGMPhysSimpleReadGCPtr(VMMGetCpu0(pVM), pPatch->aPrivInstr, pPatch->pPrivInstrGC, pPatch->cbPatchJump);
@@ -3952,7 +3952,7 @@
      * references the target instruction in the conflict patch.
      */
-    RTRCPTR pJmpDest = PATMR3GuestGCPtrToPatchGCPtr(pVM, pInstrGC + pCpu->opsize + (int32_t)pCpu->param1.parval);
-
-    AssertMsg(pJmpDest, ("PATMR3GuestGCPtrToPatchGCPtr failed for %RRv\n", pInstrGC + pCpu->opsize + (int32_t)pCpu->param1.parval));
+    RTRCPTR pJmpDest = PATMR3GuestGCPtrToPatchGCPtr(pVM, pInstrGC + pCpu->cbInstr + (int32_t)pCpu->param1.parval);
+
+    AssertMsg(pJmpDest, ("PATMR3GuestGCPtrToPatchGCPtr failed for %RRv\n", pInstrGC + pCpu->cbInstr + (int32_t)pCpu->param1.parval));
     pPatch->pPatchJumpDestGC = pJmpDest;
 
@@ -4026,5 +4026,5 @@
     DISCPUSTATE cpu;
     R3PTRTYPE(uint8_t *) pInstrHC;
-    uint32_t opsize;
+    uint32_t cbInstr;
     PPATMPATCHREC pPatchRec;
     PCPUMCTX pCtx = 0;
@@ -4242,5 +4242,5 @@
     }
 
-    disret = patmR3DisInstrNoStrOpMode(pVM, &pPatchRec->patch, pInstrGC, NULL, PATMREAD_ORGCODE, &cpu, &opsize);
+    disret = patmR3DisInstrNoStrOpMode(pVM, &pPatchRec->patch, pInstrGC, NULL, PATMREAD_ORGCODE, &cpu, &cbInstr);
     if (disret == false)
     {
@@ -4249,9 +4249,9 @@
     }
 
-    AssertMsg(opsize <= MAX_INSTR_SIZE, ("privileged instruction too big %d!!\n", opsize));
-    if (opsize > MAX_INSTR_SIZE)
+    AssertMsg(cbInstr <= MAX_INSTR_SIZE, ("privileged instruction too big %d!!\n", cbInstr));
+    if (cbInstr > MAX_INSTR_SIZE)
         return VERR_PATCHING_REFUSED;
 
-    pPatchRec->patch.cbPrivInstr = opsize;
+    pPatchRec->patch.cbPrivInstr = cbInstr;
     pPatchRec->patch.opcode      = cpu.pCurInstr->opcode;
 
@@ -4308,5 +4308,5 @@
             pPatchRec->patch.flags |= PATMFL_IDTHANDLER;    /* we treat a sysenter handler as an IDT handler */
 
-        rc = patmIdtHandler(pVM, pInstrGC, opsize, pPatchRec, &cacheRec);
+        rc = patmIdtHandler(pVM, pInstrGC, cbInstr, pPatchRec, &cacheRec);
 #ifdef VBOX_WITH_STATISTICS
         if (    rc == VINF_SUCCESS
@@ -4384,5 +4384,5 @@
         case OP_CLI:
             Log(("PATMR3InstallPatch %s %RRv code32=%d\n", patmGetInstructionString(pPatchRec->patch.opcode, pPatchRec->patch.flags), pInstrGC, (flags & PATMFL_CODE32) ? 1 : 0));
-            rc = PATMR3PatchBlock(pVM, pInstrGC, pInstrHC, cpu.pCurInstr->opcode, opsize, pPatchRec);
+            rc = PATMR3PatchBlock(pVM, pInstrGC, pInstrHC, cpu.pCurInstr->opcode, cbInstr, pPatchRec);
             break;
 
@@ -4493,10 +4493,10 @@
         DISCPUSTATE cpu;
         bool        disret;
-        uint32_t    opsize;
-
-        disret = patmR3DisInstr(pVM, pPatch, pInstrGC, pInstrHC, PATMREAD_ORGCODE | PATMREAD_NOCHECK, &cpu, &opsize);
+        uint32_t    cbInstr;
+
+        disret = patmR3DisInstr(pVM, pPatch, pInstrGC, pInstrHC, PATMREAD_ORGCODE | PATMREAD_NOCHECK, &cpu, &cbInstr);
         PGMPhysReleasePageMappingLock(pVM, &Lock);
         if (disret)
-            return opsize;
+            return cbInstr;
     }
     return 0;
@@ -5187,5 +5187,5 @@
     DISCPUSTATE          cpu;
     R3PTRTYPE(uint8_t *) pInstrHC;
-    uint32_t             opsize;
+    uint32_t             cbInstr;
     bool                 disret;
     int                  rc;
@@ -5193,5 +5193,5 @@
     RT_ZERO(patch);
     pInstrHC = PATMGCVirtToHCVirt(pVM, &patch, pInstrGC);
-    disret = patmR3DisInstr(pVM, &patch, pInstrGC, pInstrHC, PATMREAD_ORGCODE, &cpu, &opsize);
+    disret = patmR3DisInstr(pVM, &patch, pInstrGC, pInstrHC, PATMREAD_ORGCODE, &cpu, &cbInstr);
     /*
      * If it's a 5 byte relative jump, then we can work around the problem by replacing the 32 bits relative offset
@@ -5335,5 +5335,5 @@
                         DISCPUSTATE cpu;
                         char szOutput[256];
-                        uint32_t opsize;
+                        uint32_t cbInstr;
                         uint32_t i = 0;
                         bool disret;
@@ -5341,7 +5341,7 @@
                         {
                             disret = patmR3DisInstrToStr(pVM, pPatch, pPatch->pPrivInstrGC + i, NULL, PATMREAD_ORGCODE,
-                                                         &cpu, &opsize, szOutput, sizeof(szOutput));
+                                                         &cpu, &cbInstr, szOutput, sizeof(szOutput));
                             Log(("Renewed patch instr: %s", szOutput));
-                            i += opsize;
+                            i += cbInstr;
                         }
                     }
@@ -6020,5 +6020,5 @@
         {
             if (RT_SUCCESS(rc))
-                cbDirty += CpuOld.opsize;
+                cbDirty += CpuOld.cbInstr;
             else
             if (!cbDirty)
@@ -6040,6 +6040,6 @@
         pPatchToGuestRec = NULL;
 
-        pCurPatchInstrGC += CpuOld.opsize;
-        cbDirty          += CpuOld.opsize;
+        pCurPatchInstrGC += CpuOld.cbInstr;
+        cbDirty          += CpuOld.cbInstr;
 
         /* Let's see if there's another dirty instruction right after. */
@@ -6086,5 +6086,5 @@
             /* If the instruction is completely harmless (which implies a 1:1 patch copy). */
             if (    rc == VINF_SUCCESS
-                &&  CpuNew.opsize <= cbLeft /* must still fit */
+                &&  CpuNew.cbInstr <= cbLeft /* must still fit */
                 &&  fValidInstr
                )
@@ -6098,5 +6098,5 @@
 
                 /* Copy the new instruction. */
-                rc = PGMPhysSimpleReadGCPtr(VMMGetCpu0(pVM), pCurPatchInstrHC, pCurInstrGC, CpuNew.opsize);
+                rc = PGMPhysSimpleReadGCPtr(VMMGetCpu0(pVM), pCurPatchInstrHC, pCurInstrGC, CpuNew.cbInstr);
                 AssertRC(rc);
 
@@ -6119,8 +6119,8 @@
                 break;
             }
-            pCurInstrGC      += CpuNew.opsize;
-            pCurPatchInstrHC += CpuNew.opsize;
-            pCurPatchInstrGC += CpuNew.opsize;
-            cbLeft           -= CpuNew.opsize;
+            pCurInstrGC      += CpuNew.cbInstr;
+            pCurPatchInstrHC += CpuNew.cbInstr;
+            pCurPatchInstrGC += CpuNew.cbInstr;
+            cbLeft           -= CpuNew.cbInstr;
 
             /* Check if we expanded a complex guest instruction into a patch stream (e.g. call) */
@@ -6402,5 +6402,5 @@
         DISCPUSTATE cpu;
         bool        disret;
-        uint32_t    opsize;
+        uint32_t    cbInstr;
         PATMP2GLOOKUPREC cacheRec;
         RT_ZERO(cacheRec);
@@ -6408,5 +6408,5 @@
 
         disret = patmR3DisInstr(pVM, &pPatch->patch, pNewEip, PATMGCVirtToHCVirt(pVM, &cacheRec, pNewEip), PATMREAD_RAWCODE,
-                                &cpu, &opsize);
+                                &cpu, &cbInstr);
         if (cacheRec.Lock.pvMap)
             PGMPhysReleasePageMappingLock(pVM, &cacheRec.Lock);
@@ -6441,5 +6441,5 @@
         DISCPUSTATE cpu;
         bool        disret;
-        uint32_t    opsize;
+        uint32_t    cbInstr;
         PATMP2GLOOKUPREC cacheRec;
         RT_ZERO(cacheRec);
@@ -6447,5 +6447,5 @@
 
         disret = patmR3DisInstr(pVM, &pPatch->patch, pNewEip, PATMGCVirtToHCVirt(pVM, &cacheRec, pNewEip), PATMREAD_ORGCODE,
-                                &cpu, &opsize);
+                                &cpu, &cbInstr);
         if (cacheRec.Lock.pvMap)
             PGMPhysReleasePageMappingLock(pVM, &cacheRec.Lock);
@@ -6455,5 +6455,5 @@
             cpu.mode = (pPatch->patch.flags & PATMFL_CODE32) ? DISCPUMODE_32BIT : DISCPUMODE_16BIT;
             disret = patmR3DisInstr(pVM, &pPatch->patch, pNewEip, PATMGCVirtToHCVirt(pVM, &cacheRec, pNewEip), PATMREAD_RAWCODE,
-                                    &cpu, &opsize);
+                                    &cpu, &cbInstr);
             if (cacheRec.Lock.pvMap)
                 PGMPhysReleasePageMappingLock(pVM, &cacheRec.Lock);
Index: /trunk/src/VBox/VMM/VMMR3/PATMPatch.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMR3/PATMPatch.cpp	(revision 41731)
+++ /trunk/src/VBox/VMM/VMMR3/PATMPatch.cpp	(revision 41732)
@@ -421,5 +421,5 @@
     PATCHGEN_PROLOG(pVM, pPatch);
 
-    uint32_t const cbInstrShutUpGcc = pCpu->opsize;
+    uint32_t const cbInstrShutUpGcc = pCpu->cbInstr;
     rc = patmPatchReadBytes(pVM, pPB, pCurInstrGC, cbInstrShutUpGcc);
     AssertRC(rc);
@@ -712,7 +712,7 @@
             i++;    //skip segment prefix
 
-        rc = patmPatchReadBytes(pVM, &pPB[offset], (RTRCPTR)((RTGCUINTPTR32)pCurInstrGC + i), pCpu->opsize - i);
+        rc = patmPatchReadBytes(pVM, &pPB[offset], (RTRCPTR)((RTGCUINTPTR32)pCurInstrGC + i), pCpu->cbInstr - i);
         AssertRCReturn(rc, rc);
-        offset += (pCpu->opsize - i);
+        offset += (pCpu->cbInstr - i);
     }
     else
@@ -725,5 +725,5 @@
 
         /* Relative call to patch code (patch to patch -> no fixup). */
-        Log(("PatchGenCall from %RRv (next=%RRv) to %RRv\n", pCurInstrGC, pCurInstrGC + pCpu->opsize, pTargetGC));
+        Log(("PatchGenCall from %RRv (next=%RRv) to %RRv\n", pCurInstrGC, pCurInstrGC + pCpu->cbInstr, pTargetGC));
 
         /* We push it onto the stack here, so the guest's context isn't ruined when this happens to cause
@@ -749,5 +749,5 @@
     /* 3: Generate code to lookup address in our local cache; call hypervisor PATM code if it can't be located. */
     PATCHGEN_PROLOG_NODEF(pVM, pPatch);
-    callInfo.pReturnGC      = pCurInstrGC + pCpu->opsize;
+    callInfo.pReturnGC      = pCurInstrGC + pCpu->cbInstr;
     callInfo.pTargetGC      = (fIndirect) ? 0xDEADBEEF : pTargetGC;
     size = patmPatchGenCode(pVM, pPatch, pPB, (fIndirect) ? &PATMCallIndirectRecord : &PATMCallRecord, 0, false, &callInfo);
@@ -809,7 +809,7 @@
         i++;    //skip segment prefix
 
-    rc = patmPatchReadBytes(pVM, &pPB[offset], (RTRCPTR)((RTGCUINTPTR32)pCurInstrGC + i), pCpu->opsize - i);
+    rc = patmPatchReadBytes(pVM, &pPB[offset], (RTRCPTR)((RTGCUINTPTR32)pCurInstrGC + i), pCpu->cbInstr - i);
     AssertRCReturn(rc, rc);
-    offset += (pCpu->opsize - i);
+    offset += (pCpu->cbInstr - i);
 
     /* align this block properly to make sure the jump table will not be misaligned. */
@@ -826,5 +826,5 @@
     /* 3: Generate code to lookup address in our local cache; call hypervisor PATM code if it can't be located. */
     PATCHGEN_PROLOG_NODEF(pVM, pPatch);
-    callInfo.pReturnGC      = pCurInstrGC + pCpu->opsize;
+    callInfo.pReturnGC      = pCurInstrGC + pCpu->cbInstr;
     callInfo.pTargetGC      = 0xDEADBEEF;
     size = patmPatchGenCode(pVM, pPatch, pPB, &PATMJumpIndirectRecord, 0, false, &callInfo);
@@ -1375,7 +1375,7 @@
             i++;    //skip segment prefix
 
-        rc = patmPatchReadBytes(pVM, &pPB[offset], (RTRCPTR)((RTGCUINTPTR32)pCurInstrGC + i), pCpu->opsize - i);
+        rc = patmPatchReadBytes(pVM, &pPB[offset], (RTRCPTR)((RTGCUINTPTR32)pCurInstrGC + i), pCpu->cbInstr - i);
         AssertRCReturn(rc, rc);
-        offset += (pCpu->opsize - i);
+        offset += (pCpu->cbInstr - i);
 
         pPB[offset++] = 0x66;              // mov       ax, CPUMCTX.tr/ldtr
@@ -1469,7 +1469,7 @@
     if (pCpu->prefix == DISPREFIX_SEG)
         i++;    //skip segment prefix
-    rc = patmPatchReadBytes(pVM, &pPB[offset], (RTRCPTR)((RTGCUINTPTR32)pCurInstrGC + i), pCpu->opsize - i);
+    rc = patmPatchReadBytes(pVM, &pPB[offset], (RTRCPTR)((RTGCUINTPTR32)pCurInstrGC + i), pCpu->cbInstr - i);
     AssertRCReturn(rc, rc);
-    offset += (pCpu->opsize - i);
+    offset += (pCpu->cbInstr - i);
 
     pPB[offset++] = 0x66;              // mov       ax, CPUMCTX.gdtr.limit
Index: /trunk/src/VBox/VMM/VMMRC/TRPMRC.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMRC/TRPMRC.cpp	(revision 41731)
+++ /trunk/src/VBox/VMM/VMMRC/TRPMRC.cpp	(revision 41732)
@@ -187,5 +187,5 @@
         {
             /* Just ignore the write. */
-            pRegFrame->eip += Cpu.opsize;
+            pRegFrame->eip += Cpu.cbInstr;
             return VINF_SUCCESS;
         }
Index: /trunk/src/VBox/VMM/VMMRC/TRPMRCHandlers.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMRC/TRPMRCHandlers.cpp	(revision 41731)
+++ /trunk/src/VBox/VMM/VMMRC/TRPMRCHandlers.cpp	(revision 41732)
@@ -754,5 +754,5 @@
                 }
             }
-            rc = TRPMForwardTrap(pVCpu, pRegFrame, (uint32_t)pCpu->param1.parval, pCpu->opsize, TRPM_TRAP_NO_ERRORCODE, TRPM_SOFTWARE_INT, 0xd);
+            rc = TRPMForwardTrap(pVCpu, pRegFrame, (uint32_t)pCpu->param1.parval, pCpu->cbInstr, TRPM_TRAP_NO_ERRORCODE, TRPM_SOFTWARE_INT, 0xd);
             if (RT_SUCCESS(rc) && rc != VINF_EM_RAW_GUEST_TRAP)
                 return trpmGCExitTrap(pVM, pVCpu, VINF_SUCCESS, pRegFrame);
@@ -775,5 +775,5 @@
                 break;
 
-            pRegFrame->eip += pCpu->opsize;
+            pRegFrame->eip += pCpu->cbInstr;
             return trpmGCExitTrap(pVM, pVCpu, VINF_EM_HALT, pRegFrame);
 
@@ -846,5 +846,5 @@
         {
             Assert(pCpu->param1.fUse & DISUSE_IMMEDIATE8);
-            rc = TRPMForwardTrap(pVCpu, pRegFrame, (uint32_t)pCpu->param1.parval, pCpu->opsize, TRPM_TRAP_NO_ERRORCODE, TRPM_SOFTWARE_INT, 0xd);
+            rc = TRPMForwardTrap(pVCpu, pRegFrame, (uint32_t)pCpu->param1.parval, pCpu->cbInstr, TRPM_TRAP_NO_ERRORCODE, TRPM_SOFTWARE_INT, 0xd);
             if (RT_SUCCESS(rc) && rc != VINF_EM_RAW_GUEST_TRAP)
                 return trpmGCExitTrap(pVM, pVCpu, VINF_SUCCESS, pRegFrame);
Index: /trunk/src/VBox/VMM/include/CSAMInternal.h
===================================================================
--- /trunk/src/VBox/VMM/include/CSAMInternal.h	(revision 41731)
+++ /trunk/src/VBox/VMM/include/CSAMInternal.h	(revision 41732)
@@ -271,7 +271,7 @@
     }
 #ifdef IN_RC
-    return (RTRCPTR)((uint8_t *)pBranchInstrGC + pCpu->opsize + disp);
+    return (RTRCPTR)((uint8_t *)pBranchInstrGC + pCpu->cbInstr + disp);
 #else
-    return pBranchInstrGC + pCpu->opsize + disp;
+    return pBranchInstrGC + pCpu->cbInstr + disp;
 #endif
 }
Index: /trunk/src/VBox/VMM/include/PATMInternal.h
===================================================================
--- /trunk/src/VBox/VMM/include/PATMInternal.h	(revision 41731)
+++ /trunk/src/VBox/VMM/include/PATMInternal.h	(revision 41732)
@@ -781,7 +781,7 @@
     }
 #ifdef IN_RC
-    return (RTRCPTR)((uint8_t *)pBranchInstrGC + pCpu->opsize + disp);
+    return (RTRCPTR)((uint8_t *)pBranchInstrGC + pCpu->cbInstr + disp);
 #else
-    return pBranchInstrGC + pCpu->opsize + disp;
+    return pBranchInstrGC + pCpu->cbInstr + disp;
 #endif
 }
Index: /trunk/src/VBox/VMM/testcase/tstVMStruct.h
===================================================================
--- /trunk/src/VBox/VMM/testcase/tstVMStruct.h	(revision 41731)
+++ /trunk/src/VBox/VMM/testcase/tstVMStruct.h	(revision 41732)
@@ -1404,3 +1404,5 @@
     GEN_CHECK_OFF(DISCPUSTATE, fFilter);
     GEN_CHECK_OFF(DISCPUSTATE, uInstrAddr);
-#endif    
+    GEN_CHECK_OFF(DISCPUSTATE, abInstr);
+    GEN_CHECK_OFF(DISCPUSTATE, pvUser);
+#endif