Changeset 41678 in vbox
- Timestamp:
- Jun 13, 2012 9:37:47 AM (12 years ago)
- Location:
- trunk
- Files:
-
- 16 edited
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include/VBox/dis.h (modified) (1 diff)
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src/VBox/Disassembler/DisasmCore.cpp (modified) (60 diffs)
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src/VBox/Disassembler/DisasmFormatYasm.cpp (modified) (22 diffs)
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src/VBox/Disassembler/DisasmReg.cpp (modified) (28 diffs)
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src/VBox/VMM/VMMAll/EMAll.cpp (modified) (7 diffs)
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src/VBox/VMM/VMMAll/IOMAll.cpp (modified) (15 diffs)
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src/VBox/VMM/VMMAll/IOMAllMMIO.cpp (modified) (1 diff)
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src/VBox/VMM/VMMAll/PGMAllPool.cpp (modified) (2 diffs)
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src/VBox/VMM/VMMR3/CSAM.cpp (modified) (7 diffs)
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src/VBox/VMM/VMMR3/EMRaw.cpp (modified) (3 diffs)
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src/VBox/VMM/VMMR3/HWACCM.cpp (modified) (9 diffs)
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src/VBox/VMM/VMMR3/PATM.cpp (modified) (11 diffs)
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src/VBox/VMM/VMMR3/PATMPatch.cpp (modified) (4 diffs)
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src/VBox/VMM/VMMRC/TRPMRCHandlers.cpp (modified) (2 diffs)
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src/VBox/VMM/include/CSAMInternal.h (modified) (2 diffs)
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src/VBox/VMM/include/PATMInternal.h (modified) (2 diffs)
Legend:
- Unmodified
- Added
- Removed
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trunk/include/VBox/dis.h
r41676 r41678 393 393 { 394 394 uint64_t parval; 395 uint64_t flags; 395 /** A combination of DISUSE_XXX. */ 396 uint64_t fUse; 396 397 union 397 398 { -
trunk/src/VBox/Disassembler/DisasmCore.cpp
r41676 r41678 616 616 if (ppszSIBIndexReg[index]) 617 617 { 618 pParam->f lags|= DISUSE_INDEX | regtype;618 pParam->fUse |= DISUSE_INDEX | regtype; 619 619 pParam->index.reg_gen = index; 620 620 621 621 if (scale != 0) 622 622 { 623 pParam->f lags|= DISUSE_SCALE;623 pParam->fUse |= DISUSE_SCALE; 624 624 pParam->scale = (1<<scale); 625 625 } … … 631 631 if (pCpu->addrmode == DISCPUMODE_32BIT) 632 632 { 633 pParam->f lags|= DISUSE_DISPLACEMENT32;633 pParam->fUse |= DISUSE_DISPLACEMENT32; 634 634 pParam->uDisp.i32 = pCpu->i32SibDisp; 635 635 } 636 636 else 637 637 { /* sign-extend to 64 bits */ 638 pParam->f lags|= DISUSE_DISPLACEMENT64;638 pParam->fUse |= DISUSE_DISPLACEMENT64; 639 639 pParam->uDisp.i64 = pCpu->i32SibDisp; 640 640 } … … 642 642 else 643 643 { 644 pParam->f lags|= DISUSE_BASE | regtype;644 pParam->fUse |= DISUSE_BASE | regtype; 645 645 pParam->base.reg_gen = base; 646 646 } … … 735 735 { 736 736 case OP_PARM_C: //control register 737 pParam->f lags|= DISUSE_REG_CR;737 pParam->fUse |= DISUSE_REG_CR; 738 738 739 739 if ( pCpu->pCurInstr->opcode == OP_MOV_CR … … 749 749 750 750 case OP_PARM_D: //debug register 751 pParam->f lags|= DISUSE_REG_DBG;751 pParam->fUse |= DISUSE_REG_DBG; 752 752 pParam->base.reg_dbg = reg; 753 753 return 0; … … 755 755 case OP_PARM_P: //MMX register 756 756 reg &= 7; /* REX.R has no effect here */ 757 pParam->f lags|= DISUSE_REG_MMX;757 pParam->fUse |= DISUSE_REG_MMX; 758 758 pParam->base.reg_mmx = reg; 759 759 return 0; … … 762 762 reg &= 7; /* REX.R has no effect here */ 763 763 disasmModRMSReg(pCpu, pOp, reg, pParam); 764 pParam->f lags|= DISUSE_REG_SEG;764 pParam->fUse |= DISUSE_REG_SEG; 765 765 return 0; 766 766 767 767 case OP_PARM_T: //test register 768 768 reg &= 7; /* REX.R has no effect here */ 769 pParam->f lags|= DISUSE_REG_TEST;769 pParam->fUse |= DISUSE_REG_TEST; 770 770 pParam->base.reg_test = reg; 771 771 return 0; … … 778 778 779 779 case OP_PARM_V: //XMM register 780 pParam->f lags|= DISUSE_REG_XMM;780 pParam->fUse |= DISUSE_REG_XMM; 781 781 pParam->base.reg_xmm = reg; 782 782 return 0; … … 807 807 if (pCpu->mode != DISCPUMODE_64BIT) 808 808 { 809 pParam->f lags|= DISUSE_DISPLACEMENT32;809 pParam->fUse |= DISUSE_DISPLACEMENT32; 810 810 pParam->uDisp.i32 = pCpu->i32SibDisp; 811 811 } 812 812 else 813 813 { 814 pParam->f lags|= DISUSE_RIPDISPLACEMENT32;814 pParam->fUse |= DISUSE_RIPDISPLACEMENT32; 815 815 pParam->uDisp.i32 = pCpu->i32SibDisp; 816 816 } … … 818 818 else 819 819 { //register address 820 pParam->f lags|= DISUSE_BASE;820 pParam->fUse |= DISUSE_BASE; 821 821 disasmModRMReg(pCpu, pOp, rm, pParam, 1); 822 822 } … … 829 829 else 830 830 { 831 pParam->f lags|= DISUSE_BASE;831 pParam->fUse |= DISUSE_BASE; 832 832 disasmModRMReg(pCpu, pOp, rm, pParam, 1); 833 833 } 834 834 pParam->uDisp.i8 = pCpu->i32SibDisp; 835 pParam->f lags|= DISUSE_DISPLACEMENT8;835 pParam->fUse |= DISUSE_DISPLACEMENT8; 836 836 break; 837 837 … … 842 842 else 843 843 { 844 pParam->f lags|= DISUSE_BASE;844 pParam->fUse |= DISUSE_BASE; 845 845 disasmModRMReg(pCpu, pOp, rm, pParam, 1); 846 846 } 847 847 pParam->uDisp.i32 = pCpu->i32SibDisp; 848 pParam->f lags|= DISUSE_DISPLACEMENT32;848 pParam->fUse |= DISUSE_DISPLACEMENT32; 849 849 break; 850 850 … … 862 862 {//16 bits displacement 863 863 pParam->uDisp.i16 = pCpu->i32SibDisp; 864 pParam->f lags|= DISUSE_DISPLACEMENT16;864 pParam->fUse |= DISUSE_DISPLACEMENT16; 865 865 } 866 866 else 867 867 { 868 pParam->f lags|= DISUSE_BASE;868 pParam->fUse |= DISUSE_BASE; 869 869 disasmModRMReg16(pCpu, pOp, rm, pParam); 870 870 } … … 874 874 disasmModRMReg16(pCpu, pOp, rm, pParam); 875 875 pParam->uDisp.i8 = pCpu->i32SibDisp; 876 pParam->f lags|= DISUSE_BASE | DISUSE_DISPLACEMENT8;876 pParam->fUse |= DISUSE_BASE | DISUSE_DISPLACEMENT8; 877 877 break; 878 878 … … 880 880 disasmModRMReg16(pCpu, pOp, rm, pParam); 881 881 pParam->uDisp.i16 = pCpu->i32SibDisp; 882 pParam->f lags|= DISUSE_BASE | DISUSE_DISPLACEMENT16;882 pParam->fUse |= DISUSE_BASE | DISUSE_DISPLACEMENT16; 883 883 break; 884 884 … … 1165 1165 NOREF(pOp); 1166 1166 pParam->parval = DISReadByte(pCpu, uCodePtr); 1167 pParam->f lags|= DISUSE_IMMEDIATE8;1167 pParam->fUse |= DISUSE_IMMEDIATE8; 1168 1168 pParam->cb = sizeof(uint8_t); 1169 1169 return sizeof(uint8_t); … … 1184 1184 { 1185 1185 pParam->parval = (uint32_t)(int8_t)DISReadByte(pCpu, uCodePtr); 1186 pParam->f lags|= DISUSE_IMMEDIATE32_SX8;1186 pParam->fUse |= DISUSE_IMMEDIATE32_SX8; 1187 1187 pParam->cb = sizeof(uint32_t); 1188 1188 } … … 1191 1191 { 1192 1192 pParam->parval = (uint64_t)(int8_t)DISReadByte(pCpu, uCodePtr); 1193 pParam->f lags|= DISUSE_IMMEDIATE64_SX8;1193 pParam->fUse |= DISUSE_IMMEDIATE64_SX8; 1194 1194 pParam->cb = sizeof(uint64_t); 1195 1195 } … … 1197 1197 { 1198 1198 pParam->parval = (uint16_t)(int8_t)DISReadByte(pCpu, uCodePtr); 1199 pParam->f lags|= DISUSE_IMMEDIATE16_SX8;1199 pParam->fUse |= DISUSE_IMMEDIATE16_SX8; 1200 1200 pParam->cb = sizeof(uint16_t); 1201 1201 } … … 1215 1215 NOREF(pOp); 1216 1216 pParam->parval = DISReadWord(pCpu, uCodePtr); 1217 pParam->f lags|= DISUSE_IMMEDIATE16;1217 pParam->fUse |= DISUSE_IMMEDIATE16; 1218 1218 pParam->cb = sizeof(uint16_t); 1219 1219 return sizeof(uint16_t); … … 1232 1232 NOREF(pOp); 1233 1233 pParam->parval = DISReadDWord(pCpu, uCodePtr); 1234 pParam->f lags|= DISUSE_IMMEDIATE32;1234 pParam->fUse |= DISUSE_IMMEDIATE32; 1235 1235 pParam->cb = sizeof(uint32_t); 1236 1236 return sizeof(uint32_t); … … 1249 1249 NOREF(pOp); 1250 1250 pParam->parval = DISReadQWord(pCpu, uCodePtr); 1251 pParam->f lags|= DISUSE_IMMEDIATE64;1251 pParam->fUse |= DISUSE_IMMEDIATE64; 1252 1252 pParam->cb = sizeof(uint64_t); 1253 1253 return sizeof(uint64_t); … … 1268 1268 { 1269 1269 pParam->parval = DISReadDWord(pCpu, uCodePtr); 1270 pParam->f lags|= DISUSE_IMMEDIATE32;1270 pParam->fUse |= DISUSE_IMMEDIATE32; 1271 1271 pParam->cb = sizeof(uint32_t); 1272 1272 return sizeof(uint32_t); … … 1276 1276 { 1277 1277 pParam->parval = DISReadQWord(pCpu, uCodePtr); 1278 pParam->f lags|= DISUSE_IMMEDIATE64;1278 pParam->fUse |= DISUSE_IMMEDIATE64; 1279 1279 pParam->cb = sizeof(uint64_t); 1280 1280 return sizeof(uint64_t); … … 1282 1282 1283 1283 pParam->parval = DISReadWord(pCpu, uCodePtr); 1284 pParam->f lags|= DISUSE_IMMEDIATE16;1284 pParam->fUse |= DISUSE_IMMEDIATE16; 1285 1285 pParam->cb = sizeof(uint16_t); 1286 1286 return sizeof(uint16_t); … … 1306 1306 { 1307 1307 pParam->parval = DISReadWord(pCpu, uCodePtr); 1308 pParam->f lags|= DISUSE_IMMEDIATE16;1308 pParam->fUse |= DISUSE_IMMEDIATE16; 1309 1309 pParam->cb = sizeof(uint16_t); 1310 1310 return sizeof(uint16_t); … … 1315 1315 { 1316 1316 pParam->parval = (uint64_t)(int32_t)DISReadDWord(pCpu, uCodePtr); 1317 pParam->f lags|= DISUSE_IMMEDIATE64;1317 pParam->fUse |= DISUSE_IMMEDIATE64; 1318 1318 pParam->cb = sizeof(uint64_t); 1319 1319 } … … 1321 1321 { 1322 1322 pParam->parval = DISReadDWord(pCpu, uCodePtr); 1323 pParam->f lags|= DISUSE_IMMEDIATE32;1323 pParam->fUse |= DISUSE_IMMEDIATE32; 1324 1324 pParam->cb = sizeof(uint32_t); 1325 1325 } … … 1344 1344 NOREF(pOp); 1345 1345 pParam->parval = DISReadByte(pCpu, uCodePtr); 1346 pParam->f lags|= DISUSE_IMMEDIATE8_REL;1346 pParam->fUse |= DISUSE_IMMEDIATE8_REL; 1347 1347 pParam->cb = sizeof(uint8_t); 1348 1348 return sizeof(char); … … 1365 1365 { 1366 1366 pParam->parval = DISReadDWord(pCpu, uCodePtr); 1367 pParam->f lags|= DISUSE_IMMEDIATE32_REL;1367 pParam->fUse |= DISUSE_IMMEDIATE32_REL; 1368 1368 pParam->cb = sizeof(int32_t); 1369 1369 return sizeof(int32_t); … … 1374 1374 /* 32 bits relative immediate sign extended to 64 bits. */ 1375 1375 pParam->parval = (uint64_t)(int32_t)DISReadDWord(pCpu, uCodePtr); 1376 pParam->f lags|= DISUSE_IMMEDIATE64_REL;1376 pParam->fUse |= DISUSE_IMMEDIATE64_REL; 1377 1377 pParam->cb = sizeof(int64_t); 1378 1378 return sizeof(int32_t); … … 1380 1380 1381 1381 pParam->parval = DISReadWord(pCpu, uCodePtr); 1382 pParam->f lags|= DISUSE_IMMEDIATE16_REL;1382 pParam->fUse |= DISUSE_IMMEDIATE16_REL; 1383 1383 pParam->cb = sizeof(int16_t); 1384 1384 return sizeof(int16_t); … … 1406 1406 pParam->parval = DISReadDWord(pCpu, uCodePtr); 1407 1407 *((uint32_t*)&pParam->parval+1) = DISReadWord(pCpu, uCodePtr+sizeof(uint32_t)); 1408 pParam->f lags|= DISUSE_IMMEDIATE_ADDR_16_32;1408 pParam->fUse |= DISUSE_IMMEDIATE_ADDR_16_32; 1409 1409 pParam->cb = sizeof(uint16_t) + sizeof(uint32_t); 1410 1410 return sizeof(uint32_t) + sizeof(uint16_t); … … 1418 1418 */ 1419 1419 pParam->uDisp.i32 = DISReadDWord(pCpu, uCodePtr); 1420 pParam->f lags|= DISUSE_DISPLACEMENT32;1420 pParam->fUse |= DISUSE_DISPLACEMENT32; 1421 1421 pParam->cb = sizeof(uint32_t); 1422 1422 return sizeof(uint32_t); … … 1433 1433 */ 1434 1434 pParam->uDisp.i64 = DISReadQWord(pCpu, uCodePtr); 1435 pParam->f lags|= DISUSE_DISPLACEMENT64;1435 pParam->fUse |= DISUSE_DISPLACEMENT64; 1436 1436 pParam->cb = sizeof(uint64_t); 1437 1437 return sizeof(uint64_t); … … 1441 1441 /* far 16:16 pointer */ 1442 1442 pParam->parval = DISReadDWord(pCpu, uCodePtr); 1443 pParam->f lags|= DISUSE_IMMEDIATE_ADDR_16_16;1443 pParam->fUse |= DISUSE_IMMEDIATE_ADDR_16_16; 1444 1444 pParam->cb = 2*sizeof(uint16_t); 1445 1445 return sizeof(uint32_t); … … 1453 1453 */ 1454 1454 pParam->uDisp.i16 = DISReadWord(pCpu, uCodePtr); 1455 pParam->f lags|= DISUSE_DISPLACEMENT16;1455 pParam->fUse |= DISUSE_DISPLACEMENT16; 1456 1456 pParam->cb = sizeof(uint16_t); 1457 1457 return sizeof(uint16_t); … … 1502 1502 pParam->parval = DISReadDWord(pCpu, uCodePtr); 1503 1503 *((uint32_t*)&pParam->parval+1) = DISReadWord(pCpu, uCodePtr+sizeof(uint32_t)); 1504 pParam->f lags|= DISUSE_IMMEDIATE_ADDR_16_32;1504 pParam->fUse |= DISUSE_IMMEDIATE_ADDR_16_32; 1505 1505 pParam->cb = sizeof(uint16_t) + sizeof(uint32_t); 1506 1506 return sizeof(uint32_t) + sizeof(uint16_t); … … 1509 1509 // far 16:16 pointer 1510 1510 pParam->parval = DISReadDWord(pCpu, uCodePtr); 1511 pParam->f lags|= DISUSE_IMMEDIATE_ADDR_16_16;1511 pParam->fUse |= DISUSE_IMMEDIATE_ADDR_16_16; 1512 1512 pParam->cb = 2*sizeof(uint16_t); 1513 1513 return sizeof(uint32_t); … … 1560 1560 /* Use 32-bit registers. */ 1561 1561 pParam->base.reg_gen = pParam->param - OP_PARM_REG_GEN32_START; 1562 pParam->f lags|= DISUSE_REG_GEN32;1562 pParam->fUse |= DISUSE_REG_GEN32; 1563 1563 pParam->cb = 4; 1564 1564 } … … 1574 1574 pParam->base.reg_gen += 8; 1575 1575 1576 pParam->f lags|= DISUSE_REG_GEN64;1576 pParam->fUse |= DISUSE_REG_GEN64; 1577 1577 pParam->cb = 8; 1578 1578 } … … 1581 1581 /* Use 16-bit registers. */ 1582 1582 pParam->base.reg_gen = pParam->param - OP_PARM_REG_GEN32_START; 1583 pParam->f lags|= DISUSE_REG_GEN16;1583 pParam->fUse |= DISUSE_REG_GEN16; 1584 1584 pParam->cb = 2; 1585 1585 pParam->param = pParam->param - OP_PARM_REG_GEN32_START + OP_PARM_REG_GEN16_START; … … 1591 1591 /* Segment ES..GS registers. */ 1592 1592 pParam->base.reg_seg = (DIS_SELREG)(pParam->param - OP_PARM_REG_SEG_START); 1593 pParam->f lags|= DISUSE_REG_SEG;1593 pParam->fUse |= DISUSE_REG_SEG; 1594 1594 pParam->cb = 2; 1595 1595 } … … 1599 1599 /* 16-bit AX..DI registers. */ 1600 1600 pParam->base.reg_gen = pParam->param - OP_PARM_REG_GEN16_START; 1601 pParam->f lags|= DISUSE_REG_GEN16;1601 pParam->fUse |= DISUSE_REG_GEN16; 1602 1602 pParam->cb = 2; 1603 1603 } … … 1607 1607 /* 8-bit AL..DL, AH..DH registers. */ 1608 1608 pParam->base.reg_gen = pParam->param - OP_PARM_REG_GEN8_START; 1609 pParam->f lags|= DISUSE_REG_GEN8;1609 pParam->fUse |= DISUSE_REG_GEN8; 1610 1610 pParam->cb = 1; 1611 1611 … … 1624 1624 /* FPU registers. */ 1625 1625 pParam->base.reg_fp = pParam->param - OP_PARM_REG_FP_START; 1626 pParam->f lags|= DISUSE_REG_FP;1626 pParam->fUse |= DISUSE_REG_FP; 1627 1627 pParam->cb = 10; 1628 1628 } … … 1639 1639 NOREF(uCodePtr); 1640 1640 1641 pParam->f lags|= DISUSE_POINTER_DS_BASED;1641 pParam->fUse |= DISUSE_POINTER_DS_BASED; 1642 1642 if (pCpu->addrmode == DISCPUMODE_32BIT) 1643 1643 { 1644 1644 pParam->base.reg_gen = USE_REG_ESI; 1645 pParam->f lags|= DISUSE_REG_GEN32;1645 pParam->fUse |= DISUSE_REG_GEN32; 1646 1646 } 1647 1647 else … … 1649 1649 { 1650 1650 pParam->base.reg_gen = USE_REG_RSI; 1651 pParam->f lags|= DISUSE_REG_GEN64;1651 pParam->fUse |= DISUSE_REG_GEN64; 1652 1652 } 1653 1653 else 1654 1654 { 1655 1655 pParam->base.reg_gen = USE_REG_SI; 1656 pParam->f lags|= DISUSE_REG_GEN16;1656 pParam->fUse |= DISUSE_REG_GEN16; 1657 1657 } 1658 1658 return 0; //no additional opcode bytes … … 1664 1664 NOREF(uCodePtr); NOREF(pOp); 1665 1665 1666 pParam->f lags|= DISUSE_POINTER_DS_BASED;1666 pParam->fUse |= DISUSE_POINTER_DS_BASED; 1667 1667 if (pCpu->addrmode == DISCPUMODE_32BIT) 1668 1668 { 1669 1669 pParam->base.reg_gen = USE_REG_ESI; 1670 pParam->f lags|= DISUSE_REG_GEN32;1670 pParam->fUse |= DISUSE_REG_GEN32; 1671 1671 } 1672 1672 else … … 1674 1674 { 1675 1675 pParam->base.reg_gen = USE_REG_RSI; 1676 pParam->f lags|= DISUSE_REG_GEN64;1676 pParam->fUse |= DISUSE_REG_GEN64; 1677 1677 } 1678 1678 else 1679 1679 { 1680 1680 pParam->base.reg_gen = USE_REG_SI; 1681 pParam->f lags|= DISUSE_REG_GEN16;1681 pParam->fUse |= DISUSE_REG_GEN16; 1682 1682 } 1683 1683 return 0; //no additional opcode bytes … … 1689 1689 NOREF(uCodePtr); 1690 1690 1691 pParam->f lags|= DISUSE_POINTER_ES_BASED;1691 pParam->fUse |= DISUSE_POINTER_ES_BASED; 1692 1692 if (pCpu->addrmode == DISCPUMODE_32BIT) 1693 1693 { 1694 1694 pParam->base.reg_gen = USE_REG_EDI; 1695 pParam->f lags|= DISUSE_REG_GEN32;1695 pParam->fUse |= DISUSE_REG_GEN32; 1696 1696 } 1697 1697 else … … 1699 1699 { 1700 1700 pParam->base.reg_gen = USE_REG_RDI; 1701 pParam->f lags|= DISUSE_REG_GEN64;1701 pParam->fUse |= DISUSE_REG_GEN64; 1702 1702 } 1703 1703 else 1704 1704 { 1705 1705 pParam->base.reg_gen = USE_REG_DI; 1706 pParam->f lags|= DISUSE_REG_GEN16;1706 pParam->fUse |= DISUSE_REG_GEN16; 1707 1707 } 1708 1708 return 0; //no additional opcode bytes … … 1714 1714 NOREF(uCodePtr); NOREF(pOp); 1715 1715 1716 pParam->f lags|= DISUSE_POINTER_ES_BASED;1716 pParam->fUse |= DISUSE_POINTER_ES_BASED; 1717 1717 if (pCpu->addrmode == DISCPUMODE_32BIT) 1718 1718 { 1719 1719 pParam->base.reg_gen = USE_REG_EDI; 1720 pParam->f lags|= DISUSE_REG_GEN32;1720 pParam->fUse |= DISUSE_REG_GEN32; 1721 1721 } 1722 1722 else … … 1724 1724 { 1725 1725 pParam->base.reg_gen = USE_REG_RDI; 1726 pParam->f lags|= DISUSE_REG_GEN64;1726 pParam->fUse |= DISUSE_REG_GEN64; 1727 1727 } 1728 1728 else 1729 1729 { 1730 1730 pParam->base.reg_gen = USE_REG_DI; 1731 pParam->f lags|= DISUSE_REG_GEN16;1731 pParam->fUse |= DISUSE_REG_GEN16; 1732 1732 } 1733 1733 return 0; //no additional opcode bytes … … 2341 2341 } 2342 2342 2343 pParam->f lags|= DISUSE_REG_GEN8;2343 pParam->fUse |= DISUSE_REG_GEN8; 2344 2344 pParam->base.reg_gen = idx; 2345 2345 break; … … 2348 2348 Assert(idx < (pCpu->prefix & DISPREFIX_REX) ? 16 : 8); 2349 2349 2350 pParam->f lags|= DISUSE_REG_GEN16;2350 pParam->fUse |= DISUSE_REG_GEN16; 2351 2351 pParam->base.reg_gen = idx; 2352 2352 break; … … 2355 2355 Assert(idx < (pCpu->prefix & DISPREFIX_REX) ? 16 : 8); 2356 2356 2357 pParam->f lags|= DISUSE_REG_GEN32;2357 pParam->fUse |= DISUSE_REG_GEN32; 2358 2358 pParam->base.reg_gen = idx; 2359 2359 break; 2360 2360 2361 2361 case OP_PARM_q: 2362 pParam->f lags|= DISUSE_REG_GEN64;2362 pParam->fUse |= DISUSE_REG_GEN64; 2363 2363 pParam->base.reg_gen = idx; 2364 2364 break; … … 2375 2375 { 2376 2376 NOREF(pCpu); NOREF(pOp); 2377 pParam->f lags|= DISUSE_REG_GEN16;2377 pParam->fUse |= DISUSE_REG_GEN16; 2378 2378 pParam->base.reg_gen = BaseModRMReg16[idx]; 2379 2379 if (idx < 4) 2380 2380 { 2381 pParam->f lags|= DISUSE_INDEX;2381 pParam->fUse |= DISUSE_INDEX; 2382 2382 pParam->index.reg_gen = IndexModRMReg16[idx]; 2383 2383 } … … 2395 2395 } 2396 2396 2397 pParam->f lags|= DISUSE_REG_SEG;2397 pParam->fUse |= DISUSE_REG_SEG; 2398 2398 pParam->base.reg_seg = (DIS_SELREG)idx; 2399 2399 } … … 2655 2655 case OP_XCHG: 2656 2656 case OP_XOR: 2657 if (pCpu->param1.flags & (DISUSE_BASE | DISUSE_INDEX | DISUSE_DISPLACEMENT64 | DISUSE_DISPLACEMENT32 | DISUSE_DISPLACEMENT16 | DISUSE_DISPLACEMENT8 | DISUSE_RIPDISPLACEMENT32)) 2657 if (pCpu->param1.fUse & (DISUSE_BASE | DISUSE_INDEX | DISUSE_DISPLACEMENT64 | DISUSE_DISPLACEMENT32 2658 | DISUSE_DISPLACEMENT16 | DISUSE_DISPLACEMENT8 | DISUSE_RIPDISPLACEMENT32)) 2658 2659 return; 2659 2660 break; -
trunk/src/VBox/Disassembler/DisasmFormatYasm.cpp
r41676 r41678 93 93 static const char *disasmFormatYasmBaseReg(PCDISCPUSTATE pCpu, PCOP_PARAMETER pParam, size_t *pcchReg) 94 94 { 95 switch (pParam->f lags& ( DISUSE_REG_GEN8 | DISUSE_REG_GEN16 | DISUSE_REG_GEN32 | DISUSE_REG_GEN6496 | DISUSE_REG_FP | DISUSE_REG_MMX | DISUSE_REG_XMM | DISUSE_REG_CR97 | DISUSE_REG_DBG | DISUSE_REG_SEG | DISUSE_REG_TEST))95 switch (pParam->fUse & ( DISUSE_REG_GEN8 | DISUSE_REG_GEN16 | DISUSE_REG_GEN32 | DISUSE_REG_GEN64 96 | DISUSE_REG_FP | DISUSE_REG_MMX | DISUSE_REG_XMM | DISUSE_REG_CR 97 | DISUSE_REG_DBG | DISUSE_REG_SEG | DISUSE_REG_TEST)) 98 98 99 99 { … … 187 187 188 188 default: 189 AssertMsgFailed(("%#x\n", pParam->f lags));189 AssertMsgFailed(("%#x\n", pParam->fUse)); 190 190 *pcchReg = 3; 191 191 return "r??"; … … 231 231 232 232 default: 233 AssertMsgFailed(("%#x %#x\n", pParam->f lags, pCpu->addrmode));233 AssertMsgFailed(("%#x %#x\n", pParam->fUse, pCpu->addrmode)); 234 234 *pcchReg = 3; 235 235 return "r??"; … … 591 591 break; \ 592 592 case OP_PARM_p: break; /* see PUT_FAR */ \ 593 case OP_PARM_s: if (pParam->f lags& DISUSE_REG_FP) PUT_SZ("tword "); break; /* ?? */ \593 case OP_PARM_s: if (pParam->fUse & DISUSE_REG_FP) PUT_SZ("tword "); break; /* ?? */ \ 594 594 case OP_PARM_z: break; \ 595 595 case OP_PARM_NONE: \ 596 596 if ( OP_PARM_VTYPE(pParam->param) == OP_PARM_M \ 597 && ((pParam->f lags& DISUSE_REG_FP) || pOp->opcode == OP_FLD)) \597 && ((pParam->fUse & DISUSE_REG_FP) || pOp->opcode == OP_FLD)) \ 598 598 PUT_SZ("tword "); \ 599 599 break; \ … … 613 613 */ 614 614 if ( (pCpu->prefix & DISPREFIX_SEG) 615 && !DISUSE_IS_EFFECTIVE_ADDR(pCpu->param1.f lags)616 && !DISUSE_IS_EFFECTIVE_ADDR(pCpu->param2.f lags)617 && !DISUSE_IS_EFFECTIVE_ADDR(pCpu->param3.f lags))615 && !DISUSE_IS_EFFECTIVE_ADDR(pCpu->param1.fUse) 616 && !DISUSE_IS_EFFECTIVE_ADDR(pCpu->param2.fUse) 617 && !DISUSE_IS_EFFECTIVE_ADDR(pCpu->param3.fUse)) 618 618 { 619 619 PUT_STR(s_szSegPrefix[pCpu->enmPrefixSeg], 2); … … 647 647 { 648 648 pszFmt += RT_C_IS_ALPHA(pszFmt[0]) ? RT_C_IS_ALPHA(pszFmt[1]) ? 2 : 1 : 0; 649 Assert(!(pParam->f lags& (DISUSE_INDEX | DISUSE_SCALE) /* No SIB here... */));650 Assert(!(pParam->f lags& (DISUSE_DISPLACEMENT8 | DISUSE_DISPLACEMENT16 | DISUSE_DISPLACEMENT32 | DISUSE_DISPLACEMENT64 | DISUSE_RIPDISPLACEMENT32)));649 Assert(!(pParam->fUse & (DISUSE_INDEX | DISUSE_SCALE) /* No SIB here... */)); 650 Assert(!(pParam->fUse & (DISUSE_DISPLACEMENT8 | DISUSE_DISPLACEMENT16 | DISUSE_DISPLACEMENT32 | DISUSE_DISPLACEMENT64 | DISUSE_RIPDISPLACEMENT32))); 651 651 652 652 size_t cchReg; … … 668 668 669 669 PUT_FAR(); 670 if (DISUSE_IS_EFFECTIVE_ADDR(pParam->f lags))670 if (DISUSE_IS_EFFECTIVE_ADDR(pParam->fUse)) 671 671 { 672 672 /* Work around mov seg,[mem16] and mov [mem16],seg as these always make a 16-bit mem … … 680 680 } 681 681 if ( (fFlags & DIS_FMT_FLAGS_STRICT) 682 && (pParam->f lags& (DISUSE_DISPLACEMENT8 | DISUSE_DISPLACEMENT16 | DISUSE_DISPLACEMENT32 | DISUSE_DISPLACEMENT64 | DISUSE_RIPDISPLACEMENT32)))682 && (pParam->fUse & (DISUSE_DISPLACEMENT8 | DISUSE_DISPLACEMENT16 | DISUSE_DISPLACEMENT32 | DISUSE_DISPLACEMENT64 | DISUSE_RIPDISPLACEMENT32))) 683 683 { 684 if ( (pParam->f lags& DISUSE_DISPLACEMENT8)684 if ( (pParam->fUse & DISUSE_DISPLACEMENT8) 685 685 && !pParam->uDisp.i8) 686 686 PUT_SZ("byte "); 687 else if ( (pParam->f lags& DISUSE_DISPLACEMENT16)687 else if ( (pParam->fUse & DISUSE_DISPLACEMENT16) 688 688 && (int8_t)pParam->uDisp.i16 == (int16_t)pParam->uDisp.i16) 689 689 PUT_SZ("word "); 690 else if ( (pParam->f lags& DISUSE_DISPLACEMENT32)690 else if ( (pParam->fUse & DISUSE_DISPLACEMENT32) 691 691 && (int16_t)pParam->uDisp.i32 == (int32_t)pParam->uDisp.i32) //?? 692 692 PUT_SZ("dword "); 693 else if ( (pParam->f lags& DISUSE_DISPLACEMENT64)693 else if ( (pParam->fUse & DISUSE_DISPLACEMENT64) 694 694 && (pCpu->SIB.Bits.Base != 5 || pCpu->ModRM.Bits.Mod != 0) 695 695 && (int32_t)pParam->uDisp.i64 == (int64_t)pParam->uDisp.i64) //?? 696 696 PUT_SZ("qword "); 697 697 } 698 if (DISUSE_IS_EFFECTIVE_ADDR(pParam->f lags))698 if (DISUSE_IS_EFFECTIVE_ADDR(pParam->fUse)) 699 699 PUT_SEGMENT_OVERRIDE(); 700 700 701 bool fBase = (pParam->f lags& DISUSE_BASE) /* When exactly is DISUSE_BASE supposed to be set? disasmModRMReg doesn't set it. */702 || ( (pParam->f lags& (DISUSE_REG_GEN8 | DISUSE_REG_GEN16 | DISUSE_REG_GEN32 | DISUSE_REG_GEN64))703 && !DISUSE_IS_EFFECTIVE_ADDR(pParam->f lags));701 bool fBase = (pParam->fUse & DISUSE_BASE) /* When exactly is DISUSE_BASE supposed to be set? disasmModRMReg doesn't set it. */ 702 || ( (pParam->fUse & (DISUSE_REG_GEN8 | DISUSE_REG_GEN16 | DISUSE_REG_GEN32 | DISUSE_REG_GEN64)) 703 && !DISUSE_IS_EFFECTIVE_ADDR(pParam->fUse)); 704 704 if (fBase) 705 705 { … … 709 709 } 710 710 711 if (pParam->f lags& DISUSE_INDEX)711 if (pParam->fUse & DISUSE_INDEX) 712 712 { 713 713 if (fBase) … … 718 718 PUT_STR(pszReg, cchReg); 719 719 720 if (pParam->f lags& DISUSE_SCALE)720 if (pParam->fUse & DISUSE_SCALE) 721 721 { 722 722 PUT_C('*'); … … 725 725 } 726 726 else 727 Assert(!(pParam->f lags& DISUSE_SCALE));728 729 if (pParam->f lags& (DISUSE_DISPLACEMENT8 | DISUSE_DISPLACEMENT16 | DISUSE_DISPLACEMENT32 | DISUSE_DISPLACEMENT64 | DISUSE_RIPDISPLACEMENT32))727 Assert(!(pParam->fUse & DISUSE_SCALE)); 728 729 if (pParam->fUse & (DISUSE_DISPLACEMENT8 | DISUSE_DISPLACEMENT16 | DISUSE_DISPLACEMENT32 | DISUSE_DISPLACEMENT64 | DISUSE_RIPDISPLACEMENT32)) 730 730 { 731 731 int64_t off2; 732 if (pParam->f lags& DISUSE_DISPLACEMENT8)732 if (pParam->fUse & DISUSE_DISPLACEMENT8) 733 733 off2 = pParam->uDisp.i8; 734 else if (pParam->f lags& DISUSE_DISPLACEMENT16)734 else if (pParam->fUse & DISUSE_DISPLACEMENT16) 735 735 off2 = pParam->uDisp.i16; 736 else if (pParam->f lags& (DISUSE_DISPLACEMENT32 | DISUSE_RIPDISPLACEMENT32))736 else if (pParam->fUse & (DISUSE_DISPLACEMENT32 | DISUSE_RIPDISPLACEMENT32)) 737 737 off2 = pParam->uDisp.i32; 738 else if (pParam->f lags& DISUSE_DISPLACEMENT64)738 else if (pParam->fUse & DISUSE_DISPLACEMENT64) 739 739 off2 = pParam->uDisp.i64; 740 740 else … … 744 744 } 745 745 746 if (fBase || (pParam->f lags& DISUSE_INDEX))746 if (fBase || (pParam->fUse & DISUSE_INDEX)) 747 747 { 748 748 PUT_C(off2 >= 0 ? '+' : '-'); … … 750 750 off2 = -off2; 751 751 } 752 if (pParam->f lags& DISUSE_DISPLACEMENT8)752 if (pParam->fUse & DISUSE_DISPLACEMENT8) 753 753 PUT_NUM_8( off2); 754 else if (pParam->f lags& DISUSE_DISPLACEMENT16)754 else if (pParam->fUse & DISUSE_DISPLACEMENT16) 755 755 PUT_NUM_16(off2); 756 else if (pParam->f lags& DISUSE_DISPLACEMENT32)756 else if (pParam->fUse & DISUSE_DISPLACEMENT32) 757 757 PUT_NUM_32(off2); 758 else if (pParam->f lags& DISUSE_DISPLACEMENT64)758 else if (pParam->fUse & DISUSE_DISPLACEMENT64) 759 759 PUT_NUM_64(off2); 760 760 else … … 765 765 } 766 766 767 if (DISUSE_IS_EFFECTIVE_ADDR(pParam->f lags))767 if (DISUSE_IS_EFFECTIVE_ADDR(pParam->fUse)) 768 768 PUT_C(']'); 769 769 break; … … 776 776 case 'I': /* Immediate data (ParseImmByte, ParseImmByteSX, ParseImmV, ParseImmUshort, ParseImmZ). */ 777 777 Assert(*pszFmt == 'b' || *pszFmt == 'v' || *pszFmt == 'w' || *pszFmt == 'z'); pszFmt++; 778 switch (pParam->f lags& ( DISUSE_IMMEDIATE8 | DISUSE_IMMEDIATE16 | DISUSE_IMMEDIATE32 | DISUSE_IMMEDIATE64779 | DISUSE_IMMEDIATE16_SX8 | DISUSE_IMMEDIATE32_SX8 | DISUSE_IMMEDIATE64_SX8))778 switch (pParam->fUse & ( DISUSE_IMMEDIATE8 | DISUSE_IMMEDIATE16 | DISUSE_IMMEDIATE32 | DISUSE_IMMEDIATE64 779 | DISUSE_IMMEDIATE16_SX8 | DISUSE_IMMEDIATE32_SX8 | DISUSE_IMMEDIATE64_SX8)) 780 780 { 781 781 case DISUSE_IMMEDIATE8: … … 862 862 fFlags &= ~DIS_FMT_FLAGS_RELATIVE_BRANCH; 863 863 864 if (pParam->f lags& DISUSE_IMMEDIATE8_REL)864 if (pParam->fUse & DISUSE_IMMEDIATE8_REL) 865 865 { 866 866 if (fPrefix) … … 872 872 PUT_NUM_S8(offDisplacement); 873 873 } 874 else if (pParam->f lags& DISUSE_IMMEDIATE16_REL)874 else if (pParam->fUse & DISUSE_IMMEDIATE16_REL) 875 875 { 876 876 if (fPrefix) … … 887 887 PUT_SZ("near "); 888 888 offDisplacement = (int32_t)pParam->parval; 889 Assert(pParam->f lags& (DISUSE_IMMEDIATE32_REL|DISUSE_IMMEDIATE64_REL));889 Assert(pParam->fUse & (DISUSE_IMMEDIATE32_REL|DISUSE_IMMEDIATE64_REL)); 890 890 Assert(*pszFmt == 'v'); pszFmt++; 891 891 … … 938 938 PUT_SEGMENT_OVERRIDE(); 939 939 int rc = VERR_SYMBOL_NOT_FOUND; 940 switch (pParam->f lags& (DISUSE_IMMEDIATE_ADDR_16_16 | DISUSE_IMMEDIATE_ADDR_16_32 | DISUSE_DISPLACEMENT64 | DISUSE_DISPLACEMENT32 | DISUSE_DISPLACEMENT16))940 switch (pParam->fUse & (DISUSE_IMMEDIATE_ADDR_16_16 | DISUSE_IMMEDIATE_ADDR_16_32 | DISUSE_DISPLACEMENT64 | DISUSE_DISPLACEMENT32 | DISUSE_DISPLACEMENT16)) 941 941 { 942 942 case DISUSE_IMMEDIATE_ADDR_16_16: … … 1002 1002 PUT_SEGMENT_OVERRIDE(); 1003 1003 int rc = VERR_SYMBOL_NOT_FOUND; 1004 switch (pParam->f lags& (DISUSE_IMMEDIATE_ADDR_16_16 | DISUSE_IMMEDIATE_ADDR_16_32 | DISUSE_DISPLACEMENT64 | DISUSE_DISPLACEMENT32 | DISUSE_DISPLACEMENT16))1004 switch (pParam->fUse & (DISUSE_IMMEDIATE_ADDR_16_16 | DISUSE_IMMEDIATE_ADDR_16_32 | DISUSE_DISPLACEMENT64 | DISUSE_DISPLACEMENT32 | DISUSE_DISPLACEMENT16)) 1005 1005 { 1006 1006 case DISUSE_IMMEDIATE_ADDR_16_16: … … 1066 1066 PUT_SIZE_OVERRIDE(); 1067 1067 PUT_C('['); 1068 if (pParam->f lags& DISUSE_POINTER_DS_BASED)1068 if (pParam->fUse & DISUSE_POINTER_DS_BASED) 1069 1069 PUT_SZ("ds:"); 1070 1070 else … … 1281 1281 /* no effective address which it may apply to. */ 1282 1282 Assert((pCpu->prefix & DISPREFIX_SEG) || pCpu->mode == DISCPUMODE_64BIT); 1283 if ( !DISUSE_IS_EFFECTIVE_ADDR(pCpu->param1.f lags)1284 && !DISUSE_IS_EFFECTIVE_ADDR(pCpu->param2.f lags)1285 && !DISUSE_IS_EFFECTIVE_ADDR(pCpu->param3.f lags))1283 if ( !DISUSE_IS_EFFECTIVE_ADDR(pCpu->param1.fUse) 1284 && !DISUSE_IS_EFFECTIVE_ADDR(pCpu->param2.fUse) 1285 && !DISUSE_IS_EFFECTIVE_ADDR(pCpu->param3.fUse)) 1286 1286 return true; 1287 1287 } -
trunk/src/VBox/Disassembler/DisasmReg.cpp
r41676 r41678 268 268 { 269 269 /* Guess segment register by parameter type. */ 270 if (pParam->f lags& (DISUSE_REG_GEN32|DISUSE_REG_GEN64|DISUSE_REG_GEN16))270 if (pParam->fUse & (DISUSE_REG_GEN32|DISUSE_REG_GEN64|DISUSE_REG_GEN16)) 271 271 { 272 272 AssertCompile(USE_REG_ESP == USE_REG_RSP); … … 509 509 memset(pParamVal, 0, sizeof(*pParamVal)); 510 510 511 if (DISUSE_IS_EFFECTIVE_ADDR(pParam->f lags))511 if (DISUSE_IS_EFFECTIVE_ADDR(pParam->fUse)) 512 512 { 513 513 // Effective address … … 515 515 pParamVal->size = pParam->cb; 516 516 517 if (pParam->f lags& DISUSE_BASE)518 { 519 if (pParam->f lags& DISUSE_REG_GEN8)517 if (pParam->fUse & DISUSE_BASE) 518 { 519 if (pParam->fUse & DISUSE_REG_GEN8) 520 520 { 521 521 pParamVal->flags |= PARAM_VAL8; … … 523 523 } 524 524 else 525 if (pParam->f lags& DISUSE_REG_GEN16)525 if (pParam->fUse & DISUSE_REG_GEN16) 526 526 { 527 527 pParamVal->flags |= PARAM_VAL16; … … 529 529 } 530 530 else 531 if (pParam->f lags& DISUSE_REG_GEN32)531 if (pParam->fUse & DISUSE_REG_GEN32) 532 532 { 533 533 pParamVal->flags |= PARAM_VAL32; … … 535 535 } 536 536 else 537 if (pParam->f lags& DISUSE_REG_GEN64)537 if (pParam->fUse & DISUSE_REG_GEN64) 538 538 { 539 539 pParamVal->flags |= PARAM_VAL64; … … 547 547 } 548 548 // Note that scale implies index (SIB byte) 549 if (pParam->f lags& DISUSE_INDEX)550 { 551 if (pParam->f lags& DISUSE_REG_GEN16)549 if (pParam->fUse & DISUSE_INDEX) 550 { 551 if (pParam->fUse & DISUSE_REG_GEN16) 552 552 { 553 553 uint16_t val16; … … 556 556 if (RT_FAILURE(DISFetchReg16(pCtx, pParam->index.reg_gen, &val16))) return VERR_INVALID_PARAMETER; 557 557 558 Assert(!(pParam->f lags& DISUSE_SCALE)); /* shouldn't be possible in 16 bits mode */558 Assert(!(pParam->fUse & DISUSE_SCALE)); /* shouldn't be possible in 16 bits mode */ 559 559 560 560 pParamVal->val.val16 += val16; 561 561 } 562 562 else 563 if (pParam->f lags& DISUSE_REG_GEN32)563 if (pParam->fUse & DISUSE_REG_GEN32) 564 564 { 565 565 uint32_t val32; … … 568 568 if (RT_FAILURE(DISFetchReg32(pCtx, pParam->index.reg_gen, &val32))) return VERR_INVALID_PARAMETER; 569 569 570 if (pParam->f lags& DISUSE_SCALE)570 if (pParam->fUse & DISUSE_SCALE) 571 571 val32 *= pParam->scale; 572 572 … … 574 574 } 575 575 else 576 if (pParam->f lags& DISUSE_REG_GEN64)576 if (pParam->fUse & DISUSE_REG_GEN64) 577 577 { 578 578 uint64_t val64; … … 581 581 if (RT_FAILURE(DISFetchReg64(pCtx, pParam->index.reg_gen, &val64))) return VERR_INVALID_PARAMETER; 582 582 583 if (pParam->f lags& DISUSE_SCALE)583 if (pParam->fUse & DISUSE_SCALE) 584 584 val64 *= pParam->scale; 585 585 … … 590 590 } 591 591 592 if (pParam->f lags& DISUSE_DISPLACEMENT8)592 if (pParam->fUse & DISUSE_DISPLACEMENT8) 593 593 { 594 594 if (pCpu->mode == DISCPUMODE_32BIT) … … 601 601 } 602 602 else 603 if (pParam->f lags& DISUSE_DISPLACEMENT16)603 if (pParam->fUse & DISUSE_DISPLACEMENT16) 604 604 { 605 605 if (pCpu->mode == DISCPUMODE_32BIT) … … 612 612 } 613 613 else 614 if (pParam->f lags& DISUSE_DISPLACEMENT32)614 if (pParam->fUse & DISUSE_DISPLACEMENT32) 615 615 { 616 616 if (pCpu->mode == DISCPUMODE_32BIT) … … 620 620 } 621 621 else 622 if (pParam->f lags& DISUSE_DISPLACEMENT64)622 if (pParam->fUse & DISUSE_DISPLACEMENT64) 623 623 { 624 624 Assert(pCpu->mode == DISCPUMODE_64BIT); … … 626 626 } 627 627 else 628 if (pParam->f lags& DISUSE_RIPDISPLACEMENT32)628 if (pParam->fUse & DISUSE_RIPDISPLACEMENT32) 629 629 { 630 630 Assert(pCpu->mode == DISCPUMODE_64BIT); … … 635 635 } 636 636 637 if (pParam->f lags& (DISUSE_REG_GEN8|DISUSE_REG_GEN16|DISUSE_REG_GEN32|DISUSE_REG_GEN64|DISUSE_REG_FP|DISUSE_REG_MMX|DISUSE_REG_XMM|DISUSE_REG_CR|DISUSE_REG_DBG|DISUSE_REG_SEG|DISUSE_REG_TEST))637 if (pParam->fUse & (DISUSE_REG_GEN8|DISUSE_REG_GEN16|DISUSE_REG_GEN32|DISUSE_REG_GEN64|DISUSE_REG_FP|DISUSE_REG_MMX|DISUSE_REG_XMM|DISUSE_REG_CR|DISUSE_REG_DBG|DISUSE_REG_SEG|DISUSE_REG_TEST)) 638 638 { 639 639 if (parmtype == PARAM_DEST) … … 648 648 pParamVal->type = PARMTYPE_IMMEDIATE; 649 649 650 if (pParam->f lags& DISUSE_REG_GEN8)650 if (pParam->fUse & DISUSE_REG_GEN8) 651 651 { 652 652 pParamVal->flags |= PARAM_VAL8; … … 655 655 } 656 656 else 657 if (pParam->f lags& DISUSE_REG_GEN16)657 if (pParam->fUse & DISUSE_REG_GEN16) 658 658 { 659 659 pParamVal->flags |= PARAM_VAL16; … … 662 662 } 663 663 else 664 if (pParam->f lags& DISUSE_REG_GEN32)664 if (pParam->fUse & DISUSE_REG_GEN32) 665 665 { 666 666 pParamVal->flags |= PARAM_VAL32; … … 669 669 } 670 670 else 671 if (pParam->f lags& DISUSE_REG_GEN64)671 if (pParam->fUse & DISUSE_REG_GEN64) 672 672 { 673 673 pParamVal->flags |= PARAM_VAL64; … … 680 680 pParamVal->type = PARMTYPE_REGISTER; 681 681 } 682 Assert(!(pParam->f lags& DISUSE_IMMEDIATE));682 Assert(!(pParam->fUse & DISUSE_IMMEDIATE)); 683 683 return VINF_SUCCESS; 684 684 } 685 685 686 if (pParam->f lags& DISUSE_IMMEDIATE)686 if (pParam->fUse & DISUSE_IMMEDIATE) 687 687 { 688 688 pParamVal->type = PARMTYPE_IMMEDIATE; 689 if (pParam->f lags& (DISUSE_IMMEDIATE8|DISUSE_IMMEDIATE8_REL))689 if (pParam->fUse & (DISUSE_IMMEDIATE8|DISUSE_IMMEDIATE8_REL)) 690 690 { 691 691 pParamVal->flags |= PARAM_VAL8; … … 702 702 } 703 703 else 704 if (pParam->f lags& (DISUSE_IMMEDIATE16|DISUSE_IMMEDIATE16_REL|DISUSE_IMMEDIATE_ADDR_0_16|DISUSE_IMMEDIATE16_SX8))704 if (pParam->fUse & (DISUSE_IMMEDIATE16|DISUSE_IMMEDIATE16_REL|DISUSE_IMMEDIATE_ADDR_0_16|DISUSE_IMMEDIATE16_SX8)) 705 705 { 706 706 pParamVal->flags |= PARAM_VAL16; 707 707 pParamVal->size = sizeof(uint16_t); 708 708 pParamVal->val.val16 = (uint16_t)pParam->parval; 709 AssertMsg(pParamVal->size == pParam->cb || ((pParam->cb == 1) && (pParam->f lags& DISUSE_IMMEDIATE16_SX8)), ("pParamVal->size %d vs %d EIP=%RX32\n", pParamVal->size, pParam->cb, pCtx->eip) );710 } 711 else 712 if (pParam->f lags& (DISUSE_IMMEDIATE32|DISUSE_IMMEDIATE32_REL|DISUSE_IMMEDIATE_ADDR_0_32|DISUSE_IMMEDIATE32_SX8))709 AssertMsg(pParamVal->size == pParam->cb || ((pParam->cb == 1) && (pParam->fUse & DISUSE_IMMEDIATE16_SX8)), ("pParamVal->size %d vs %d EIP=%RX32\n", pParamVal->size, pParam->cb, pCtx->eip) ); 710 } 711 else 712 if (pParam->fUse & (DISUSE_IMMEDIATE32|DISUSE_IMMEDIATE32_REL|DISUSE_IMMEDIATE_ADDR_0_32|DISUSE_IMMEDIATE32_SX8)) 713 713 { 714 714 pParamVal->flags |= PARAM_VAL32; 715 715 pParamVal->size = sizeof(uint32_t); 716 716 pParamVal->val.val32 = (uint32_t)pParam->parval; 717 Assert(pParamVal->size == pParam->cb || ((pParam->cb == 1) && (pParam->f lags& DISUSE_IMMEDIATE32_SX8)) );718 } 719 else 720 if (pParam->f lags& (DISUSE_IMMEDIATE64 | DISUSE_IMMEDIATE64_REL | DISUSE_IMMEDIATE64_SX8))717 Assert(pParamVal->size == pParam->cb || ((pParam->cb == 1) && (pParam->fUse & DISUSE_IMMEDIATE32_SX8)) ); 718 } 719 else 720 if (pParam->fUse & (DISUSE_IMMEDIATE64 | DISUSE_IMMEDIATE64_REL | DISUSE_IMMEDIATE64_SX8)) 721 721 { 722 722 pParamVal->flags |= PARAM_VAL64; 723 723 pParamVal->size = sizeof(uint64_t); 724 724 pParamVal->val.val64 = pParam->parval; 725 Assert(pParamVal->size == pParam->cb || ((pParam->cb == 1) && (pParam->f lags& DISUSE_IMMEDIATE64_SX8)) );726 } 727 else 728 if (pParam->f lags& (DISUSE_IMMEDIATE_ADDR_16_16))725 Assert(pParamVal->size == pParam->cb || ((pParam->cb == 1) && (pParam->fUse & DISUSE_IMMEDIATE64_SX8)) ); 726 } 727 else 728 if (pParam->fUse & (DISUSE_IMMEDIATE_ADDR_16_16)) 729 729 { 730 730 pParamVal->flags |= PARAM_VALFARPTR16; … … 735 735 } 736 736 else 737 if (pParam->f lags& (DISUSE_IMMEDIATE_ADDR_16_32))737 if (pParam->fUse & (DISUSE_IMMEDIATE_ADDR_16_32)) 738 738 { 739 739 pParamVal->flags |= PARAM_VALFARPTR32; … … 767 767 { 768 768 NOREF(pCpu); 769 if (pParam->f lags& (DISUSE_REG_GEN8|DISUSE_REG_GEN16|DISUSE_REG_GEN32|DISUSE_REG_FP|DISUSE_REG_MMX|DISUSE_REG_XMM|DISUSE_REG_CR|DISUSE_REG_DBG|DISUSE_REG_SEG|DISUSE_REG_TEST))769 if (pParam->fUse & (DISUSE_REG_GEN8|DISUSE_REG_GEN16|DISUSE_REG_GEN32|DISUSE_REG_FP|DISUSE_REG_MMX|DISUSE_REG_XMM|DISUSE_REG_CR|DISUSE_REG_DBG|DISUSE_REG_SEG|DISUSE_REG_TEST)) 770 770 { 771 if (pParam->f lags& DISUSE_REG_GEN8)771 if (pParam->fUse & DISUSE_REG_GEN8) 772 772 { 773 773 uint8_t *pu8Reg; … … 780 780 } 781 781 else 782 if (pParam->f lags& DISUSE_REG_GEN16)782 if (pParam->fUse & DISUSE_REG_GEN16) 783 783 { 784 784 uint16_t *pu16Reg; … … 791 791 } 792 792 else 793 if (pParam->f lags& DISUSE_REG_GEN32)793 if (pParam->fUse & DISUSE_REG_GEN32) 794 794 { 795 795 uint32_t *pu32Reg; … … 802 802 } 803 803 else 804 if (pParam->f lags& DISUSE_REG_GEN64)804 if (pParam->fUse & DISUSE_REG_GEN64) 805 805 { 806 806 uint64_t *pu64Reg; -
trunk/src/VBox/VMM/VMMAll/EMAll.cpp
r41676 r41678 1049 1049 /* pop [esp+xx] uses esp after the actual pop! */ 1050 1050 AssertCompile(USE_REG_ESP == USE_REG_SP); 1051 if ( (pDis->param1.f lags& DISUSE_BASE)1052 && (pDis->param1.f lags& (DISUSE_REG_GEN16|DISUSE_REG_GEN32))1051 if ( (pDis->param1.fUse & DISUSE_BASE) 1052 && (pDis->param1.fUse & (DISUSE_REG_GEN16|DISUSE_REG_GEN32)) 1053 1053 && pDis->param1.base.reg_gen == USE_REG_ESP 1054 1054 ) … … 1536 1536 { 1537 1537 case PARMTYPE_IMMEDIATE: 1538 if(!(param1.flags & (PARAM_VAL32|PARAM_VAL64)))1538 if(!(param1.flags & (PARAM_VAL32|PARAM_VAL64))) 1539 1539 return VERR_EM_INTERPRETER; 1540 1540 /* fallthru */ … … 2062 2062 case PARMTYPE_IMMEDIATE: 2063 2063 case PARMTYPE_ADDRESS: 2064 if(!(param1.flags & (PARAM_VAL32|PARAM_VAL64)))2064 if(!(param1.flags & (PARAM_VAL32|PARAM_VAL64))) 2065 2065 return VERR_EM_INTERPRETER; 2066 2066 addr = (RTGCPTR)param1.val.val64; … … 2397 2397 case PARMTYPE_IMMEDIATE: 2398 2398 case PARMTYPE_ADDRESS: 2399 if(!(param1.flags & PARAM_VAL16))2399 if(!(param1.flags & PARAM_VAL16)) 2400 2400 return VERR_EM_INTERPRETER; 2401 2401 val = param1.val.val32; … … 2468 2468 { 2469 2469 NOREF(pvFault); NOREF(pcbSize); 2470 if ((pDis->param1.f lags == DISUSE_REG_GEN32 || pDis->param1.flags == DISUSE_REG_GEN64) && pDis->param2.flags== DISUSE_REG_CR)2470 if ((pDis->param1.fUse == DISUSE_REG_GEN32 || pDis->param1.fUse == DISUSE_REG_GEN64) && pDis->param2.fUse == DISUSE_REG_CR) 2471 2471 return EMInterpretCRxRead(pVM, pVCpu, pRegFrame, pDis->param1.base.reg_gen, pDis->param2.base.reg_ctrl); 2472 2472 2473 if (pDis->param1.f lags == DISUSE_REG_CR && (pDis->param2.flags == DISUSE_REG_GEN32 || pDis->param2.flags== DISUSE_REG_GEN64))2473 if (pDis->param1.fUse == DISUSE_REG_CR && (pDis->param2.fUse == DISUSE_REG_GEN32 || pDis->param2.fUse == DISUSE_REG_GEN64)) 2474 2474 return EMInterpretCRxWrite(pVM, pVCpu, pRegFrame, pDis->param1.base.reg_ctrl, pDis->param2.base.reg_gen); 2475 2475 … … 2558 2558 NOREF(pvFault); NOREF(pcbSize); 2559 2559 2560 if((pDis->param1.f lags == DISUSE_REG_GEN32 || pDis->param1.flags == DISUSE_REG_GEN64) && pDis->param2.flags== DISUSE_REG_DBG)2560 if((pDis->param1.fUse == DISUSE_REG_GEN32 || pDis->param1.fUse == DISUSE_REG_GEN64) && pDis->param2.fUse == DISUSE_REG_DBG) 2561 2561 { 2562 2562 rc = EMInterpretDRxRead(pVM, pVCpu, pRegFrame, pDis->param1.base.reg_gen, pDis->param2.base.reg_dbg); 2563 2563 } 2564 2564 else 2565 if(pDis->param1.f lags == DISUSE_REG_DBG && (pDis->param2.flags == DISUSE_REG_GEN32 || pDis->param2.flags== DISUSE_REG_GEN64))2565 if(pDis->param1.fUse == DISUSE_REG_DBG && (pDis->param2.fUse == DISUSE_REG_GEN32 || pDis->param2.fUse == DISUSE_REG_GEN64)) 2566 2566 { 2567 2567 rc = EMInterpretDRxWrite(pVM, pVCpu, pRegFrame, pDis->param1.base.reg_dbg, pDis->param2.base.reg_gen); … … 2593 2593 2594 2594 case PARMTYPE_IMMEDIATE: 2595 if(!(param1.flags & PARAM_VAL16))2595 if(!(param1.flags & PARAM_VAL16)) 2596 2596 return VERR_EM_INTERPRETER; 2597 2597 sel = (RTSEL)param1.val.val16; -
trunk/src/VBox/VMM/VMMAll/IOMAll.cpp
r41676 r41678 68 68 { 69 69 NOREF(pCpu); 70 if (pParam->f lags& (DISUSE_BASE | DISUSE_INDEX | DISUSE_SCALE | DISUSE_DISPLACEMENT8 | DISUSE_DISPLACEMENT16 | DISUSE_DISPLACEMENT32))70 if (pParam->fUse & (DISUSE_BASE | DISUSE_INDEX | DISUSE_SCALE | DISUSE_DISPLACEMENT8 | DISUSE_DISPLACEMENT16 | DISUSE_DISPLACEMENT32)) 71 71 { 72 72 *pcbSize = 0; … … 76 76 77 77 /* divide and conquer */ 78 if (pParam->f lags& (DISUSE_REG_GEN64 | DISUSE_REG_GEN32 | DISUSE_REG_GEN16 | DISUSE_REG_GEN8))79 { 80 if (pParam->f lags& DISUSE_REG_GEN32)78 if (pParam->fUse & (DISUSE_REG_GEN64 | DISUSE_REG_GEN32 | DISUSE_REG_GEN16 | DISUSE_REG_GEN8)) 79 { 80 if (pParam->fUse & DISUSE_REG_GEN32) 81 81 { 82 82 *pcbSize = 4; … … 85 85 } 86 86 87 if (pParam->f lags& DISUSE_REG_GEN16)87 if (pParam->fUse & DISUSE_REG_GEN16) 88 88 { 89 89 *pcbSize = 2; … … 92 92 } 93 93 94 if (pParam->f lags& DISUSE_REG_GEN8)94 if (pParam->fUse & DISUSE_REG_GEN8) 95 95 { 96 96 *pcbSize = 1; … … 99 99 } 100 100 101 Assert(pParam->f lags& DISUSE_REG_GEN64);101 Assert(pParam->fUse & DISUSE_REG_GEN64); 102 102 *pcbSize = 8; 103 103 DISFetchReg64(pRegFrame, pParam->base.reg_gen, pu64Data); … … 106 106 else 107 107 { 108 if (pParam->f lags& (DISUSE_IMMEDIATE64 | DISUSE_IMMEDIATE64_SX8))108 if (pParam->fUse & (DISUSE_IMMEDIATE64 | DISUSE_IMMEDIATE64_SX8)) 109 109 { 110 110 *pcbSize = 8; … … 113 113 } 114 114 115 if (pParam->f lags& (DISUSE_IMMEDIATE32 | DISUSE_IMMEDIATE32_SX8))115 if (pParam->fUse & (DISUSE_IMMEDIATE32 | DISUSE_IMMEDIATE32_SX8)) 116 116 { 117 117 *pcbSize = 4; … … 120 120 } 121 121 122 if (pParam->f lags& (DISUSE_IMMEDIATE16 | DISUSE_IMMEDIATE16_SX8))122 if (pParam->fUse & (DISUSE_IMMEDIATE16 | DISUSE_IMMEDIATE16_SX8)) 123 123 { 124 124 *pcbSize = 2; … … 127 127 } 128 128 129 if (pParam->f lags& DISUSE_IMMEDIATE8)129 if (pParam->fUse & DISUSE_IMMEDIATE8) 130 130 { 131 131 *pcbSize = 1; … … 134 134 } 135 135 136 if (pParam->f lags& DISUSE_REG_SEG)136 if (pParam->fUse & DISUSE_REG_SEG) 137 137 { 138 138 *pcbSize = 2; … … 162 162 { 163 163 NOREF(pCpu); 164 if (pParam->f lags& (DISUSE_BASE | DISUSE_INDEX | DISUSE_SCALE | DISUSE_DISPLACEMENT8 | DISUSE_DISPLACEMENT16 | DISUSE_DISPLACEMENT32 | DISUSE_DISPLACEMENT64 | DISUSE_IMMEDIATE8 | DISUSE_IMMEDIATE16 | DISUSE_IMMEDIATE32 | DISUSE_IMMEDIATE32_SX8 | DISUSE_IMMEDIATE16_SX8))164 if (pParam->fUse & (DISUSE_BASE | DISUSE_INDEX | DISUSE_SCALE | DISUSE_DISPLACEMENT8 | DISUSE_DISPLACEMENT16 | DISUSE_DISPLACEMENT32 | DISUSE_DISPLACEMENT64 | DISUSE_IMMEDIATE8 | DISUSE_IMMEDIATE16 | DISUSE_IMMEDIATE32 | DISUSE_IMMEDIATE32_SX8 | DISUSE_IMMEDIATE16_SX8)) 165 165 { 166 166 return false; 167 167 } 168 168 169 if (pParam->f lags& DISUSE_REG_GEN32)169 if (pParam->fUse & DISUSE_REG_GEN32) 170 170 { 171 171 DISWriteReg32(pRegFrame, pParam->base.reg_gen, (uint32_t)u64Data); … … 173 173 } 174 174 175 if (pParam->f lags& DISUSE_REG_GEN64)175 if (pParam->fUse & DISUSE_REG_GEN64) 176 176 { 177 177 DISWriteReg64(pRegFrame, pParam->base.reg_gen, u64Data); … … 179 179 } 180 180 181 if (pParam->f lags& DISUSE_REG_GEN16)181 if (pParam->fUse & DISUSE_REG_GEN16) 182 182 { 183 183 DISWriteReg16(pRegFrame, pParam->base.reg_gen, (uint16_t)u64Data); … … 185 185 } 186 186 187 if (pParam->f lags& DISUSE_REG_GEN8)187 if (pParam->fUse & DISUSE_REG_GEN8) 188 188 { 189 189 DISWriteReg8(pRegFrame, pParam->base.reg_gen, (uint8_t)u64Data); … … 191 191 } 192 192 193 if (pParam->f lags& DISUSE_REG_SEG)193 if (pParam->fUse & DISUSE_REG_SEG) 194 194 { 195 195 DISWriteRegSeg(pRegFrame, pParam->base.reg_seg, (RTSEL)u64Data); -
trunk/src/VBox/VMM/VMMAll/IOMAllMMIO.cpp
r41676 r41678 1535 1535 { 1536 1536 STAM_PROFILE_START(&pVM->iom.s.StatRZInstMov, b); 1537 AssertMsg(uErrorCode == UINT32_MAX || DISUSE_IS_EFFECTIVE_ADDR(pDis->param1.f lags) == !!(uErrorCode & X86_TRAP_PF_RW), ("flags1=%#llx/%RTbool flags2=%#llx/%RTbool ErrCd=%#x\n", pDis->param1.flags, DISUSE_IS_EFFECTIVE_ADDR(pDis->param1.flags), pDis->param2.flags, DISUSE_IS_EFFECTIVE_ADDR(pDis->param2.flags), uErrorCode));1537 AssertMsg(uErrorCode == UINT32_MAX || DISUSE_IS_EFFECTIVE_ADDR(pDis->param1.fUse) == !!(uErrorCode & X86_TRAP_PF_RW), ("flags1=%#llx/%RTbool flags2=%#llx/%RTbool ErrCd=%#x\n", pDis->param1.fUse, DISUSE_IS_EFFECTIVE_ADDR(pDis->param1.fUse), pDis->param2.fUse, DISUSE_IS_EFFECTIVE_ADDR(pDis->param2.fUse), uErrorCode)); 1538 1538 if (uErrorCode != UINT32_MAX /* EPT+MMIO optimization */ 1539 1539 ? uErrorCode & X86_TRAP_PF_RW 1540 : DISUSE_IS_EFFECTIVE_ADDR(pDis->param1.f lags))1540 : DISUSE_IS_EFFECTIVE_ADDR(pDis->param1.fUse)) 1541 1541 rc = iomInterpretMOVxXWrite(pVM, pCtxCore, pDis, pRange, GCPhysFault); 1542 1542 else -
trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp
r41676 r41678 761 761 #endif 762 762 763 LogFlow(("Reused instr %RGv %d at %RGv param1.f lags=%x param1.reg=%d\n", pRegFrame->rip, pDis->pCurInstr->opcode, pvFault, pDis->param1.flags, pDis->param1.base.reg_gen));763 LogFlow(("Reused instr %RGv %d at %RGv param1.fUse=%llx param1.reg=%d\n", pRegFrame->rip, pDis->pCurInstr->opcode, pvFault, pDis->param1.fUse, pDis->param1.base.reg_gen)); 764 764 765 765 /* Non-supervisor mode write means it's used for something else. */ … … 804 804 return false; 805 805 } 806 if ( ( (pDis->param1.f lags& DISUSE_REG_GEN32)807 || (pDis->param1.f lags& DISUSE_REG_GEN64))806 if ( ( (pDis->param1.fUse & DISUSE_REG_GEN32) 807 || (pDis->param1.fUse & DISUSE_REG_GEN64)) 808 808 && (pDis->param1.base.reg_gen == USE_REG_ESP)) 809 809 { -
trunk/src/VBox/VMM/VMMR3/CSAM.cpp
r41676 r41678 800 800 { 801 801 case OP_INT: 802 Assert(pCpu->param1.f lags& DISUSE_IMMEDIATE8);802 Assert(pCpu->param1.fUse & DISUSE_IMMEDIATE8); 803 803 if (pCpu->param1.parval == 3) 804 804 { … … 1097 1097 * Any register is allowed as long as source and destination are identical. 1098 1098 */ 1099 if ( cpu.param1.f lags!= DISUSE_REG_GEN321099 if ( cpu.param1.fUse != DISUSE_REG_GEN32 1100 1100 || ( cpu.param2.flags != DISUSE_REG_GEN32 1101 1101 && ( !(cpu.param2.flags & DISUSE_REG_GEN32) … … 1115 1115 { 1116 1116 if ( (pCurInstrGC & 0x3) != 0 1117 || cpu.param1.f lags!= DISUSE_REG_GEN321117 || cpu.param1.fUse != DISUSE_REG_GEN32 1118 1118 || cpu.param1.base.reg_gen32 != USE_REG_EBP 1119 1119 ) … … 1141 1141 { 1142 1142 if ( (pCurInstrGC & 0x3) != 0 1143 || cpu.param1.f lags!= DISUSE_REG_GEN321143 || cpu.param1.fUse != DISUSE_REG_GEN32 1144 1144 || cpu.param1.base.reg_gen32 != USE_REG_ESP 1145 1145 ) … … 1328 1328 // For our first attempt, we'll handle only simple relative jumps and calls (immediate offset coded in instruction) 1329 1329 if ( ((cpu.pCurInstr->optype & DISOPTYPE_CONTROLFLOW) && (OP_PARM_VTYPE(cpu.pCurInstr->param1) == OP_PARM_J)) 1330 || (cpu.pCurInstr->opcode == OP_CALL && cpu.param1.f lags== DISUSE_DISPLACEMENT32)) /* simple indirect call (call dword ptr [address]) */1330 || (cpu.pCurInstr->opcode == OP_CALL && cpu.param1.fUse == DISUSE_DISPLACEMENT32)) /* simple indirect call (call dword ptr [address]) */ 1331 1331 { 1332 1332 /* We need to parse 'call dword ptr [address]' type of calls to catch cpuid instructions in some recent Linux distributions (e.g. OpenSuse 10.3) */ 1333 1333 if ( cpu.pCurInstr->opcode == OP_CALL 1334 && cpu.param1.f lags== DISUSE_DISPLACEMENT32)1334 && cpu.param1.fUse == DISUSE_DISPLACEMENT32) 1335 1335 { 1336 1336 addr = 0; … … 1342 1342 if (addr == 0) 1343 1343 { 1344 Log(("We don't support far jumps here!! (%08X)\n", cpu.param1.f lags));1344 Log(("We don't support far jumps here!! (%08X)\n", cpu.param1.fUse)); 1345 1345 rc = VINF_SUCCESS; 1346 1346 break; … … 1399 1399 else 1400 1400 if ( cpu.pCurInstr->opcode == OP_JMP 1401 && (cpu.param1.f lags& (DISUSE_DISPLACEMENT32|DISUSE_INDEX|DISUSE_SCALE)) == (DISUSE_DISPLACEMENT32|DISUSE_INDEX|DISUSE_SCALE)1401 && (cpu.param1.fUse & (DISUSE_DISPLACEMENT32|DISUSE_INDEX|DISUSE_SCALE)) == (DISUSE_DISPLACEMENT32|DISUSE_INDEX|DISUSE_SCALE) 1402 1402 ) 1403 1403 { -
trunk/src/VBox/VMM/VMMR3/EMRaw.cpp
r41676 r41678 990 990 991 991 case OP_MOV_CR: 992 if (Cpu.param1.f lags& DISUSE_REG_GEN32)992 if (Cpu.param1.fUse & DISUSE_REG_GEN32) 993 993 { 994 994 //read 995 Assert(Cpu.param2.f lags& DISUSE_REG_CR);995 Assert(Cpu.param2.fUse & DISUSE_REG_CR); 996 996 Assert(Cpu.param2.base.reg_ctrl <= USE_REG_CR4); 997 997 STAM_COUNTER_INC(&pStats->StatMovReadCR[Cpu.param2.base.reg_ctrl]); … … 1000 1000 { 1001 1001 //write 1002 Assert(Cpu.param1.f lags& DISUSE_REG_CR);1002 Assert(Cpu.param1.fUse & DISUSE_REG_CR); 1003 1003 Assert(Cpu.param1.base.reg_ctrl <= USE_REG_CR4); 1004 1004 STAM_COUNTER_INC(&pStats->StatMovWriteCR[Cpu.param1.base.reg_ctrl]); … … 1100 1100 1101 1101 if ( Cpu.pCurInstr->opcode == OP_MOV_CR 1102 && Cpu.param1.f lags== DISUSE_REG_CR /* write */1102 && Cpu.param1.fUse == DISUSE_REG_CR /* write */ 1103 1103 ) 1104 1104 { -
trunk/src/VBox/VMM/VMMR3/HWACCM.cpp
r41676 r41678 1833 1833 pPatch->cbOp = cbOp; 1834 1834 1835 if (pDis->param1.f lags== DISUSE_DISPLACEMENT32)1835 if (pDis->param1.fUse == DISUSE_DISPLACEMENT32) 1836 1836 { 1837 1837 /* write. */ 1838 if (pDis->param2.f lags== DISUSE_REG_GEN32)1838 if (pDis->param2.fUse == DISUSE_REG_GEN32) 1839 1839 { 1840 1840 pPatch->enmType = HWACCMTPRINSTR_WRITE_REG; … … 1843 1843 else 1844 1844 { 1845 Assert(pDis->param2.f lags== DISUSE_IMMEDIATE32);1845 Assert(pDis->param2.fUse == DISUSE_IMMEDIATE32); 1846 1846 pPatch->enmType = HWACCMTPRINSTR_WRITE_IMM; 1847 1847 pPatch->uSrcOperand = pDis->param2.parval; … … 1860 1860 1861 1861 /* read */ 1862 Assert(pDis->param1.f lags== DISUSE_REG_GEN32);1862 Assert(pDis->param1.fUse == DISUSE_REG_GEN32); 1863 1863 1864 1864 /* Found: … … 1872 1872 if ( rc == VINF_SUCCESS 1873 1873 && pDis->pCurInstr->opcode == OP_SHR 1874 && pDis->param1.f lags== DISUSE_REG_GEN321874 && pDis->param1.fUse == DISUSE_REG_GEN32 1875 1875 && pDis->param1.base.reg_gen == uMmioReg 1876 && pDis->param2.f lags== DISUSE_IMMEDIATE81876 && pDis->param2.fUse == DISUSE_IMMEDIATE8 1877 1877 && pDis->param2.parval == 4 1878 1878 && oldcbOp + cbOp < sizeof(pVM->hwaccm.s.aPatches[idx].aOpcode)) … … 2008 2008 pPatch->enmType = HWACCMTPRINSTR_JUMP_REPLACEMENT; 2009 2009 2010 if (pDis->param1.f lags== DISUSE_DISPLACEMENT32)2010 if (pDis->param1.fUse == DISUSE_DISPLACEMENT32) 2011 2011 { 2012 2012 /* … … 2028 2028 * 2029 2029 */ 2030 bool fUsesEax = (pDis->param2.f lags== DISUSE_REG_GEN32 && pDis->param2.base.reg_gen == USE_REG_EAX);2030 bool fUsesEax = (pDis->param2.fUse == DISUSE_REG_GEN32 && pDis->param2.base.reg_gen == USE_REG_EAX); 2031 2031 2032 2032 aPatch[off++] = 0x51; /* push ecx */ … … 2036 2036 aPatch[off++] = 0x31; /* xor edx, edx */ 2037 2037 aPatch[off++] = 0xD2; 2038 if (pDis->param2.f lags== DISUSE_REG_GEN32)2038 if (pDis->param2.fUse == DISUSE_REG_GEN32) 2039 2039 { 2040 2040 if (!fUsesEax) … … 2046 2046 else 2047 2047 { 2048 Assert(pDis->param2.f lags== DISUSE_IMMEDIATE32);2048 Assert(pDis->param2.fUse == DISUSE_IMMEDIATE32); 2049 2049 aPatch[off++] = 0xB8; /* mov eax, immediate */ 2050 2050 *(uint32_t *)&aPatch[off] = pDis->param2.parval; … … 2079 2079 * 2080 2080 */ 2081 Assert(pDis->param1.f lags== DISUSE_REG_GEN32);2081 Assert(pDis->param1.fUse == DISUSE_REG_GEN32); 2082 2082 2083 2083 if (pDis->param1.base.reg_gen != USE_REG_ECX) -
trunk/src/VBox/VMM/VMMR3/PATM.cpp
r41676 r41678 7 7 8 8 /* 9 * Copyright (C) 2006-20 07Oracle Corporation9 * Copyright (C) 2006-2012 Oracle Corporation 10 10 * 11 11 * This file is part of VirtualBox Open Source Edition (OSE), as … … 1701 1701 if (pTargetGC == 0) 1702 1702 { 1703 Log(("We don't support far jumps here!! (%08X)\n", pCpu->param1.f lags));1703 Log(("We don't support far jumps here!! (%08X)\n", pCpu->param1.fUse)); 1704 1704 return VERR_PATCHING_REFUSED; 1705 1705 } … … 1748 1748 { 1749 1749 /* mov ss, src? */ 1750 if ( (pCpu->param1.f lags& DISUSE_REG_SEG)1750 if ( (pCpu->param1.fUse & DISUSE_REG_SEG) 1751 1751 && (pCpu->param1.base.reg_seg == DIS_SELREG_SS)) 1752 1752 { … … 1757 1757 #if 0 /* necessary for Haiku */ 1758 1758 else 1759 if ( (pCpu->param2.f lags& DISUSE_REG_SEG)1759 if ( (pCpu->param2.fUse & DISUSE_REG_SEG) 1760 1760 && (pCpu->param2.base.reg_seg == USE_REG_SS) 1761 && (pCpu->param1.f lags& (DISUSE_REG_GEN32|DISUSE_REG_GEN16))) /** @todo memory operand must in theory be handled too */1761 && (pCpu->param1.fUse & (DISUSE_REG_GEN32|DISUSE_REG_GEN16))) /** @todo memory operand must in theory be handled too */ 1762 1762 { 1763 1763 /* mov GPR, ss */ … … 2243 2243 if (pTargetGC == 0) 2244 2244 { 2245 Log(("We don't support far jumps here!! (%08X)\n", cpu.param1.f lags));2245 Log(("We don't support far jumps here!! (%08X)\n", cpu.param1.fUse)); 2246 2246 rc = VERR_PATCHING_REFUSED; 2247 2247 break; … … 2462 2462 if (addr == 0) 2463 2463 { 2464 Log(("We don't support far jumps here!! (%08X)\n", cpu.param1.f lags));2464 Log(("We don't support far jumps here!! (%08X)\n", cpu.param1.fUse)); 2465 2465 rc = VERR_PATCHING_REFUSED; 2466 2466 break; … … 3588 3588 if (pTargetGC == 0) 3589 3589 { 3590 Log(("We don't support far jumps here!! (%08X)\n", pCpu->param1.f lags));3590 Log(("We don't support far jumps here!! (%08X)\n", pCpu->param1.fUse)); 3591 3591 rc = VERR_PATCHING_REFUSED; 3592 3592 goto failure; … … 3680 3680 goto failure; 3681 3681 3682 if (pCpu->param2.f lags!= DISUSE_DISPLACEMENT32)3682 if (pCpu->param2.fUse != DISUSE_DISPLACEMENT32) 3683 3683 goto failure; 3684 3684 … … 3759 3759 if (opsize > MAX_INSTR_SIZE) 3760 3760 return VERR_PATCHING_REFUSED; 3761 if (cpu.param2.f lags!= DISUSE_DISPLACEMENT32)3761 if (cpu.param2.fUse != DISUSE_DISPLACEMENT32) 3762 3762 return VERR_PATCHING_REFUSED; 3763 3763 … … 3921 3921 case OP_JMP: 3922 3922 Assert(pPatch->flags & PATMFL_JUMP_CONFLICT); 3923 Assert(pCpu->param1.f lags& DISUSE_IMMEDIATE32_REL);3924 if (!(pCpu->param1.f lags& DISUSE_IMMEDIATE32_REL))3923 Assert(pCpu->param1.fUse & DISUSE_IMMEDIATE32_REL); 3924 if (!(pCpu->param1.fUse & DISUSE_IMMEDIATE32_REL)) 3925 3925 goto failure; 3926 3926 … … 5206 5206 && (pConflictPatch->flags & PATMFL_CODE32) 5207 5207 && (cpu.pCurInstr->opcode == OP_JMP || (cpu.pCurInstr->optype & DISOPTYPE_COND_CONTROLFLOW)) 5208 && (cpu.param1.f lags& DISUSE_IMMEDIATE32_REL))5208 && (cpu.param1.fUse & DISUSE_IMMEDIATE32_REL)) 5209 5209 { 5210 5210 /* Hint patches must be enabled first. */ -
trunk/src/VBox/VMM/VMMR3/PATMPatch.cpp
r41676 r41678 1163 1163 // mov DRx, GPR 1164 1164 pPB[0] = 0x89; //mov disp32, GPR 1165 Assert(pCpu->param1.f lags& DISUSE_REG_DBG);1166 Assert(pCpu->param2.f lags& DISUSE_REG_GEN32);1165 Assert(pCpu->param1.fUse & DISUSE_REG_DBG); 1166 Assert(pCpu->param2.fUse & DISUSE_REG_GEN32); 1167 1167 1168 1168 dbgreg = pCpu->param1.base.reg_dbg; … … 1172 1172 { 1173 1173 // mov GPR, DRx 1174 Assert(pCpu->param1.f lags& DISUSE_REG_GEN32);1175 Assert(pCpu->param2.f lags& DISUSE_REG_DBG);1174 Assert(pCpu->param1.fUse & DISUSE_REG_GEN32); 1175 Assert(pCpu->param2.fUse & DISUSE_REG_DBG); 1176 1176 1177 1177 pPB[0] = 0x8B; // mov GPR, disp32 … … 1215 1215 ctrlreg = pCpu->param1.base.reg_ctrl; 1216 1216 reg = pCpu->param2.base.reg_gen; 1217 Assert(pCpu->param1.f lags& DISUSE_REG_CR);1218 Assert(pCpu->param2.f lags& DISUSE_REG_GEN32);1217 Assert(pCpu->param1.fUse & DISUSE_REG_CR); 1218 Assert(pCpu->param2.fUse & DISUSE_REG_GEN32); 1219 1219 } 1220 1220 else 1221 1221 { 1222 1222 // mov GPR, DRx 1223 Assert(pCpu->param1.f lags& DISUSE_REG_GEN32);1224 Assert(pCpu->param2.f lags& DISUSE_REG_CR);1223 Assert(pCpu->param1.fUse & DISUSE_REG_GEN32); 1224 Assert(pCpu->param2.fUse & DISUSE_REG_CR); 1225 1225 1226 1226 pPB[0] = 0x8B; // mov GPR, disp32 … … 1324 1324 PATCHGEN_PROLOG(pVM, pPatch); 1325 1325 1326 if (pCpu->param1.f lags == DISUSE_REG_GEN32 || pCpu->param1.flags== DISUSE_REG_GEN16)1326 if (pCpu->param1.fUse == DISUSE_REG_GEN32 || pCpu->param1.fUse == DISUSE_REG_GEN16) 1327 1327 { 1328 1328 /* Register operand */ -
trunk/src/VBox/VMM/VMMRC/TRPMRCHandlers.cpp
r41676 r41678 738 738 * Little hack to make the code below not fail 739 739 */ 740 pCpu->param1.f lags= DISUSE_IMMEDIATE8;740 pCpu->param1.fUse = DISUSE_IMMEDIATE8; 741 741 pCpu->param1.parval = 3; 742 742 /* fallthru */ 743 743 case OP_INT: 744 744 { 745 Assert(pCpu->param1.f lags& DISUSE_IMMEDIATE8);745 Assert(pCpu->param1.fUse & DISUSE_IMMEDIATE8); 746 746 Assert(!(PATMIsPatchGCAddr(pVM, PC))); 747 747 if (pCpu->param1.parval == 3) … … 840 840 * Little hack to make the code below not fail 841 841 */ 842 pCpu->param1.f lags= DISUSE_IMMEDIATE8;842 pCpu->param1.fUse = DISUSE_IMMEDIATE8; 843 843 pCpu->param1.parval = 3; 844 844 /* fall thru */ 845 845 case OP_INT: 846 846 { 847 Assert(pCpu->param1.f lags& DISUSE_IMMEDIATE8);847 Assert(pCpu->param1.fUse & DISUSE_IMMEDIATE8); 848 848 rc = TRPMForwardTrap(pVCpu, pRegFrame, (uint32_t)pCpu->param1.parval, pCpu->opsize, TRPM_TRAP_NO_ERRORCODE, TRPM_SOFTWARE_INT, 0xd); 849 849 if (RT_SUCCESS(rc) && rc != VINF_EM_RAW_GUEST_TRAP) -
trunk/src/VBox/VMM/include/CSAMInternal.h
r41676 r41678 251 251 { 252 252 uint32_t disp; 253 if (pCpu->param1.f lags& DISUSE_IMMEDIATE8_REL)253 if (pCpu->param1.fUse & DISUSE_IMMEDIATE8_REL) 254 254 { 255 255 disp = (int32_t)(char)pCpu->param1.parval; 256 256 } 257 257 else 258 if (pCpu->param1.f lags& DISUSE_IMMEDIATE16_REL)258 if (pCpu->param1.fUse & DISUSE_IMMEDIATE16_REL) 259 259 { 260 260 disp = (int32_t)(uint16_t)pCpu->param1.parval; 261 261 } 262 262 else 263 if (pCpu->param1.f lags& DISUSE_IMMEDIATE32_REL)263 if (pCpu->param1.fUse & DISUSE_IMMEDIATE32_REL) 264 264 { 265 265 disp = (int32_t)pCpu->param1.parval; … … 267 267 else 268 268 { 269 Log(("We don't support far jumps here!! (%08X)\n", pCpu->param1.f lags));269 Log(("We don't support far jumps here!! (%08X)\n", pCpu->param1.fUse)); 270 270 return 0; 271 271 } -
trunk/src/VBox/VMM/include/PATMInternal.h
r41676 r41678 761 761 { 762 762 uint32_t disp; 763 if (pCpu->param1.f lags& DISUSE_IMMEDIATE8_REL)763 if (pCpu->param1.fUse & DISUSE_IMMEDIATE8_REL) 764 764 { 765 765 disp = (int32_t)(char)pCpu->param1.parval; 766 766 } 767 767 else 768 if (pCpu->param1.f lags& DISUSE_IMMEDIATE16_REL)768 if (pCpu->param1.fUse & DISUSE_IMMEDIATE16_REL) 769 769 { 770 770 disp = (int32_t)(uint16_t)pCpu->param1.parval; 771 771 } 772 772 else 773 if (pCpu->param1.f lags& DISUSE_IMMEDIATE32_REL)773 if (pCpu->param1.fUse & DISUSE_IMMEDIATE32_REL) 774 774 { 775 775 disp = (int32_t)pCpu->param1.parval; … … 777 777 else 778 778 { 779 Log(("We don't support far jumps here!! (%08X)\n", pCpu->param1.f lags));779 Log(("We don't support far jumps here!! (%08X)\n", pCpu->param1.fUse)); 780 780 return 0; 781 781 }
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