Changeset 41318 in vbox

Timestamp:

May 15, 2012 3:42:12 PM (12 years ago)

Author:

vboxsync

Message:

VMX: Minor cleanup to align with SVM, comments.

Location:

trunk/src/VBox/VMM

Files:

• VMMR0/HWVMXR0.cpp (modified) (3 diffs)
• include/HWACCMInternal.h (modified) (1 diff)

trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp

@@ -1330 +1330 @@
     Assert(pCtx);
 
-    u32TrapMask = HWACCM_VMX_TRAP_MASK;
-#ifndef DEBUG
-    if (pVM->hwaccm.s.fNestedPaging)
-        u32TrapMask &= ~RT_BIT(X86_XCPT_PF);   /* no longer need to intercept #PF. */
-#endif
+    /* Set up a mask for intercepting traps. */
+    /** @todo Do we really need to always intercept #DB? */
+    u32TrapMask  =   RT_BIT(X86_XCPT_DB)
+                   | RT_BIT(X86_XCPT_NM)
+#ifdef VBOX_ALWAYS_TRAP_PF
+                   | RT_BIT(X86_XCPT_PF)
+#endif
+#ifdef VBOX_STRICT
+                   | RT_BIT(X86_XCPT_BP)
+                   | RT_BIT(X86_XCPT_DB)
+                   | RT_BIT(X86_XCPT_DE)
+                   | RT_BIT(X86_XCPT_NM)
+                   | RT_BIT(X86_XCPT_PF)
+                   | RT_BIT(X86_XCPT_UD)
+                   | RT_BIT(X86_XCPT_NP)
+                   | RT_BIT(X86_XCPT_SS)
+                   | RT_BIT(X86_XCPT_GP)
+                   | RT_BIT(X86_XCPT_MF)
+#endif
+                   ;
+
+    /** @todo NP state won't change so maybe we should build the initial trap mask up front? */
+    /* Without nested paging, #PF must be intercepted to implement shadow paging. */
+    if (!pVM->hwaccm.s.fNestedPaging)
+        u32TrapMask |= RT_BIT(X86_XCPT_PF);
 
     /* Also catch floating point exceptions if we need to report them to the guest in a different way. */
@@ -1347 +1367 @@
 
     /* Intercept all exceptions in real mode as none of them can be injected directly (#GP otherwise). */
+    /** @todo Despite the claim to intercept everything, with NP we do not intercept #PF. Should we? */
     if (    CPUMIsGuestInRealModeEx(pCtx)
         &&  pVM->hwaccm.s.vmx.pRealModeTSS)
-        u32TrapMask |= HWACCM_VMX_TRAP_MASK_REALMODE;
+        u32TrapMask |=   RT_BIT(X86_XCPT_DE)
+                       | RT_BIT(X86_XCPT_DB)
+                       | RT_BIT(X86_XCPT_NMI)
+                       | RT_BIT(X86_XCPT_BP)
+                       | RT_BIT(X86_XCPT_OF)
+                       | RT_BIT(X86_XCPT_BR)
+                       | RT_BIT(X86_XCPT_UD)
+                       | RT_BIT(X86_XCPT_DF)
+                       | RT_BIT(X86_XCPT_CO_SEG_OVERRUN)
+                       | RT_BIT(X86_XCPT_TS)
+                       | RT_BIT(X86_XCPT_NP)
+                       | RT_BIT(X86_XCPT_SS)
+                       | RT_BIT(X86_XCPT_GP)
+                       | RT_BIT(X86_XCPT_MF)
+                       | RT_BIT(X86_XCPT_AC)
+                       | RT_BIT(X86_XCPT_MC)
+                       | RT_BIT(X86_XCPT_XF)
+                       ;
 
     int rc = VMXWriteVMCS(VMX_VMCS_CTRL_EXCEPTION_BITMAP, u32TrapMask);
@@ -3054 +3092 @@
             case X86_XCPT_PF: /* Page fault */
             {
-#ifdef DEBUG
+#ifdef VBOX_ALWAYS_TRAP_PF
                 if (pVM->hwaccm.s.fNestedPaging)
                 {   /* A genuine pagefault.

trunk/src/VBox/VMM/include/HWACCMInternal.h

@@ -111 +111 @@
 
 /** @} */
-
-/** @name Intercepted traps
- *  Traps that need to be intercepted so we can correctly dispatch them to the guest if required.
- *  Currently #NM and #PF only
- */
-#ifdef VBOX_STRICT
-#define HWACCM_VMX_TRAP_MASK                RT_BIT(X86_XCPT_BP) | RT_BIT(X86_XCPT_DB) | RT_BIT(X86_XCPT_DE) | RT_BIT(X86_XCPT_NM) | RT_BIT(X86_XCPT_PF) | RT_BIT(X86_XCPT_UD) | RT_BIT(X86_XCPT_NP) | RT_BIT(X86_XCPT_SS) | RT_BIT(X86_XCPT_GP) | RT_BIT(X86_XCPT_MF)
-#define HWACCM_SVM_TRAP_MASK                HWACCM_VMX_TRAP_MASK
-#else
-#define HWACCM_VMX_TRAP_MASK                RT_BIT(X86_XCPT_DB) | RT_BIT(X86_XCPT_NM) | RT_BIT(X86_XCPT_PF)
-#define HWACCM_SVM_TRAP_MASK                RT_BIT(X86_XCPT_NM) | RT_BIT(X86_XCPT_PF)
-#endif
-/* All exceptions have to be intercept in emulated real-mode (minus NM & PF as they are always intercepted. */
-#define HWACCM_VMX_TRAP_MASK_REALMODE       RT_BIT(X86_XCPT_DE) | RT_BIT(X86_XCPT_DB) | RT_BIT(X86_XCPT_NMI) | RT_BIT(X86_XCPT_BP) | RT_BIT(X86_XCPT_OF) | RT_BIT(X86_XCPT_BR) | RT_BIT(X86_XCPT_UD) | RT_BIT(X86_XCPT_DF) | RT_BIT(X86_XCPT_CO_SEG_OVERRUN) | RT_BIT(X86_XCPT_TS) | RT_BIT(X86_XCPT_NP) | RT_BIT(X86_XCPT_SS) | RT_BIT(X86_XCPT_GP) | RT_BIT(X86_XCPT_MF) | RT_BIT(X86_XCPT_AC) | RT_BIT(X86_XCPT_MC) | RT_BIT(X86_XCPT_XF)
-/** @} */
-
 
 /** Maximum number of page flushes we are willing to remember before considering a full TLB flush. */