Index: /trunk/src/VBox/VMM/VMMR0/CPUMR0.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMR0/CPUMR0.cpp	(revision 38867)
+++ /trunk/src/VBox/VMM/VMMR0/CPUMR0.cpp	(revision 38868)
@@ -5,5 +5,5 @@
 
 /*
- * Copyright (C) 2006-2007 Oracle Corporation
+ * Copyright (C) 2006-2011 Oracle Corporation
  *
  * This file is part of VirtualBox Open Source Edition (OSE), as
@@ -37,17 +37,44 @@
 
 
+/*******************************************************************************
+*   Structures and Typedefs                                                    *
+*******************************************************************************/
 #ifdef VBOX_WITH_VMMR0_DISABLE_LAPIC_NMI
-/** Local APIC mappings */
-typedef struct
-{
+/**
+ * Local APIC mappings.
+ */
+typedef struct CPUMHOSTLAPIC
+{
+    /** Indicates that the entry is in use and have valid data. */
     bool        fEnabled;
-    uint64_t    PhysBase;
+    /** Has APIC_REG_LVT_THMR. Not used. */
+    uint32_t    fHasThermal;
+    /** The physical address of the APIC registers. */
+    RTHCPHYS    PhysBase;
+    /** The memory object entering the physical address. */
     RTR0MEMOBJ  hMemObj;
+    /** The mapping object for hMemObj. */
     RTR0MEMOBJ  hMapObj;
+    /** The mapping address APIC registers.
+     * @remarks Different CPUs may use the same physical address to map their
+     *          APICs, so this pointer is only valid when on the CPU owning the
+     *          APIC. */
     void       *pv;
-    uint32_t    fHasThermal;
 } CPUMHOSTLAPIC;
-
+#endif
+
+
+/*******************************************************************************
+*   Global Variables                                                           *
+*******************************************************************************/
+#ifdef VBOX_WITH_VMMR0_DISABLE_LAPIC_NMI
 static CPUMHOSTLAPIC g_aLApics[RTCPUSET_MAX_CPUS];
+#endif
+
+
+/*******************************************************************************
+*   Internal Functions                                                         *
+*******************************************************************************/
+#ifdef VBOX_WITH_VMMR0_DISABLE_LAPIC_NMI
 static int  cpumR0MapLocalApics(void);
 static void cpumR0UnmapLocalApics(void);
@@ -638,6 +665,6 @@
 }
 
-
 #ifdef VBOX_WITH_VMMR0_DISABLE_LAPIC_NMI
+
 /**
  * Worker for cpumR0MapLocalApics. Check each CPU for a present Local APIC.
@@ -669,6 +696,6 @@
             uint32_t u32MaxExtIdx;
             ASMCpuId(0x80000000, &u32MaxExtIdx, &u32EBX, &u32ECX, &u32EDX);
-            if (   u32MaxExtIdx >= 0x80000008
-                && u32MaxExtIdx <  0x8000ffff)
+            if (   u32MaxExtIdx >= UINT32_C(0x80000008)
+                && u32MaxExtIdx <  UINT32_C(0x8000ffff))
             {
                 uint32_t u32PhysBits;
@@ -678,6 +705,7 @@
             }
 
-            g_aLApics[iCpu].fEnabled = true;
-            g_aLApics[iCpu].PhysBase = u64ApicBase & u64Mask;
+            uint64_t const u64PhysBase = u64ApicBase & u64Mask;
+            g_aLApics[iCpu].PhysBase   = (RTHCPHYS)u64PhysBase;
+            g_aLApics[iCpu].fEnabled   = g_aLApics[iCpu].PhysBase == u64PhysBase;
         }
     }
@@ -725,4 +753,6 @@
                      * 0x2X..0xFF reserved
                      */
+                    /** @todo r=bird: The local APIC is usually at the same address for all CPUs,
+                     *        and therefore inaccessible by the other CPUs. */
                     uint32_t ApicVersion = ApicRegRead(pvApicBase, APIC_REG_VERSION);
                     if ((APIC_REG_VERSION_GET_VER(ApicVersion) & 0xF0) == 0x10)
@@ -730,4 +760,11 @@
                         g_aLApics[iCpu].fHasThermal = APIC_REG_VERSION_GET_MAX_LVT(ApicVersion) >= 5;
                         g_aLApics[iCpu].pv          = pvApicBase;
+                        Log(("CPUM: APIC %02u at %RGp (mapped at %p) - ver %#x, lint0=%#x lint1=%#x pc=%#x thmr=%#x\n",
+                             iCpu, g_aLApics[iCpu].PhysBase, g_aLApics[iCpu].pv, ApicVersion,
+                             ApicRegRead(pvApicBase, APIC_REG_LVT_LINT0),
+                             ApicRegRead(pvApicBase, APIC_REG_LVT_LINT1),
+                             ApicRegRead(pvApicBase, APIC_REG_LVT_PC),
+                             ApicRegRead(pvApicBase, APIC_REG_LVT_THMR)
+                             ));
                         continue;
                     }
@@ -785,2 +822,3 @@
 
 #endif /* VBOX_WITH_VMMR0_DISABLE_LAPIC_NMI */
+