Index: /trunk/include/VBox/err.mac
===================================================================
--- /trunk/include/VBox/err.mac	(revision 37967)
+++ /trunk/include/VBox/err.mac	(revision 37968)
@@ -321,4 +321,6 @@
 %define VERR_VMM_HYPER_CR3_MISMATCH    (-2702)
 %define VERR_VMM_RING3_CALL_DISABLED    (-2703)
+%define VERR_VMM_R0_VERSION_MISMATCH    (-2704)
+%define VERR_VMM_RC_VERSION_MISMATCH    (-2705)
 %define VERR_PDM_NO_SUCH_LUN    (-2800)
 %define VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES    (-2801)
@@ -392,4 +394,14 @@
 %define VERR_PDM_TOO_MANY_DRIVER_INSTANCES    (-2868)
 %define VERR_PDM_TOO_MANY_USB_DEVICE_INSTANCES    (-2869)
+%define VERR_PDM_TOO_MANY_USB_DEVICE_INSTANCES    (-2869)
+%define VERR_PDM_DEVINS_VERSION_MISMATCH    (-2870)
+%define VERR_PDM_DEVHLPR3_VERSION_MISMATCH    (-2871)
+%define VERR_PDM_USBINS_VERSION_MISMATCH    (-2872)
+%define VERR_PDM_USBHLPR3_VERSION_MISMATCH    (-2873)
+%define VERR_PDM_DRVINS_VERSION_MISMATCH    (-2874)
+%define VERR_PDM_DRVHLPR3_VERSION_MISMATCH    (-2875)
+%define VERR_PDM_DEVICE_VERSION_MISMATCH    (-2876)
+%define VERR_PDM_USBDEV_VERSION_MISMATCH    (-2877)
+%define VERR_PDM_DRIVER_VERSION_MISMATCH    (-2878)
 %define VERR_HGCM_SERVICE_NOT_FOUND    (-2900)
 %define VINF_HGCM_CLIENT_REJECTED    2901
@@ -458,4 +470,5 @@
 %define VERR_VUSB_DEVICE_IS_RESETTING    (-3406)
 %define VERR_VUSB_DEVICE_IS_SUSPENDED    (-3407)
+%define VERR_VUSB_USB_DEVICE_PERMISSION    (-3408)
 %define VERR_VGA_INVALID_CUSTOM_MODE    (-3500)
 %define VINF_VGA_RESIZE_IN_PROGRESS    (3501)
@@ -504,5 +517,6 @@
 %define VERR_GMM_CHUNK_ALREADY_MAPPED    (-3812)
 %define VERR_GMM_CHUNK_NOT_MAPPED    (-3813)
-%define VERR_GMM_MEMORY_RESERVATION_DECLINED    (-3814)
+%define VERR_GMM_TOO_MANY_CHUNK_MAPPINGS    (-3814)
+%define VERR_GMM_MEMORY_RESERVATION_DECLINED    (-3815)
 %define VERR_GVM_TOO_MANY_VMS    (-3900)
 %define VINF_GVM_NOT_BLOCKED    3901
@@ -573,3 +587,7 @@
 %define VERR_FAM_CONNECTION_LOST    (-5003)
 %define VERR_EXTPACK_UNSUPPORTED_HOST_UNINSTALL    (-6000)
+%define VERR_EXTPACK_VBOX_VERSION_MISMATCH    (-6001)
+%define VERR_PCI_PASSTHROUGH_NO_RAM_PREALLOC    (-7000)
+%define VERR_PCI_PASSTHROUGH_NO_HWACCM    (-7001)
+%define VERR_PCI_PASSTHROUGH_NO_NESTED_PAGING    (-7002)
 %include "iprt/err.mac"
Index: /trunk/include/VBox/param.h
===================================================================
--- /trunk/include/VBox/param.h	(revision 37967)
+++ /trunk/include/VBox/param.h	(revision 37968)
@@ -45,9 +45,9 @@
  * @remarks This must match GMMR0Init; currently we only support page fusion on
  *          all 64-bit hosts except Mac OS X */
-#if (   HC_ARCH_BITS == 64 \
-     && (defined(RT_OS_FREEBSD) || defined(RT_OS_LINUX) || defined(RT_OS_SOLARIS) || defined(RT_OS_WINDOWS)) ) \
- || defined(DOXYGEN_RUNNING)
-# define VBOX_WITH_PAGE_SHARING
-#endif
+#if (   HC_ARCH_BITS == 64          /* ASM-NOINC */ \
+     && (defined(RT_OS_FREEBSD) || defined(RT_OS_LINUX) || defined(RT_OS_SOLARIS) || defined(RT_OS_WINDOWS)) ) /* ASM-NOINC */ \
+ || defined(DOXYGEN_RUNNING)        /* ASM-NOINC */
+# define VBOX_WITH_PAGE_SHARING     /* ASM-NOINC */
+#endif                              /* ASM-NOINC */
 
 
Index: /trunk/include/VBox/param.mac
===================================================================
--- /trunk/include/VBox/param.mac	(revision 37967)
+++ /trunk/include/VBox/param.mac	(revision 37968)
@@ -7,11 +7,11 @@
 %define MM_RAM_MIN                  0x00400000
 %if HC_ARCH_BITS == 64
- %define MM_RAM_MAX                 0x400000000
+ %define MM_RAM_MAX                 0x20000000000
 %else
- %define MM_RAM_MAX                 0x0E0000000
+ %define MM_RAM_MAX                 0x000E0000000
 %endif
 %define MM_RAM_MIN_IN_MB            4
 %if HC_ARCH_BITS == 64
- %define MM_RAM_MAX_IN_MB           16384
+ %define MM_RAM_MAX_IN_MB           2097152
 %else
  %define MM_RAM_MAX_IN_MB           3584
Index: /trunk/include/iprt/err.mac
===================================================================
--- /trunk/include/iprt/err.mac	(revision 37967)
+++ /trunk/include/iprt/err.mac	(revision 37968)
@@ -270,4 +270,9 @@
 %define VERR_TCP_SERVER_DESTROYED    (-502)
 %define VINF_TCP_SERVER_NO_CLIENT    503
+%define VERR_UDP_SERVER_STOP    (-520)
+%define VINF_UDP_SERVER_STOP    520
+%define VERR_UDP_SERVER_SHUTDOWN    (-521)
+%define VERR_UDP_SERVER_DESTROYED    (-522)
+%define VINF_UDP_SERVER_NO_CLIENT    523
 %define VERR_L4_INVALID_DS_OFFSET    (-550)
 %define VERR_IPC    (-551)
@@ -414,2 +419,5 @@
 %define VERR_VFS_CHAIN_EXPECTED_PIPE    (-22110)
 %define VERR_VFS_CHAIN_UNEXPECTED_ACTION_TYPE    (-22111)
+%define VERR_DVM_MAP_EMPTY    (-22200)
+%define VERR_DVM_MAP_NO_VOLUME    (-22201)
+%define VERR_LOG_REVISION_MISMATCH    (-22300)
Index: /trunk/include/iprt/x86.mac
===================================================================
--- /trunk/include/iprt/x86.mac	(revision 37967)
+++ /trunk/include/iprt/x86.mac	(revision 37968)
@@ -4,4 +4,5 @@
 %endif
 %define X86_EFL_CF          RT_BIT(0)
+%define X86_EFL_1           RT_BIT(1)
 %define X86_EFL_PF          RT_BIT(2)
 %define X86_EFL_AF          RT_BIT(4)
@@ -56,4 +57,5 @@
 %define X86_CPUID_FEATURE_ECX_OSXSAVE   RT_BIT(27)
 %define X86_CPUID_FEATURE_ECX_AVX       RT_BIT(28)
+%define X86_CPUID_FEATURE_ECX_HVP       RT_BIT(31)
 %define X86_CPUID_FEATURE_EDX_FPU       RT_BIT(0)
 %define X86_CPUID_FEATURE_EDX_VME       RT_BIT(1)
@@ -176,4 +178,8 @@
 %define X86_CR4_OSXMMEEXCPT                 RT_BIT(10)
 %define X86_CR4_VMXE                        RT_BIT(13)
+%define X86_CR4_SMXE                        RT_BIT(14)
+%define X86_CR4_PCIDE                       RT_BIT(17)
+%define X86_CR4_OSXSAVE                     RT_BIT(18)
+%define X86_CR4_SMEP                        RT_BIT(20)
 %define X86_DR6_B0                          RT_BIT(0)
 %define X86_DR6_B1                          RT_BIT(1)
@@ -253,5 +259,15 @@
 %define MSR_IA32_PERF_CTL                   0x199
 %define MSR_IA32_THERM_STATUS               0x19c
-%define MSR_IA32_MISC_ENABLE                0x1A0
+%define MSR_IA32_MISC_ENABLE                   0x1A0
+%define MSR_IA32_MISC_ENABLE_FAST_STRINGS      RT_BIT(0)
+%define MSR_IA32_MISC_ENABLE_TCC               RT_BIT(3)
+%define MSR_IA32_MISC_ENABLE_PERF_MON          RT_BIT(7)
+%define MSR_IA32_MISC_ENABLE_BTS_UNAVAIL       RT_BIT(11)
+%define MSR_IA32_MISC_ENABLE_PEBS_UNAVAIL      RT_BIT(12)
+%define MSR_IA32_MISC_ENABLE_SST_ENABLE        RT_BIT(16)
+%define MSR_IA32_MISC_ENABLE_MONITOR           RT_BIT(18)
+%define MSR_IA32_MISC_ENABLE_LIMIT_CPUID       RT_BIT(22)
+%define MSR_IA32_MISC_ENABLE_XTPR_MSG_DISABLE  RT_BIT(23)
+%define MSR_IA32_MISC_ENABLE_XD_DISABLE        RT_BIT(34)
 %define MSR_IA32_MTRR_DEF_TYPE              0x2FF
 %define MSR_IA32_MC0_CTL                    0x400
@@ -441,4 +457,21 @@
 %define X86_PML4_SHIFT              39
 %define X86_PML4_MASK               0x1ff
+%define X86_FSW_IE          RT_BIT(0)
+%define X86_FSW_DE          RT_BIT(1)
+%define X86_FSW_ZE          RT_BIT(2)
+%define X86_FSW_OE          RT_BIT(3)
+%define X86_FSW_UE          RT_BIT(4)
+%define X86_FSW_PE          RT_BIT(5)
+%define X86_FSW_SF          RT_BIT(6)
+%define X86_FSW_ES          RT_BIT(7)
+%define X86_FSW_C0          RT_BIT(8)
+%define X86_FSW_C1          RT_BIT(9)
+%define X86_FSW_C2          RT_BIT(10)
+%define X86_FSW_TOP_MASK    0x3800
+%define X86_FSW_TOP_SHIFT   11
+%define X86_FSW_TOP_SMASK   0x0007
+%define X86_FSW_TOP_GET(a_uFsw) (((a_uFsw) >> X86_FSW_TOP_SHIFT) & X86_FSW_TOP_SMASK)
+%define X86_FSW_C3          RT_BIT(14)
+%define X86_FSW_B           RT_BIT(15)
 %if HC_ARCH_BITS == 64
 %else
@@ -473,4 +506,5 @@
 %define X86_SEL_TYPE_ER_CONF               (6 | X86_SEL_TYPE_CODE)
 %define X86_SEL_TYPE_ER_CONF_ACC           (6 | X86_SEL_TYPE_CODE | X86_SEL_TYPE_ACCESSED)
+%define X86_SEL_TYPE_SYS_TSS_BUSY_MASK      2
 %define X86_SEL_TYPE_SYS_UNDEFINED          0
 %define X86_SEL_TYPE_SYS_286_TSS_AVAIL      1
@@ -516,3 +550,39 @@
 %define X86_TRAP_PF_RSVD            RT_BIT(3)
 %define X86_TRAP_PF_ID              RT_BIT(4)
-%endif
+%define X86_MODRM_RM_MASK       0x07
+%define X86_MODRM_REG_MASK      0x38
+%define X86_MODRM_REG_SMASK     0x07
+%define X86_MODRM_REG_SHIFT     3
+%define X86_MODRM_MOD_MASK      0xc0
+%define X86_MODRM_MOD_SMASK     0x03
+%define X86_MODRM_MOD_SHIFT     6
+%define X86_SIB_BASE_MASK     0x07
+%define X86_SIB_INDEX_MASK    0x38
+%define X86_SIB_INDEX_SMASK   0x07
+%define X86_SIB_INDEX_SHIFT   3
+%define X86_SIB_SCALE_MASK    0xc0
+%define X86_SIB_SCALE_SMASK   0x03
+%define X86_SIB_SCALE_SHIFT   6
+%define X86_GREG_xAX            0
+%define X86_GREG_xCX            1
+%define X86_GREG_xDX            2
+%define X86_GREG_xBX            3
+%define X86_GREG_xSP            4
+%define X86_GREG_xBP            5
+%define X86_GREG_xSI            6
+%define X86_GREG_xDI            7
+%define X86_GREG_x8             8
+%define X86_GREG_x9             9
+%define X86_GREG_x10            10
+%define X86_GREG_x11            11
+%define X86_GREG_x12            12
+%define X86_GREG_x13            13
+%define X86_GREG_x14            14
+%define X86_GREG_x15            15
+%define X86_SREG_ES             0
+%define X86_SREG_CS             1
+%define X86_SREG_SS             2
+%define X86_SREG_DS             3
+%define X86_SREG_FS             4
+%define X86_SREG_GS             5
+%endif
