Index: /trunk/src/VBox/Devices/PC/DevACPI.cpp
===================================================================
--- /trunk/src/VBox/Devices/PC/DevACPI.cpp	(revision 37525)
+++ /trunk/src/VBox/Devices/PC/DevACPI.cpp	(revision 37526)
@@ -2010,5 +2010,7 @@
         if (RT_FAILURE(rc))
             return rc;
+        TMTimerLock(pThis->pPmTimerR3, VERR_IGNORED);
         acpiPmTimerReset(pThis, TMTimerGet(pThis->pPmTimerR3));
+        TMTimerUnlock(pThis->pPmTimerR3);
     }
     return rc;
@@ -2742,4 +2744,5 @@
     ACPIState *pThis = PDMINS_2_DATA(pDevIns, ACPIState *);
 
+    TMTimerLock(pThis->pPmTimerR3, VERR_IGNORED);
     pThis->pm1a_en           = 0;
     pThis->pm1a_sts          = 0;
@@ -2752,4 +2755,5 @@
     pThis->gpe0_sts          = 0;
     pThis->uSleepState       = 0;
+    TMTimerUnlock(pThis->pPmTimerR3);
 
     /** @todo Should we really reset PM base? */
@@ -3062,16 +3066,17 @@
      * Create the PM timer.
      */
+    PTMTIMER pTimer;
     rc = PDMDevHlpTMTimerCreate(pDevIns, TMCLOCK_VIRTUAL_SYNC, acpiPmTimer, &pThis->dev,
-                                TMTIMER_FLAGS_NO_CRIT_SECT, "ACPI PM Timer", &pThis->pPmTimerR3);
-    if (RT_FAILURE(rc))
-    {
-        AssertMsgFailed(("pfnTMTimerCreate -> %Rrc\n", rc));
-        return rc;
-    }
-
-    pThis->pPmTimerR0 = TMTimerR0Ptr(pThis->pPmTimerR3);
-    pThis->pPmTimerRC = TMTimerRCPtr(pThis->pPmTimerR3);
-    pThis->u64PmTimerInitial = TMTimerGet(pThis->pPmTimerR3);
+                                TMTIMER_FLAGS_NO_CRIT_SECT, "ACPI PM Timer", &pTimer);
+    AssertRCReturn(rc, rc);
+    pThis->pPmTimerR3 = pTimer;
+    pThis->pPmTimerR0 = TMTimerR0Ptr(pTimer);
+    pThis->pPmTimerRC = TMTimerRCPtr(pTimer);
+
+    rc = TMTimerLock(pTimer, VERR_IGNORED);
+    AssertRCReturn(rc, rc);
+    pThis->u64PmTimerInitial = TMTimerGet(pTimer);
     acpiPmTimerReset(pThis, pThis->u64PmTimerInitial);
+    TMTimerUnlock(pTimer);
 
     /*
Index: /trunk/src/VBox/Devices/PC/DevAPIC.cpp
===================================================================
--- /trunk/src/VBox/Devices/PC/DevAPIC.cpp	(revision 37525)
+++ /trunk/src/VBox/Devices/PC/DevAPIC.cpp	(revision 37526)
@@ -1959,5 +1959,6 @@
 {
     APICDeviceInfo *pDev = PDMINS_2_DATA(pDevIns, APICDeviceInfo *);
-    APIC_LOCK_VOID(pDev, VERR_INTERNAL_ERROR);
+    TMTimerLock(pDev->paLapicsR3[0].pTimerR3, VERR_IGNORED);
+    APIC_LOCK_VOID(pDev, VERR_IGNORED);
 
     /* Reset all APICs. */
@@ -1984,4 +1985,5 @@
 
     APIC_UNLOCK(pDev);
+    TMTimerUnlock(pDev->paLapicsR3[0].pTimerR3);
 }
 
Index: /trunk/src/VBox/Devices/PC/DevHPET.cpp
===================================================================
--- /trunk/src/VBox/Devices/PC/DevHPET.cpp	(revision 37525)
+++ /trunk/src/VBox/Devices/PC/DevHPET.cpp	(revision 37526)
@@ -1253,5 +1253,8 @@
     LogFlow(("hpetReset:\n"));
 
-    pThis->u64HpetConfig = 0;
+    /*
+     * The timers first.
+     */
+    TMTimerLock(pThis->aTimers[0].pTimerR3, VERR_IGNORED);
     for (unsigned i = 0; i < HPET_NUM_TIMERS; i++)
     {
@@ -1275,4 +1278,10 @@
         pHpetTimer->u64Cmp     = hpetInvalidValue(pHpetTimer);
     }
+    TMTimerUnlock(pThis->aTimers[0].pTimerR3);
+
+    /*
+     * The HPET state.
+     */
+    pThis->u64HpetConfig  = 0;
     pThis->u64HpetCounter = 0;
     pThis->u64HpetOffset  = 0;
@@ -1290,5 +1299,7 @@
     pThis->u64Capabilities |= ((uint64_t)(pThis->fIch9 ? HPET_CLK_PERIOD_ICH9 : HPET_CLK_PERIOD) << 32);
 
-    /* Notify PIT/RTC devices */
+    /*
+     * Notify the PIT/RTC devices.
+     */
     if (pThis->pHpetHlpR3)
         pThis->pHpetHlpR3->pfnSetLegacyMode(pDevIns, false /*fActive*/);
Index: /trunk/src/VBox/Devices/PC/DevPit-i8254.cpp
===================================================================
--- /trunk/src/VBox/Devices/PC/DevPit-i8254.cpp	(revision 37525)
+++ /trunk/src/VBox/Devices/PC/DevPit-i8254.cpp	(revision 37526)
@@ -977,5 +977,7 @@
             LogRel(("PIT: mode=%d count=%#x (%u) - %d.%02d Hz (ch=%d) (restore)\n",
                     s->mode, s->count, s->count, PIT_FREQ / s->count, (PIT_FREQ * 100 / s->count) % 100, i));
+            PDMCritSectEnter(&pThis->CritSect, VERR_IGNORED);
             TMTimerSetFrequencyHint(s->CTX_SUFF(pTimer), PIT_FREQ / s->count);
+            PDMCritSectLeave(&pThis->CritSect);
         }
         pThis->channels[i].cRelLogEntries = 0;
Index: /trunk/src/VBox/Devices/PC/DevRTC.cpp
===================================================================
--- /trunk/src/VBox/Devices/PC/DevRTC.cpp	(revision 37525)
+++ /trunk/src/VBox/Devices/PC/DevRTC.cpp	(revision 37526)
@@ -1058,36 +1058,47 @@
 
     /*
-     * Create timers, arm them, register I/O Ports and save state.
+     * Create timers.
      */
+    PTMTIMER pTimer;
+    /* Periodic timer. */
     rc = PDMDevHlpTMTimerCreate(pDevIns, TMCLOCK_VIRTUAL_SYNC, rtcTimerPeriodic, pThis,
                                 TMTIMER_FLAGS_DEFAULT_CRIT_SECT, "MC146818 RTC/CMOS - Periodic",
-                                &pThis->pPeriodicTimerR3);
+                                &pTimer);
     if (RT_FAILURE(rc))
         return rc;
-    pThis->pPeriodicTimerR0 = TMTimerR0Ptr(pThis->pPeriodicTimerR3);
-    pThis->pPeriodicTimerRC = TMTimerRCPtr(pThis->pPeriodicTimerR3);
-
+    pThis->pPeriodicTimerR3 = pTimer;
+    pThis->pPeriodicTimerR0 = TMTimerR0Ptr(pTimer);
+    pThis->pPeriodicTimerRC = TMTimerRCPtr(pTimer);
+
+    /* Seconds timer. */
     rc = PDMDevHlpTMTimerCreate(pDevIns, TMCLOCK_VIRTUAL_SYNC, rtcTimerSecond, pThis,
                                 TMTIMER_FLAGS_DEFAULT_CRIT_SECT, "MC146818 RTC/CMOS - Second",
-                                &pThis->pSecondTimerR3);
+                                &pTimer);
     if (RT_FAILURE(rc))
         return rc;
-    pThis->pSecondTimerR0 = TMTimerR0Ptr(pThis->pSecondTimerR3);
-    pThis->pSecondTimerRC = TMTimerRCPtr(pThis->pSecondTimerR3);
-
+    pThis->pSecondTimerR3 = pTimer;
+    pThis->pSecondTimerR0 = TMTimerR0Ptr(pTimer);
+    pThis->pSecondTimerRC = TMTimerRCPtr(pTimer);
+
+    /* The second2 timer, this is always active. */
     rc = PDMDevHlpTMTimerCreate(pDevIns, TMCLOCK_VIRTUAL_SYNC, rtcTimerSecond2, pThis,
                                 TMTIMER_FLAGS_DEFAULT_CRIT_SECT, "MC146818 RTC/CMOS - Second2",
-                                &pThis->pSecondTimer2R3);
+                                &pTimer);
     if (RT_FAILURE(rc))
         return rc;
-    pThis->pSecondTimer2R0  = TMTimerR0Ptr(pThis->pSecondTimer2R3);
-    pThis->pSecondTimer2RC  = TMTimerRCPtr(pThis->pSecondTimer2R3);
-    pThis->next_second_time = TMTimerGet(pThis->CTX_SUFF(pSecondTimer2))
-                            + (TMTimerGetFreq(pThis->CTX_SUFF(pSecondTimer2)) * 99) / 100;
-    rc = TMTimerSet(pThis->CTX_SUFF(pSecondTimer2), pThis->next_second_time);
-    if (RT_FAILURE(rc))
-        return rc;
-
-
+    pThis->pSecondTimer2R3  = pTimer;
+    pThis->pSecondTimer2R0  = TMTimerR0Ptr(pTimer);
+    pThis->pSecondTimer2RC  = TMTimerRCPtr(pTimer);
+    pThis->next_second_time = TMTimerGet(pTimer)
+                            + (TMTimerGetFreq(pTimer) * 99) / 100;
+    rc = TMTimerLock(pTimer, VERR_IGNORED);
+    AssertRCReturn(rc, rc);
+    rc = TMTimerSet(pTimer, pThis->next_second_time);
+    TMTimerUnlock(pTimer);
+    AssertRCReturn(rc, rc);
+
+    /*
+     * Register I/O ports.
+     */
     rc = PDMDevHlpIOPortRegister(pDevIns, pThis->IOPortBase, 4, NULL,
                                  rtcIOPortWrite, rtcIOPortRead, NULL, NULL, "MC146818 RTC/CMOS");
@@ -1109,4 +1120,7 @@
     }
 
+    /*
+     * Register the saved state.
+     */
     rc = PDMDevHlpSSMRegister3(pDevIns, RTC_SAVED_STATE_VERSION, sizeof(*pThis), rtcLiveExec, rtcSaveExec, rtcLoadExec);
     if (RT_FAILURE(rc))
