Index: /trunk/include/VBox/msi.h
===================================================================
--- /trunk/include/VBox/msi.h	(revision 32950)
+++ /trunk/include/VBox/msi.h	(revision 32951)
@@ -53,7 +53,4 @@
  * MSI region, actually same as LAPIC MMIO region, but listens on bus,
  * not CPU, accesses.
- * Works for us (as we don't differentiate who originated access)
- * as MSI registers are reserved in LAPIC, and vice versa, so we
- * can just use same handler.
  */
 #define VBOX_MSI_ADDR_BASE                   0xfee00000
Index: /trunk/include/VBox/pci.h
===================================================================
--- /trunk/include/VBox/pci.h	(revision 32950)
+++ /trunk/include/VBox/pci.h	(revision 32951)
@@ -45,5 +45,5 @@
 {
     /** Supports/uses memory accesses. */
-    PCI_COMMAND_IOACCESS = 0x0001,
+    PCI_COMMAND_IOACCESS  = 0x0001,
     PCI_COMMAND_MEMACCESS = 0x0002,
     PCI_COMMAND_BUSMASTER = 0x0004
@@ -640,4 +640,13 @@
 }
 
+/**
+ * Checks if INTx interrupts disabled in the command config register.
+ * @returns true if disabled.
+ * @param   pPciDev         The PCI device.
+ */
+DECLINLINE(bool) PCIDevIsIntxDisabled(PPCIDEVICE pPciDev)
+{
+    return (PCIDevGetCommand(pPciDev) & VBOX_PCI_COMMAND_INTX_DISABLE) != 0;
+}
 
 /**
Index: /trunk/src/VBox/Devices/Bus/DevPciIch9.cpp
===================================================================
--- /trunk/src/VBox/Devices/Bus/DevPciIch9.cpp	(revision 32950)
+++ /trunk/src/VBox/Devices/Bus/DevPciIch9.cpp	(revision 32951)
@@ -528,12 +528,16 @@
 static void ich9pciSetIrqInternal(PPCIGLOBALS pGlobals, uint8_t uDevFn, PPCIDEVICE pPciDev, int iIrq, int iLevel)
 {
-    if (MsiIsEnabled(pPciDev))
-    {
-        Log2(("Raise a MSI interrupt: %d\n", iIrq));
-        /* We only trigger MSI on level up, as technically it's matching flip-flop best (maybe even assert that level == PDM_IRQ_LEVEL_FLIP_FLOP) */
-        if ((iLevel & PDM_IRQ_LEVEL_HIGH) != 0)
-        {
-            PPDMDEVINS pDevIns = pGlobals->aPciBus.CTX_SUFF(pDevIns);
-            MsiNotify(pDevIns, pGlobals->aPciBus.CTX_SUFF(pPciHlp), pPciDev, iIrq);
+
+    if (PCIDevIsIntxDisabled(pPciDev))
+    {
+        if (MsiIsEnabled(pPciDev))
+        {
+            Log2(("Raise a MSI interrupt: %d\n", iIrq));
+            /* We only trigger MSI on level up, as technically it's matching flip-flop best (maybe even assert that level == PDM_IRQ_LEVEL_FLIP_FLOP) */
+            if ((iLevel & PDM_IRQ_LEVEL_HIGH) != 0)
+            {
+                PPDMDEVINS pDevIns = pGlobals->aPciBus.CTX_SUFF(pDevIns);
+                MsiNotify(pDevIns, pGlobals->aPciBus.CTX_SUFF(pPciHlp), pPciDev, iIrq);
+            }
         }
         return;
@@ -569,7 +573,8 @@
     uint32_t u32 = 0;
 
+    PCI_LOCK(pDevIns, VINF_IOM_HC_IOPORT_WRITE);
+
     ich9pciPhysToPciAddr(pGlobals, GCPhysAddr, &aDest);
 
-    PCI_LOCK(pDevIns, VINF_IOM_HC_IOPORT_WRITE);
     switch (cb)
     {
@@ -597,27 +602,26 @@
     PPCIGLOBALS pGlobals = PDMINS_2_DATA(pDevIns, PPCIGLOBALS);
     PciAddress  aDest;
-    uint32_t    rv = 0;
+    uint32_t    rv = 0xffffffff;
+
+    PCI_LOCK(pDevIns, VINF_IOM_HC_IOPORT_WRITE);
 
     ich9pciPhysToPciAddr(pGlobals, GCPhysAddr, &aDest);
 
-    PCI_LOCK(pDevIns, VINF_IOM_HC_IOPORT_WRITE);
     int rc = ich9pciDataReadAddr(pGlobals, &aDest, cb, &rv);
-    if (rc == VINF_SUCCESS)
-    {
-        switch (cb)
-        {
-            case 1:
-                *(uint8_t*)pv   = (uint8_t)rv;
-                break;
-            case 2:
-                *(uint16_t*)pv  = (uint16_t)rv;
-                break;
-            case 4:
-                *(uint32_t*)pv  = (uint32_t)rv;
-                break;
-            default:
-                Assert(false);
-                break;
-        }
+
+    switch (cb)
+    {
+        case 1:
+            *(uint8_t*)pv   = (uint8_t)rv;
+            break;
+        case 2:
+            *(uint16_t*)pv  = (uint16_t)rv;
+            break;
+        case 4:
+            *(uint32_t*)pv  = (uint32_t)rv;
+            break;
+        default:
+            Assert(false);
+            break;
     }
     PCI_UNLOCK(pDevIns);
@@ -1699,5 +1703,5 @@
             return PCIDevGetByte(aDev,  u32Address);
         case 2:
-            return PCIDevGetWord(aDev,  u32Address);        
+            return PCIDevGetWord(aDev,  u32Address);
         case 4:
             return PCIDevGetDWord(aDev, u32Address);
@@ -2263,4 +2267,34 @@
 }
 
+static void ich9pciResetDevice(PPCIDEVICE pDev)
+{
+    pDev->config[VBOX_PCI_COMMAND] &= ~(VBOX_PCI_COMMAND_IO | VBOX_PCI_COMMAND_MEMORY |
+                                        VBOX_PCI_COMMAND_MASTER);
+
+    if (!PCIIsPci2PciBridge(pDev))
+    {
+        pDev->config[VBOX_PCI_CACHE_LINE_SIZE] = 0x0;
+        pDev->config[VBOX_PCI_INTERRUPT_LINE] = 0x0;
+    }
+    /* Regions ? */
+}
+
+
+/**
+ * @copydoc FNPDMDEVRESET
+ */
+static DECLCALLBACK(void) ich9pciReset(PPDMDEVINS pDevIns)
+{
+    PPCIGLOBALS pGlobals = PDMINS_2_DATA(pDevIns, PPCIGLOBALS);
+    PPCIBUS     pBus     = &pGlobals->aPciBus;
+
+    /* Relocate RC pointers for the attached pci devices. */
+    for (uint32_t i = 0; i < RT_ELEMENTS(pBus->apDevices); i++)
+    {
+        if (pBus->apDevices[i])
+            ich9pciResetDevice(pBus->apDevices[i]);
+    }
+}
+
 /**
  * @copydoc FNPDMDEVRELOCATE
@@ -2473,5 +2507,5 @@
     NULL,
     /* pfnReset */
-    NULL,
+    ich9pciReset,
     /* pfnSuspend */
     NULL,
Index: /trunk/src/VBox/Devices/PC/vbox.dsl
===================================================================
--- /trunk/src/VBox/Devices/PC/vbox.dsl	(revision 32950)
+++ /trunk/src/VBox/Devices/PC/vbox.dsl	(revision 32951)
@@ -556,5 +556,5 @@
                     APDE,   8,
                 }
-
+              
                 // PCI MCFG MMIO ranges
                 Device (^PCIE)
@@ -565,6 +565,6 @@
                     {
                         Memory32Fixed (ReadOnly,
-                            0xD0000000,         // Address Base
-                            0x10000000,         // Address Length
+                            0xdc000000,        // Address Base
+                            0x4000000,         // Address Length
                             _Y13)
                     })
@@ -586,5 +586,5 @@
                      }
                     }
-                }
+                }               
 
                 // Keyboard device