Index: /trunk/include/VBox/cpum.h
===================================================================
--- /trunk/include/VBox/cpum.h	(revision 30861)
+++ /trunk/include/VBox/cpum.h	(revision 30862)
@@ -675,6 +675,6 @@
 VMMDECL(uint32_t)   CPUMGetGuestCpuIdCentaurMax(PVM pVM);
 VMMDECL(uint64_t)   CPUMGetGuestEFER(PVMCPU pVCpu);
-VMMDECL(uint64_t)   CPUMGetGuestMsr(PVMCPU pVCpu, unsigned idMsr);
-VMMDECL(void)       CPUMSetGuestMsr(PVMCPU pVCpu, unsigned idMsr, uint64_t valMsr);
+VMMDECL(int)        CPUMQueryGuestMsr(PVMCPU pVCpu, uint32_t idMsr, uint64_t *puValue);
+VMMDECL(int)        CPUMSetGuestMsr(PVMCPU pVCpu, uint32_t idMsr, uint64_t uValue);
 VMMDECL(CPUMCPUVENDOR)  CPUMGetGuestCpuVendor(PVM pVM);
 VMMDECL(CPUMCPUVENDOR)  CPUMGetHostCpuVendor(PVM pVM);
Index: /trunk/include/VBox/err.h
===================================================================
--- /trunk/include/VBox/err.h	(revision 30861)
+++ /trunk/include/VBox/err.h	(revision 30862)
@@ -487,8 +487,15 @@
 /** Attempt to register a RAM range of which parts are already
  * covered by existing RAM ranges. */
-#define VERR_MM_RAM_CONFLICT                (-1700)
+#define VERR_MM_RAM_CONFLICT                    (-1700)
 /** Hypervisor memory allocation failed. */
-#define VERR_MM_HYPER_NO_MEMORY             (-1701)
-
+#define VERR_MM_HYPER_NO_MEMORY                 (-1701)
+/** @} */
+
+
+/** @name CPU Monitor (CPUM) Status Codes
+ * @{
+ */
+/** The caller shall raise an \#GP(0) exception. */
+#define VERR_CPUM_RAISE_GP_0                    (-1750)
 /** @} */
 
Index: /trunk/include/VBox/pgm.h
===================================================================
--- /trunk/include/VBox/pgm.h	(revision 30861)
+++ /trunk/include/VBox/pgm.h	(revision 30862)
@@ -338,4 +338,5 @@
 VMMDECL(PGMMODE)    PGMGetHostMode(PVM pVM);
 VMMDECL(const char *) PGMGetModeName(PGMMODE enmMode);
+VMM_INT_DECL(void)  PGMNotifyNxeChanged(PVMCPU pVCpu, bool fNxe);
 VMMDECL(bool)       PGMHasDirtyPages(PVM pVM);
 VMMDECL(int)        PGMHandlerPhysicalRegisterEx(PVM pVM, PGMPHYSHANDLERTYPE enmType, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast,
Index: /trunk/src/recompiler/VBoxREMWrapper.cpp
===================================================================
--- /trunk/src/recompiler/VBoxREMWrapper.cpp	(revision 30861)
+++ /trunk/src/recompiler/VBoxREMWrapper.cpp	(revision 30862)
@@ -520,12 +520,13 @@
 };
 
-/* CPUMGetGuestMsr args */
-static const REMPARMDESC g_aArgsCPUMGetGuestMsr[] =
+/* CPUMQueryGuestMsr args */
+static const REMPARMDESC g_aArgsCPUMQueryGuestMsr[] =
 {
     { REMPARMDESC_FLAGS_INT,        sizeof(PVMCPU),             NULL },
     { REMPARMDESC_FLAGS_INT,        sizeof(uint32_t),           NULL },
-};
-
-/* CPUMGetGuestMsr args */
+    { REMPARMDESC_FLAGS_INT,        sizeof(uint64_t *),         NULL },
+};
+
+/* CPUMSetGuestMsr args */
 static const REMPARMDESC g_aArgsCPUMSetGuestMsr[] =
 {
@@ -727,18 +728,4 @@
     { REMPARMDESC_FLAGS_INT,        sizeof(PVMCPU),             NULL },
     { REMPARMDESC_FLAGS_INT,        sizeof(uint8_t),            NULL }
-};
-static const REMPARMDESC g_aArgsPDMApicWriteMSR[] =
-{
-    { REMPARMDESC_FLAGS_INT,        sizeof(PVM),                NULL },
-    { REMPARMDESC_FLAGS_INT,        sizeof(VMCPUID),            NULL },
-    { REMPARMDESC_FLAGS_INT,        sizeof(uint32_t),           NULL },
-    { REMPARMDESC_FLAGS_INT,        sizeof(uint64_t),           NULL }
-};
-static const REMPARMDESC g_aArgsPDMApicReadMSR[] =
-{
-    { REMPARMDESC_FLAGS_INT,        sizeof(PVM),                NULL },
-    { REMPARMDESC_FLAGS_INT,        sizeof(VMCPUID),            NULL },
-    { REMPARMDESC_FLAGS_INT,        sizeof(uint32_t),           NULL },
-    { REMPARMDESC_FLAGS_INT,        sizeof(uint64_t *),         NULL }
 };
 static const REMPARMDESC g_aArgsPDMGetInterrupt[] =
@@ -1187,5 +1174,5 @@
     { "CPUMSetChangedFlags",                    VMM_FN(CPUMSetChangedFlags),            &g_aArgsCPUMSetChangedFlags[0],             RT_ELEMENTS(g_aArgsCPUMSetChangedFlags),               REMFNDESC_FLAGS_RET_VOID,   0,                  NULL },
     { "CPUMGetGuestCPL",                        VMM_FN(CPUMGetGuestCPL),                &g_aArgsCPUMGetGuestCpl[0],                 RT_ELEMENTS(g_aArgsCPUMGetGuestCpl),                   REMFNDESC_FLAGS_RET_INT,    sizeof(unsigned),   NULL },
-    { "CPUMGetGuestMsr",                        VMM_FN(CPUMGetGuestMsr),                &g_aArgsCPUMGetGuestMsr[0],                 RT_ELEMENTS(g_aArgsCPUMGetGuestMsr),                   REMFNDESC_FLAGS_RET_INT,    sizeof(uint64_t),   NULL },
+    { "CPUMQueryGuestMsr",                      VMM_FN(CPUMQueryGuestMsr),              &g_aArgsCPUMQueryGuestMsr[0],               RT_ELEMENTS(g_aArgsCPUMQueryGuestMsr),                 REMFNDESC_FLAGS_RET_INT,    sizeof(uint64_t),   NULL },
     { "CPUMSetGuestMsr",                        VMM_FN(CPUMSetGuestMsr),                &g_aArgsCPUMSetGuestMsr[0],                 RT_ELEMENTS(g_aArgsCPUMSetGuestMsr),                   REMFNDESC_FLAGS_RET_VOID,   0,                  NULL },
     { "CPUMGetGuestCpuId",                      VMM_FN(CPUMGetGuestCpuId),              &g_aArgsCPUMGetGuestCpuId[0],               RT_ELEMENTS(g_aArgsCPUMGetGuestCpuId),                 REMFNDESC_FLAGS_RET_VOID,   0,                  NULL },
@@ -1235,6 +1222,4 @@
     { "PDMApicSetBase",                         VMM_FN(PDMApicSetBase),                 &g_aArgsPDMApicSetBase[0],                  RT_ELEMENTS(g_aArgsPDMApicSetBase),                    REMFNDESC_FLAGS_RET_INT,    sizeof(int),        NULL },
     { "PDMApicSetTPR",                          VMM_FN(PDMApicSetTPR),                  &g_aArgsPDMApicSetTPR[0],                   RT_ELEMENTS(g_aArgsPDMApicSetTPR),                     REMFNDESC_FLAGS_RET_INT,    sizeof(int),        NULL },
-    { "PDMApicWriteMSR",                        VMM_FN(PDMApicWriteMSR),                &g_aArgsPDMApicWriteMSR[0],                 RT_ELEMENTS(g_aArgsPDMApicWriteMSR),                   REMFNDESC_FLAGS_RET_INT,    sizeof(int),        NULL },
-    { "PDMApicReadMSR",                         VMM_FN(PDMApicReadMSR),                 &g_aArgsPDMApicReadMSR[0],                  RT_ELEMENTS(g_aArgsPDMApicReadMSR),                    REMFNDESC_FLAGS_RET_INT,    sizeof(int),        NULL },
     { "PDMR3DmaRun",                            VMM_FN(PDMR3DmaRun),                    &g_aArgsVM[0],                              RT_ELEMENTS(g_aArgsVM),                                REMFNDESC_FLAGS_RET_VOID,   0,                  NULL },
     { "PDMR3CritSectInit",                      VMM_FN(PDMR3CritSectInit),              &g_aArgsPDMR3CritSectInit[0],               RT_ELEMENTS(g_aArgsPDMR3CritSectInit),                 REMFNDESC_FLAGS_RET_INT,    sizeof(int),        NULL },
Index: /trunk/src/recompiler/VBoxRecompiler.c
===================================================================
--- /trunk/src/recompiler/VBoxRecompiler.c	(revision 30861)
+++ /trunk/src/recompiler/VBoxRecompiler.c	(revision 30862)
@@ -4167,4 +4167,5 @@
 /* -+- local apic -+- */
 
+#if 0 /* CPUMSetGuestMsr does this now. */
 void cpu_set_apic_base(CPUX86State *env, uint64_t val)
 {
@@ -4172,4 +4173,5 @@
     LogFlow(("cpu_set_apic_base: val=%#llx rc=%Rrc\n", val, rc)); NOREF(rc);
 }
+#endif
 
 uint64_t cpu_get_apic_base(CPUX86State *env)
@@ -4205,36 +4207,32 @@
 }
 
-
-uint64_t cpu_apic_rdmsr(CPUX86State *env, uint32_t reg)
-{
-    uint64_t value;
-    int rc = PDMApicReadMSR(env->pVM, 0/* cpu */, reg, &value);
-    if (RT_SUCCESS(rc))
-    {
-        LogFlow(("cpu_apic_rdms returns %#x\n", value));
-        return value;
-    }
-    /** @todo: exception ? */
-    LogFlow(("cpu_apic_rdms returns 0 (rc=%Rrc)\n", rc));
-    return value;
-}
-
-void     cpu_apic_wrmsr(CPUX86State *env, uint32_t reg, uint64_t value)
-{
-    int rc = PDMApicWriteMSR(env->pVM, 0 /* cpu */, reg, value);
-    /** @todo: exception if error ? */
-    LogFlow(("cpu_apic_wrmsr: rc=%Rrc\n", rc)); NOREF(rc);
-}
-
-uint64_t cpu_rdmsr(CPUX86State *env, uint32_t msr)
+/**
+ * Read an MSR.
+ *
+ * @retval 0 success.
+ * @retval -1 failure, raise \#GP(0).
+ * @param   env     The cpu state.
+ * @param   idMsr   The MSR to read.
+ * @param   puValue Where to return the value.
+ */
+int cpu_rdmsr(CPUX86State *env, uint32_t idMsr, uint64_t *puValue)
 {
     Assert(env->pVCpu);
-    return CPUMGetGuestMsr(env->pVCpu, msr);
-}
-
-void cpu_wrmsr(CPUX86State *env, uint32_t msr, uint64_t val)
+    return CPUMQueryGuestMsr(env->pVCpu, idMsr, puValue) == VINF_SUCCESS ? 0 : -1;
+}
+
+/**
+ * Write to an MSR.
+ *
+ * @retval 0 success.
+ * @retval -1 failure, raise \#GP(0).
+ * @param   env     The cpu state.
+ * @param   idMsr   The MSR to read.
+ * @param   puValue Where to return the value.
+ */
+int cpu_wrmsr(CPUX86State *env, uint32_t idMsr, uint64_t uValue)
 {
     Assert(env->pVCpu);
-    CPUMSetGuestMsr(env->pVCpu, msr, val);
+    return CPUMSetGuestMsr(env->pVCpu, idMsr, uValue) == VINF_SUCCESS ? 0 : -1;
 }
 
Index: /trunk/src/recompiler/target-i386/cpu.h
===================================================================
--- /trunk/src/recompiler/target-i386/cpu.h	(revision 30861)
+++ /trunk/src/recompiler/target-i386/cpu.h	(revision 30862)
@@ -601,9 +601,9 @@
     /* sysenter registers */
     uint32_t sysenter_cs;
+#ifdef VBOX
+    uint32_t alignment0;
+#endif
     uint64_t sysenter_esp;
     uint64_t sysenter_eip;
-#ifdef VBOX
-    uint32_t alignment0;
-#endif
     uint64_t efer;
     uint64_t star;
@@ -926,8 +926,6 @@
 #endif
 #ifdef VBOX
-uint64_t cpu_apic_rdmsr(CPUX86State *env, uint32_t reg);
-void     cpu_apic_wrmsr(CPUX86State *env, uint32_t reg, uint64_t value);
-uint64_t cpu_rdmsr(CPUX86State *env, uint32_t msr);
-void     cpu_wrmsr(CPUX86State *env, uint32_t msr, uint64_t val);
+int cpu_rdmsr(CPUX86State *env, uint32_t idMsr, uint64_t *puValue);
+int cpu_wrmsr(CPUX86State *env, uint32_t idMsr, uint64_t uValue);
 #endif
 void cpu_smm_update(CPUX86State *env);
Index: /trunk/src/recompiler/target-i386/op_helper.c
===================================================================
--- /trunk/src/recompiler/target-i386/op_helper.c	(revision 30861)
+++ /trunk/src/recompiler/target-i386/op_helper.c	(revision 30862)
@@ -3690,5 +3690,8 @@
     EAX = (uint32_t)(val);
     EDX = (uint32_t)(val >> 32);
-    ECX = cpu_rdmsr(env, MSR_K8_TSC_AUX);
+    if (cpu_rdmsr(env, MSR_K8_TSC_AUX, &val) == 0)
+        ECX = (uint32_t)(val);
+    else
+        ECX = 0;
 }
 #endif
@@ -3743,5 +3746,7 @@
         break;
     case MSR_IA32_APICBASE:
+#ifndef VBOX /* The CPUMSetGuestMsr call below does this now. */
         cpu_set_apic_base(env, val);
+#endif
         break;
     case MSR_EFER:
@@ -3795,19 +3800,15 @@
 #ifndef VBOX
         /* XXX: exception ? */
-        break;
-#else  /* VBOX */
+#endif
+        break;
+    }
+
+#ifdef VBOX
+    /* call CPUM. */
+    if (cpu_wrmsr(env, (uint32_t)ECX, val) != 0)
     {
-        uint32_t ecx = (uint32_t)ECX;
-        /* In X2APIC specification this range is reserved for APIC control. */
-        if (ecx >= MSR_APIC_RANGE_START && ecx < MSR_APIC_RANGE_END)
-            cpu_apic_wrmsr(env, ecx, val);
-        /** @todo else exception? */
-        break;
-    }
-    case MSR_K8_TSC_AUX:
-            cpu_wrmsr(env, MSR_K8_TSC_AUX, val);
-            break;
-#endif /* VBOX */
-    }
+        /** @todo be a brave man and raise a \#GP(0) here as we should... */
+    }
+#endif
 }
 
@@ -3842,12 +3843,5 @@
         val = env->vm_hsave;
         break;
-#ifdef VBOX
-    case MSR_IA32_PERF_STATUS:
-    case MSR_IA32_PLATFORM_INFO:
-    case MSR_IA32_FSB_CLOCK_STS:
-    case MSR_IA32_THERM_STATUS:
-        val = CPUMGetGuestMsr(env->pVCpu, (uint32_t)ECX);
-        break;
-#else
+#ifndef VBOX /* forward to CPUMQueryGuestMsr. */
     case MSR_IA32_PERF_STATUS:
         /* tsc_increment_by_tick */
@@ -3890,23 +3884,21 @@
         /* XXX: exception ? */
         val = 0;
-        break;
 #else  /* VBOX */
+        if (cpu_rdmsr(env, (uint32_t)ECX, &val) != 0)
         {
-            uint32_t ecx = (uint32_t)ECX;
-            /* In X2APIC specification this range is reserved for APIC control. */
-            if (ecx >= MSR_APIC_RANGE_START && ecx < MSR_APIC_RANGE_END)
-                val = cpu_apic_rdmsr(env, ecx);
-            else
-                val = 0; /** @todo else exception? */
-            break;
-        }
-        case MSR_IA32_TSC:
-        case MSR_K8_TSC_AUX:
-            val = cpu_rdmsr(env, (uint32_t)ECX);
-            break;
-#endif /* VBOX */
+            /** @todo be a brave man and raise a \#GP(0) here as we should... */
+            val = 0;
+        }
+#endif
+        break;
     }
     EAX = (uint32_t)(val);
     EDX = (uint32_t)(val >> 32);
+
+#ifdef VBOX_STRICT
+    if (cpu_rdmsr(env, (uint32_t)ECX, &val) != 0)
+        val = 0;
+    AssertMsg(val == RT_MAKE_U32(EAX, EDX), ("idMsr=%#x val=%#llx eax:edx=%#llx\n", (uint32_t)ECX, val, RT_MAKE_U32(EAX, EDX)));
+#endif
 }
 #endif
