Index: /trunk/include/iprt/asm-amd64-x86.h
===================================================================
--- /trunk/include/iprt/asm-amd64-x86.h	(revision 30800)
+++ /trunk/include/iprt/asm-amd64-x86.h	(revision 30801)
@@ -622,4 +622,170 @@
 
 /**
+ * Performs the cpuid instruction returning eax.
+ *
+ * @param   uOperator   CPUID operation (eax).
+ * @returns EAX after cpuid operation.
+ */
+#if RT_INLINE_ASM_EXTERNAL && !RT_INLINE_ASM_USES_INTRIN
+DECLASM(uint32_t) ASMCpuId_EAX(uint32_t uOperator);
+#else
+DECLINLINE(uint32_t) ASMCpuId_EAX(uint32_t uOperator)
+{
+    RTCCUINTREG xAX;
+# if RT_INLINE_ASM_GNU_STYLE
+#  ifdef RT_ARCH_AMD64
+    __asm__ ("cpuid"
+             : "=a" (xAX)
+             : "0" (uOperator)
+             : "rbx", "rcx", "rdx");
+#  elif (defined(PIC) || defined(__PIC__)) && defined(__i386__)
+    __asm__ ("push  %%ebx\n\t"
+             "cpuid\n\t"
+             "pop   %%ebx\n\t"
+             : "=a" (xAX)
+             : "0" (uOperator)
+             : "ecx", "edx");
+#  else
+    __asm__ ("cpuid"
+             : "=a" (xAX)
+             : "0" (uOperator)
+             : "edx", "ecx", "ebx");
+#  endif
+
+# elif RT_INLINE_ASM_USES_INTRIN
+    int aInfo[4];
+    __cpuid(aInfo, uOperator);
+    xDX = aInfo[0];
+
+# else
+    __asm
+    {
+        push    ebx
+        mov     eax, [uOperator]
+        cpuid
+        mov     [xAX], eax
+        pop     ebx
+    }
+# endif
+    return (uint32_t)xAX;
+}
+#endif
+
+
+/**
+ * Performs the cpuid instruction returning ebx.
+ *
+ * @param   uOperator   CPUID operation (eax).
+ * @returns EBX after cpuid operation.
+ */
+#if RT_INLINE_ASM_EXTERNAL && !RT_INLINE_ASM_USES_INTRIN
+DECLASM(uint32_t) ASMCpuId_EBX(uint32_t uOperator);
+#else
+DECLINLINE(uint32_t) ASMCpuId_EBX(uint32_t uOperator)
+{
+    RTCCUINTREG xBX;
+# if RT_INLINE_ASM_GNU_STYLE
+#  ifdef RT_ARCH_AMD64
+    RTCCUINTREG uSpill;
+    __asm__ ("cpuid"
+             : "=a" (uSpill),
+               "=b" (xBX)
+             : "0" (uOperator)
+             : "rdx", "rcx");
+#  elif (defined(PIC) || defined(__PIC__)) && defined(__i386__)
+    __asm__ ("push  %%ebx\n\t"
+             "cpuid\n\t"
+             "mov   %%ebx, %%edx\n\t"
+             "pop   %%ebx\n\t"
+             : "=a" (uOperator),
+               "=d" (xBX)
+             : "0" (uOperator)
+             : "ecx");
+#  else
+    __asm__ ("cpuid"
+             : "=a" (uOperator),
+               "=b" (xBX)
+             : "0" (uOperator)
+             : "edx", "ecx");
+#  endif
+
+# elif RT_INLINE_ASM_USES_INTRIN
+    int aInfo[4];
+    __cpuid(aInfo, uOperator);
+    xDX = aInfo[1];
+
+# else
+    __asm
+    {
+        push    ebx
+        mov     eax, [uOperator]
+        cpuid
+        mov     [xBX], ebx
+        pop     ebx
+    }
+# endif
+    return (uint32_t)xBX;
+}
+#endif
+
+
+/**
+ * Performs the cpuid instruction returning ecx.
+ *
+ * @param   uOperator   CPUID operation (eax).
+ * @returns ECX after cpuid operation.
+ */
+#if RT_INLINE_ASM_EXTERNAL && !RT_INLINE_ASM_USES_INTRIN
+DECLASM(uint32_t) ASMCpuId_ECX(uint32_t uOperator);
+#else
+DECLINLINE(uint32_t) ASMCpuId_ECX(uint32_t uOperator)
+{
+    RTCCUINTREG xCX;
+# if RT_INLINE_ASM_GNU_STYLE
+#  ifdef RT_ARCH_AMD64
+    RTCCUINTREG uSpill;
+    __asm__ ("cpuid"
+             : "=a" (uSpill),
+               "=c" (xCX)
+             : "0" (uOperator)
+             : "rbx", "rdx");
+#  elif (defined(PIC) || defined(__PIC__)) && defined(__i386__)
+    __asm__ ("push  %%ebx\n\t"
+             "cpuid\n\t"
+             "pop   %%ebx\n\t"
+             : "=a" (uOperator),
+               "=c" (xCX)
+             : "0" (uOperator)
+             : "edx");
+#  else
+    __asm__ ("cpuid"
+             : "=a" (uOperator),
+               "=c" (xCX)
+             : "0" (uOperator)
+             : "ebx", "edx");
+
+#  endif
+
+# elif RT_INLINE_ASM_USES_INTRIN
+    int aInfo[4];
+    __cpuid(aInfo, uOperator);
+    xCX = aInfo[2];
+
+# else
+    __asm
+    {
+        push    ebx
+        mov     eax, [uOperator]
+        cpuid
+        mov     [xCX], ecx
+        pop     ebx
+    }
+# endif
+    return (uint32_t)xCX;
+}
+#endif
+
+
+/**
  * Performs the cpuid instruction returning edx.
  *
@@ -673,61 +839,4 @@
 # endif
     return (uint32_t)xDX;
-}
-#endif
-
-
-/**
- * Performs the cpuid instruction returning ecx.
- *
- * @param   uOperator   CPUID operation (eax).
- * @returns ECX after cpuid operation.
- */
-#if RT_INLINE_ASM_EXTERNAL && !RT_INLINE_ASM_USES_INTRIN
-DECLASM(uint32_t) ASMCpuId_ECX(uint32_t uOperator);
-#else
-DECLINLINE(uint32_t) ASMCpuId_ECX(uint32_t uOperator)
-{
-    RTCCUINTREG xCX;
-# if RT_INLINE_ASM_GNU_STYLE
-#  ifdef RT_ARCH_AMD64
-    RTCCUINTREG uSpill;
-    __asm__ ("cpuid"
-             : "=a" (uSpill),
-               "=c" (xCX)
-             : "0" (uOperator)
-             : "rbx", "rdx");
-#  elif (defined(PIC) || defined(__PIC__)) && defined(__i386__)
-    __asm__ ("push  %%ebx\n\t"
-             "cpuid\n\t"
-             "pop   %%ebx\n\t"
-             : "=a" (uOperator),
-               "=c" (xCX)
-             : "0" (uOperator)
-             : "edx");
-#  else
-    __asm__ ("cpuid"
-             : "=a" (uOperator),
-               "=c" (xCX)
-             : "0" (uOperator)
-             : "ebx", "edx");
-
-#  endif
-
-# elif RT_INLINE_ASM_USES_INTRIN
-    int aInfo[4];
-    __cpuid(aInfo, uOperator);
-    xCX = aInfo[2];
-
-# else
-    __asm
-    {
-        push    ebx
-        mov     eax, [uOperator]
-        cpuid
-        mov     [xCX], ecx
-        pop     ebx
-    }
-# endif
-    return (uint32_t)xCX;
 }
 #endif
Index: /trunk/src/VBox/Runtime/testcase/tstInlineAsm.cpp
===================================================================
--- /trunk/src/VBox/Runtime/testcase/tstInlineAsm.cpp	(revision 30800)
+++ /trunk/src/VBox/Runtime/testcase/tstInlineAsm.cpp	(revision 30801)
@@ -136,7 +136,12 @@
     ASMCpuId(0, &s.uEAX, &s.uEBX, &s.uECX, &s.uEDX);
 
-    uint32_t u32 = ASMCpuId_ECX(0);
+    uint32_t u32;
+
+    u32 = ASMCpuId_EAX(0);
+    CHECKVAL(u32, s.uEAX, "%x");
+    u32 = ASMCpuId_EBX(0);
+    CHECKVAL(u32, s.uEBX, "%x");
+    u32 = ASMCpuId_ECX(0);
     CHECKVAL(u32, s.uECX, "%x");
-
     u32 = ASMCpuId_EDX(0);
     CHECKVAL(u32, s.uEDX, "%x");
@@ -145,5 +150,4 @@
     uint32_t uEDX2 = s.uEDX - 1;
     ASMCpuId_ECX_EDX(0, &uECX2, &uEDX2);
-
     CHECKVAL(uECX2, s.uECX, "%x");
     CHECKVAL(uEDX2, s.uEDX, "%x");
@@ -165,4 +169,19 @@
         RTPrintf("%08x  %08x %08x %08x %08x%s\n",
                  iStd, s.uEAX, s.uEBX, s.uECX, s.uEDX, iStd <= cFunctions ? "" : "*");
+
+        u32 = ASMCpuId_EAX(iStd);
+        CHECKVAL(u32, s.uEAX, "%x");
+        u32 = ASMCpuId_EBX(iStd);
+        CHECKVAL(u32, s.uEBX, "%x");
+        u32 = ASMCpuId_ECX(iStd);
+        CHECKVAL(u32, s.uECX, "%x");
+        u32 = ASMCpuId_EDX(iStd);
+        CHECKVAL(u32, s.uEDX, "%x");
+
+        uECX2 = s.uECX - 1;
+        uEDX2 = s.uEDX - 1;
+        ASMCpuId_ECX_EDX(iStd, &uECX2, &uEDX2);
+        CHECKVAL(uECX2, s.uECX, "%x");
+        CHECKVAL(uEDX2, s.uEDX, "%x");
     }
 
@@ -270,4 +289,19 @@
         RTPrintf("%08x  %08x %08x %08x %08x%s\n",
                  iExt, s.uEAX, s.uEBX, s.uECX, s.uEDX, iExt <= cExtFunctions ? "" : "*");
+
+        u32 = ASMCpuId_EAX(iExt);
+        CHECKVAL(u32, s.uEAX, "%x");
+        u32 = ASMCpuId_EBX(iExt);
+        CHECKVAL(u32, s.uEBX, "%x");
+        u32 = ASMCpuId_ECX(iExt);
+        CHECKVAL(u32, s.uECX, "%x");
+        u32 = ASMCpuId_EDX(iExt);
+        CHECKVAL(u32, s.uEDX, "%x");
+
+        uECX2 = s.uECX - 1;
+        uEDX2 = s.uEDX - 1;
+        ASMCpuId_ECX_EDX(iExt, &uECX2, &uEDX2);
+        CHECKVAL(uECX2, s.uECX, "%x");
+        CHECKVAL(uEDX2, s.uEDX, "%x");
     }