Index: /trunk/src/VBox/VMM/VMMR0/HWACCMR0Mixed.mac
===================================================================
--- /trunk/src/VBox/VMM/VMMR0/HWACCMR0Mixed.mac	(revision 30413)
+++ /trunk/src/VBox/VMM/VMMR0/HWACCMR0Mixed.mac	(revision 30414)
@@ -202,8 +202,7 @@
     ; @todo get rid of sgdt
     pop     xBX         ; saved TR
-%ifndef RT_ARCH_AMD64
     sub     xSP, xS*2
     sgdt    [xSP]
-    mov     eax, ebx
+    mov     xAX, xBX
     and     al, 0F8h                                ; mask away TI and RPL bits, get descriptor offset.
     add     xAX, [xSP + 2]                          ; eax <- GDTR.address + descriptor offset.
@@ -211,5 +210,4 @@
     ltr     bx
     add     xSP, xS*2
-%endif
 
     pop     xAX         ; saved LDTR
@@ -265,14 +263,12 @@
     ; @todo get rid of sgdt
     pop     xBX         ; saved TR
-%ifndef RT_ARCH_AMD64
     sub     xSP, xS*2
     sgdt    [xSP]
-    mov     eax, ebx
+    mov     xAX, xBX
     and     al, 0F8h                                ; mask away TI and RPL bits, get descriptor offset.
-    add     eax, [xSP + 2]                          ; eax <- GDTR.address + descriptor offset.
-    and     dword [ss:eax + 4], ~0200h                 ; clear busy flag (2nd type2 bit)
+    add     xAX, [xSP + 2]                          ; eax <- GDTR.address + descriptor offset.
+    and     dword [ss:xAX + 4], ~0200h                 ; clear busy flag (2nd type2 bit)
     ltr     bx
     add     xSP, xS*2
-%endif
 
     pop     xAX         ; saved LDTR
@@ -304,14 +300,12 @@
     ; @todo get rid of sgdt
     pop     xBX         ; saved TR
-%ifndef RT_ARCH_AMD64
     sub     xSP, xS*2
     sgdt    [xSP]
-    mov     eax, ebx
+    mov     xAX, xBX
     and     al, 0F8h                                ; mask away TI and RPL bits, get descriptor offset.
-    add     eax, [xSP + 2]                          ; eax <- GDTR.address + descriptor offset.
-    and     dword [ss:eax + 4], ~0200h                 ; clear busy flag (2nd type2 bit)
+    add     xAX, [xSP + 2]                          ; eax <- GDTR.address + descriptor offset.
+    and     dword [ss:xAX + 4], ~0200h                 ; clear busy flag (2nd type2 bit)
     ltr     bx
     add     xSP, xS*2
-%endif
 
     pop     xAX         ; saved LDTR
@@ -426,4 +420,8 @@
     xor     eax, eax
     sldt    ax
+    push    xAX
+
+    ; The TR limit is reset to 0x67; restore it manually
+    str     eax
     push    xAX
 
@@ -496,5 +494,5 @@
 
     push    xDI
-    mov     xDI, [xSP + xS * 2]         ; pCtx (*2 to skip the saved LDTR)
+    mov     xDI, [xSP + xS * 3]         ; pCtx (*3 to skip the saved LDTR + TR)
 
     mov     qword [xDI + CPUMCTX.eax], rax
@@ -522,4 +520,17 @@
 %endif
 
+    ; Restore TSS selector; must mark it as not busy before using ltr (!)
+    ; ASSUME that this is supposed to be 'BUSY'. (saves 20-30 ticks on the T42p)
+    ; @todo get rid of sgdt
+    pop     xBX         ; saved TR
+    sub     xSP, xS*2
+    sgdt    [xSP]
+    mov     xAX, xBX
+    and     al, 0F8h                                ; mask away TI and RPL bits, get descriptor offset.
+    add     xAX, [xSP + 2]                          ; eax <- GDTR.address + descriptor offset.
+    and     dword [xAX + 4], ~0200h                 ; clear busy flag (2nd type2 bit)
+    ltr     bx
+    add     xSP, xS*2
+
     pop     xAX         ; saved LDTR
     lldt    ax
@@ -580,4 +591,17 @@
     add     xSP, xS*2
 
+    ; Restore TSS selector; must mark it as not busy before using ltr (!)
+    ; ASSUME that this is supposed to be 'BUSY'. (saves 20-30 ticks on the T42p)
+    ; @todo get rid of sgdt
+    pop     xBX         ; saved TR
+    sub     xSP, xS*2
+    sgdt    [xSP]
+    mov     xAX, xBX
+    and     al, 0F8h                                ; mask away TI and RPL bits, get descriptor offset.
+    add     xAX, [xSP + 2]                          ; eax <- GDTR.address + descriptor offset.
+    and     dword [xAX + 4], ~0200h                 ; clear busy flag (2nd type2 bit)
+    ltr     bx
+    add     xSP, xS*2
+
     pop     xAX         ; saved LDTR
     lldt    ax
@@ -612,4 +636,17 @@
     add     xSP, xS*2
     lgdt    [xSP]
+    add     xSP, xS*2
+
+    ; Restore TSS selector; must mark it as not busy before using ltr (!)
+    ; ASSUME that this is supposed to be 'BUSY'. (saves 20-30 ticks on the T42p)
+    ; @todo get rid of sgdt
+    pop     xBX         ; saved TR
+    sub     xSP, xS*2
+    sgdt    [xSP]
+    mov     xAX, xBX
+    and     al, 0F8h                                ; mask away TI and RPL bits, get descriptor offset.
+    add     xAX, [xSP + 2]                          ; eax <- GDTR.address + descriptor offset.
+    and     dword [xAX + 4], ~0200h                 ; clear busy flag (2nd type2 bit)
+    ltr     bx
     add     xSP, xS*2
 
