Index: /trunk/src/VBox/VMM/PGMInternal.h
===================================================================
--- /trunk/src/VBox/VMM/PGMInternal.h	(revision 22932)
+++ /trunk/src/VBox/VMM/PGMInternal.h	(revision 22933)
@@ -2282,5 +2282,5 @@
     bool                            fRamPreAlloc;
     /** Alignment padding. */
-    bool                            afAlignment0[7];
+    bool                            afAlignment0[3];
 
     /*
@@ -2293,11 +2293,11 @@
      */
 
+    /** The host paging mode. (This is what SUPLib reports.) */
+    SUPPAGINGMODE                   enmHostMode;
+
     /** Pointer to the page table entries for the dynamic page mapping area - GCPtr. */
     RCPTRTYPE(PX86PTE)              paDynPageMap32BitPTEsGC;
     /** Pointer to the page table entries for the dynamic page mapping area - GCPtr. */
     RCPTRTYPE(PX86PTEPAE)           paDynPageMapPaePTEsGC;
-
-    /** The host paging mode. (This is what SUPLib reports.) */
-    SUPPAGINGMODE                   enmHostMode;
 
     /** 4 MB page mask; 32 or 36 bits depending on PSE-36 (identical for all VCPUs) */
@@ -2320,6 +2320,8 @@
     /** RC pointer corresponding to PGM::pRomRangesR3. */
     RCPTRTYPE(PPGMROMRANGE)         pRomRangesRC;
+#if HC_ARCH_BITS == 64
     /** Alignment padding. */
     RTRCPTR                         GCPtrPadding2;
+#endif
 
     /** Pointer to the list of MMIO2 ranges - for R3.
@@ -2589,4 +2591,5 @@
 #ifndef IN_TSTVMSTRUCTGC /* HACK */
 AssertCompileMemberAlignment(PGM, paDynPageMap32BitPTEsGC, 8);
+AssertCompileMemberAlignment(PGM, GCPtrMappingFixed, sizeof(RTGCPTR));
 AssertCompileMemberAlignment(PGM, HCPhysInterPD, 8);
 AssertCompileMemberAlignment(PGM, aHCPhysDynPageMapCache, 8);