Index: /trunk/src/VBox/Additions/x11/x11include/libpciaccess-0.10.8/config.h.in =================================================================== --- /trunk/src/VBox/Additions/x11/x11include/libpciaccess-0.10.8/config.h.in (revision 22659) +++ /trunk/src/VBox/Additions/x11/x11include/libpciaccess-0.10.8/config.h.in (revision 22659) @@ -0,0 +1,85 @@ +/* config.h.in. Generated from configure.ac by autoheader. */ + +/* Define to 1 if you have the header file. */ +#undef HAVE_DLFCN_H + +/* Define to 1 if you have the header file. */ +#undef HAVE_INTTYPES_H + +/* Define to 1 if you have the header file. */ +#undef HAVE_MEMORY_H + +/* Use MTRRs on mappings */ +#undef HAVE_MTRR + +/* Have the pci_io.pi_sel.pc_domain member. */ +#undef HAVE_PCI_IO_PC_DOMAIN + +/* Define to 1 if you have the header file. */ +#undef HAVE_STDINT_H + +/* Define to 1 if you have the header file. */ +#undef HAVE_STDLIB_H + +/* Define to 1 if you have the header file. */ +#undef HAVE_STRINGS_H + +/* Define to 1 if you have the header file. */ +#undef HAVE_STRING_H + +/* Define to 1 if you have the header file. */ +#undef HAVE_SYS_STAT_H + +/* Define to 1 if you have the header file. */ +#undef HAVE_SYS_TYPES_H + +/* Define to 1 if you have the header file. */ +#undef HAVE_UNISTD_H + +/* Use zlib to read gzip compressed pci.ids */ +#undef HAVE_ZLIB + +/* Linux ROM read fallback */ +#undef LINUX_ROM + +/* Name of package */ +#undef PACKAGE + +/* Define to the address where bug reports for this package should be sent. */ +#undef PACKAGE_BUGREPORT + +/* Define to the full name of this package. */ +#undef PACKAGE_NAME + +/* Define to the full name and version of this package. */ +#undef PACKAGE_STRING + +/* Define to the one symbol short name of this package. */ +#undef PACKAGE_TARNAME + +/* Define to the version of this package. */ +#undef PACKAGE_VERSION + +/* Major version of this package */ +#undef PACKAGE_VERSION_MAJOR + +/* Minor version of this package */ +#undef PACKAGE_VERSION_MINOR + +/* Patch version of this package */ +#undef PACKAGE_VERSION_PATCHLEVEL + +/* Path to pci.ids */ +#undef PCIIDS_PATH + +/* Define to 1 if you have the ANSI C header files. */ +#undef STDC_HEADERS + +/* Version number of package */ +#undef VERSION + +/* Number of bits in a file offset, on hosts where this is settable. */ +#undef _FILE_OFFSET_BITS + +/* Define for large files, on AIX-style hosts. */ +#undef _LARGE_FILES Index: /trunk/src/VBox/Additions/x11/x11include/libpciaccess-0.10.8/linux_devmem.h =================================================================== --- /trunk/src/VBox/Additions/x11/x11include/libpciaccess-0.10.8/linux_devmem.h (revision 22659) +++ /trunk/src/VBox/Additions/x11/x11include/libpciaccess-0.10.8/linux_devmem.h (revision 22659) @@ -0,0 +1,34 @@ +/* + * (C) Copyright IBM Corporation 2007 + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * IBM AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +/** + * \file linux_devmem.h + * Functions and datastructures that are private to the /dev/mem based + * back-end for pciaccess. + * + * \author Ian Romanick + */ + +extern int pci_device_linux_devmem_read_rom(struct pci_device *dev, + void *buffer); Index: /trunk/src/VBox/Additions/x11/x11include/libpciaccess-0.10.8/pci_tools.h =================================================================== --- /trunk/src/VBox/Additions/x11/x11include/libpciaccess-0.10.8/pci_tools.h (revision 22659) +++ /trunk/src/VBox/Additions/x11/x11include/libpciaccess-0.10.8/pci_tools.h (revision 22659) @@ -0,0 +1,221 @@ +/* + * Copyright 2007 Sun Microsystems, Inc. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, and/or sell copies of the Software, and to permit persons + * to whom the Software is furnished to do so, provided that the above + * copyright notice(s) and this permission notice appear in all copies of + * the Software and that both the above copyright notice(s) and this + * permission notice appear in supporting documentation. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT + * OF THIRD PARTY RIGHTS. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * HOLDERS INCLUDED IN THIS NOTICE BE LIABLE FOR ANY CLAIM, OR ANY SPECIAL + * INDIRECT OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RESULTING + * FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, + * NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION + * WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + * + * Except as contained in this notice, the name of a copyright holder + * shall not be used in advertising or otherwise to promote the sale, use + * or other dealings in this Software without prior written authorization + * of the copyright holder. + */ +#ifndef _SYS_PCI_TOOLS_H +#define _SYS_PCI_TOOLS_H + +#pragma ident "@(#)pci_tools.h 1.4 05/09/28 SMI" + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/* + * Versioning. Have different versions for userland program and drivers, so + * they can all stay in sync with each other. + */ +#define PCITOOL_USER_VERSION 1 +#define PCITOOL_DRVR_VERSION 1 + +/* File suffixes for nexus pcitool nodes. */ +#define PCI_MINOR_REG "reg" +#define PCI_MINOR_INTR "intr" + +/* + * Ioctls for PCI tools. + */ +#define PCITOOL_IOC (('P' << 24) | ('C' << 16) | ('T' << 8)) + +/* Read/write a device on a PCI bus, in physical space. */ +#define PCITOOL_DEVICE_GET_REG (PCITOOL_IOC | 1) +#define PCITOOL_DEVICE_SET_REG (PCITOOL_IOC | 2) + +/* Read/write the PCI nexus bridge, in physical space. */ +#define PCITOOL_NEXUS_GET_REG (PCITOOL_IOC | 3) +#define PCITOOL_NEXUS_SET_REG (PCITOOL_IOC | 4) + +/* Get/set interrupt-CPU mapping for PCI devices. */ +#define PCITOOL_DEVICE_GET_INTR (PCITOOL_IOC | 5) +#define PCITOOL_DEVICE_SET_INTR (PCITOOL_IOC | 6) + +/* Return the number of supported interrupts on a PCI bus. */ +#define PCITOOL_DEVICE_NUM_INTR (PCITOOL_IOC | 7) + + +/* + * This file contains data structures for the pci tool. + */ +#define PCITOOL_CONFIG 0 +#define PCITOOL_BAR0 1 +#define PCITOOL_BAR1 2 +#define PCITOOL_BAR2 3 +#define PCITOOL_BAR3 4 +#define PCITOOL_BAR4 5 +#define PCITOOL_BAR5 6 +#define PCITOOL_ROM 7 + +/* + * Pass this through barnum to signal to use a base addr instead. + * This is for platforms which do not have a way to automatically map + * a selected bank to a base addr. + */ +#define PCITOOL_BASE 0xFF + +/* + * BAR corresponding to space desired. + */ +typedef enum { + config = PCITOOL_CONFIG, + bar0 = PCITOOL_BAR0, + bar1 = PCITOOL_BAR1, + bar2 = PCITOOL_BAR2, + bar3 = PCITOOL_BAR3, + bar4 = PCITOOL_BAR4, + bar5 = PCITOOL_BAR5, + rom = PCITOOL_ROM +} pcitool_bars_t; + + +/* + * PCITOOL error numbers. + */ + +typedef enum { + PCITOOL_SUCCESS = 0x0, + PCITOOL_INVALID_CPUID, + PCITOOL_INVALID_INO, + PCITOOL_PENDING_INTRTIMEOUT, + PCITOOL_REGPROP_NOTWELLFORMED, + PCITOOL_INVALID_ADDRESS, + PCITOOL_NOT_ALIGNED, + PCITOOL_OUT_OF_RANGE, + PCITOOL_END_OF_RANGE, + PCITOOL_ROM_DISABLED, + PCITOOL_ROM_WRITE, + PCITOOL_IO_ERROR, + PCITOOL_INVALID_SIZE +} pcitool_errno_t; + + +/* + * PCITOOL_DEVICE_SET_INTR ioctl data structure to re-assign the interrupts. + */ +typedef struct pcitool_intr_set { + uint16_t user_version; /* Userland program version - to krnl */ + uint16_t drvr_version; /* Driver version - from kernel */ + uint32_t ino; /* interrupt to set - to kernel */ + uint32_t cpu_id; /* to: cpu to set / from: old cpu returned */ + pcitool_errno_t status; /* from kernel */ +} pcitool_intr_set_t; + + +/* + * PCITOOL_DEVICE_GET_INTR ioctl data structure to dump out the + * ino mapping information. + */ + +typedef struct pcitool_intr_dev { + uint32_t dev_inst; /* device instance - from kernel */ + char driver_name[MAXMODCONFNAME]; /* from kernel */ + char path[MAXPATHLEN]; /* device path - from kernel */ +} pcitool_intr_dev_t; + + +typedef struct pcitool_intr_get { + uint16_t user_version; /* Userland program version - to krnl */ + uint16_t drvr_version; /* Driver version - from kernel */ + uint32_t ino; /* interrupt number - to kernel */ + uint8_t num_devs_ret; /* room for this # of devs to be */ + /* returned - to kernel */ + /* # devs returned - from kernel */ + uint8_t num_devs; /* # devs on this ino - from kernel */ + /* intrs enabled for devs if > 0 */ + uint8_t ctlr; /* controller number - from kernel */ + uint32_t cpu_id; /* cpu of interrupt - from kernel */ + pcitool_errno_t status; /* returned status - from kernel */ + pcitool_intr_dev_t dev[1]; /* start of variable device list */ + /* from kernel */ +} pcitool_intr_get_t; + +/* + * Get the size needed to return the number of devices wanted. + * Can't say num_devs - 1 as num_devs may be unsigned. + */ +#define PCITOOL_IGET_SIZE(num_devs) \ + (sizeof (pcitool_intr_get_t) - \ + sizeof (pcitool_intr_dev_t) + \ + (num_devs * sizeof (pcitool_intr_dev_t))) + +/* + * Size and endian fields for acc_attr bitmask. + */ +#define PCITOOL_ACC_ATTR_SIZE_MASK 0x3 +#define PCITOOL_ACC_ATTR_SIZE_1 0x0 +#define PCITOOL_ACC_ATTR_SIZE_2 0x1 +#define PCITOOL_ACC_ATTR_SIZE_4 0x2 +#define PCITOOL_ACC_ATTR_SIZE_8 0x3 +#define PCITOOL_ACC_ATTR_SIZE(x) (1 << (x & PCITOOL_ACC_ATTR_SIZE_MASK)) + +#define PCITOOL_ACC_ATTR_ENDN_MASK 0x100 +#define PCITOOL_ACC_ATTR_ENDN_LTL 0x0 +#define PCITOOL_ACC_ATTR_ENDN_BIG 0x100 +#define PCITOOL_ACC_IS_BIG_ENDIAN(x) (x & PCITOOL_ACC_ATTR_ENDN_BIG) + +/* + * Data structure to read and write to pci device registers. + * This is the argument to the following ioctls: + * PCITOOL_DEVICE_SET/GET_REG + * PCITOOL_NEXUS_SET/GET_REG + */ +typedef struct pcitool_reg { + uint16_t user_version; /* Userland program version - to krnl */ + uint16_t drvr_version; /* Driver version - from kernel */ + uint8_t bus_no; /* pci bus - to kernel */ + uint8_t dev_no; /* pci dev - to kernel */ + uint8_t func_no; /* pci function - to kernel */ + uint8_t barnum; /* bank (DEVCTL_NEXUS_SET/GET_REG) or */ + /* BAR from pcitools_bar_t */ + /* (DEVCTL_DEVICE_SET/GET_REG) */ + /* to kernel */ + uint64_t offset; /* to kernel */ + uint32_t acc_attr; /* access attributes - to kernel */ + uint32_t padding1; /* 8-byte align next uint64_t for X86 */ + uint64_t data; /* to/from kernel, 64-bit alignment */ + uint32_t status; /* from kernel */ + uint32_t padding2; /* 8-byte align next uint64_t for X86 */ + uint64_t phys_addr; /* from kernel, 64-bit alignment */ +} pcitool_reg_t; + + +#ifdef __cplusplus +} +#endif + +#endif /* _SYS_PCI_TOOLS_H */ Index: /trunk/src/VBox/Additions/x11/x11include/libpciaccess-0.10.8/pciaccess.h =================================================================== --- /trunk/src/VBox/Additions/x11/x11include/libpciaccess-0.10.8/pciaccess.h (revision 22659) +++ /trunk/src/VBox/Additions/x11/x11include/libpciaccess-0.10.8/pciaccess.h (revision 22659) @@ -0,0 +1,508 @@ +/* + * (C) Copyright IBM Corporation 2006 + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * IBM AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ +/* + * Copyright (c) 2007 Paulo R. Zanoni, Tiago Vignatti + * + * Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + */ + +/** + * \file pciaccess.h + * + * \author Ian Romanick + */ + +#ifndef PCIACCESS_H +#define PCIACCESS_H + +#include + +#if __GNUC__ >= 3 +#define __deprecated __attribute__((deprecated)) +#else +#define __deprecated +#endif + +typedef uint64_t pciaddr_t; + +struct pci_device; +struct pci_device_iterator; +struct pci_id_match; +struct pci_slot_match; + +#ifdef __cplusplus +extern "C" { +#endif + +int pci_device_has_kernel_driver(struct pci_device *dev); + +int pci_device_is_boot_vga(struct pci_device *dev); + +int pci_device_read_rom(struct pci_device *dev, void *buffer); + +int __deprecated pci_device_map_region(struct pci_device *dev, + unsigned region, int write_enable); + +int __deprecated pci_device_unmap_region(struct pci_device *dev, + unsigned region); + +int pci_device_map_range(struct pci_device *dev, pciaddr_t base, + pciaddr_t size, unsigned map_flags, void **addr); + +int pci_device_unmap_range(struct pci_device *dev, void *memory, + pciaddr_t size); + +int __deprecated pci_device_map_memory_range(struct pci_device *dev, + pciaddr_t base, pciaddr_t size, int write_enable, void **addr); + +int __deprecated pci_device_unmap_memory_range(struct pci_device *dev, + void *memory, pciaddr_t size); + +int pci_device_probe(struct pci_device *dev); + +const struct pci_agp_info *pci_device_get_agp_info(struct pci_device *dev); + +const struct pci_bridge_info *pci_device_get_bridge_info( + struct pci_device *dev); + +const struct pci_pcmcia_bridge_info *pci_device_get_pcmcia_bridge_info( + struct pci_device *dev); + +int pci_device_get_bridge_buses(struct pci_device *dev, int *primary_bus, + int *secondary_bus, int *subordinate_bus); + +int pci_system_init(void); + +void pci_system_init_dev_mem(int fd); + +void pci_system_cleanup(void); + +struct pci_device_iterator *pci_slot_match_iterator_create( + const struct pci_slot_match *match); + +struct pci_device_iterator *pci_id_match_iterator_create( + const struct pci_id_match *match); + +void pci_iterator_destroy(struct pci_device_iterator *iter); + +struct pci_device *pci_device_next(struct pci_device_iterator *iter); + +struct pci_device *pci_device_find_by_slot(uint32_t domain, uint32_t bus, + uint32_t dev, uint32_t func); + +void pci_get_strings(const struct pci_id_match *m, + const char **device_name, const char **vendor_name, + const char **subdevice_name, const char **subvendor_name); +const char *pci_device_get_device_name(const struct pci_device *dev); +const char *pci_device_get_subdevice_name(const struct pci_device *dev); +const char *pci_device_get_vendor_name(const struct pci_device *dev); +const char *pci_device_get_subvendor_name(const struct pci_device *dev); + +void pci_device_enable(struct pci_device *dev); + +int pci_device_cfg_read (struct pci_device *dev, void *data, + pciaddr_t offset, pciaddr_t size, pciaddr_t *bytes_read); +int pci_device_cfg_read_u8 (struct pci_device *dev, uint8_t *data, + pciaddr_t offset); +int pci_device_cfg_read_u16(struct pci_device *dev, uint16_t *data, + pciaddr_t offset); +int pci_device_cfg_read_u32(struct pci_device *dev, uint32_t *data, + pciaddr_t offset); + +int pci_device_cfg_write (struct pci_device *dev, const void *data, + pciaddr_t offset, pciaddr_t size, pciaddr_t *bytes_written); +int pci_device_cfg_write_u8 (struct pci_device *dev, uint8_t data, + pciaddr_t offset); +int pci_device_cfg_write_u16(struct pci_device *dev, uint16_t data, + pciaddr_t offset); +int pci_device_cfg_write_u32(struct pci_device *dev, uint32_t data, + pciaddr_t offset); +int pci_device_cfg_write_bits(struct pci_device *dev, uint32_t mask, + uint32_t data, pciaddr_t offset); + +#ifdef __cplusplus +} +#endif + +/** + * \name Mapping flags passed to \c pci_device_map_range + */ +/*@{*/ +#define PCI_DEV_MAP_FLAG_WRITABLE (1U<<0) +#define PCI_DEV_MAP_FLAG_WRITE_COMBINE (1U<<1) +#define PCI_DEV_MAP_FLAG_CACHABLE (1U<<2) +/*@}*/ + + +#define PCI_MATCH_ANY (~0) + +/** + * Compare two PCI ID values (either vendor or device). This is used + * internally to compare the fields of \c pci_id_match to the fields of + * \c pci_device. + */ +#define PCI_ID_COMPARE(a, b) \ + (((a) == PCI_MATCH_ANY) || ((a) == (b))) + +/** + */ +struct pci_id_match { + /** + * \name Device / vendor matching controls + * + * Control the search based on the device, vendor, subdevice, or subvendor + * IDs. Setting any of these fields to \c PCI_MATCH_ANY will cause the + * field to not be used in the comparison. + */ + /*@{*/ + uint32_t vendor_id; + uint32_t device_id; + uint32_t subvendor_id; + uint32_t subdevice_id; + /*@}*/ + + + /** + * \name Device class matching controls + * + */ + /*@{*/ + uint32_t device_class; + uint32_t device_class_mask; + /*@}*/ + + intptr_t match_data; +}; + + +/** + */ +struct pci_slot_match { + /** + * \name Device slot matching controls + * + * Control the search based on the domain, bus, slot, and function of + * the device. Setting any of these fields to \c PCI_MATCH_ANY will cause + * the field to not be used in the comparison. + */ + /*@{*/ + uint32_t domain; + uint32_t bus; + uint32_t dev; + uint32_t func; + /*@}*/ + + intptr_t match_data; +}; + +/** + * BAR descriptor for a PCI device. + */ +struct pci_mem_region { + /** + * When the region is mapped, this is the pointer to the memory. + * + * This field is \b only set when the deprecated \c pci_device_map_region + * interface is used. Use \c pci_device_map_range instead. + * + * \deprecated + */ + void *memory; + + + /** + * Base physical address of the region within its bus / domain. + * + * \warning + * This address is really only useful to other devices in the same + * domain. It's probably \b not the address applications will ever + * use. + * + * \warning + * Most (all?) platform back-ends leave this field unset. + */ + pciaddr_t bus_addr; + + + /** + * Base physical address of the region from the CPU's point of view. + * + * This address is typically passed to \c pci_device_map_range to create + * a mapping of the region to the CPU's virtual address space. + */ + pciaddr_t base_addr; + + + /** + * Size, in bytes, of the region. + */ + pciaddr_t size; + + + /** + * Is the region I/O ports or memory? + */ + unsigned is_IO:1; + + /** + * Is the memory region prefetchable? + * + * \note + * This can only be set if \c is_IO is not set. + */ + unsigned is_prefetchable:1; + + + /** + * Is the memory at a 64-bit address? + * + * \note + * This can only be set if \c is_IO is not set. + */ + unsigned is_64:1; +}; + + +/** + * PCI device. + * + * Contains all of the information about a particular PCI device. + */ +struct pci_device { + /** + * \name Device bus identification. + * + * Complete bus identification, including domain, of the device. On + * platforms that do not support PCI domains (e.g., 32-bit x86 hardware), + * the domain will always be zero. + */ + /*@{*/ + uint16_t domain; + uint8_t bus; + uint8_t dev; + uint8_t func; + /*@}*/ + + + /** + * \name Vendor / device ID + * + * The vendor ID, device ID, and sub-IDs for the device. + */ + /*@{*/ + uint16_t vendor_id; + uint16_t device_id; + uint16_t subvendor_id; + uint16_t subdevice_id; + /*@}*/ + + /** + * Device's class, subclass, and programming interface packed into a + * single 32-bit value. The class is at bits [23:16], subclass is at + * bits [15:8], and programming interface is at [7:0]. + */ + uint32_t device_class; + + + /** + * Device revision number, as read from the configuration header. + */ + uint8_t revision; + + + /** + * BAR descriptors for the device. + */ + struct pci_mem_region regions[6]; + + + /** + * Size, in bytes, of the device's expansion ROM. + */ + pciaddr_t rom_size; + + + /** + * IRQ associated with the device. If there is no IRQ, this value will + * be -1. + */ + int irq; + + + /** + * Storage for user data. Users of the library can store arbitrary + * data in this pointer. The library will not use it for any purpose. + * It is the user's responsability to free this memory before destroying + * the \c pci_device structure. + */ + intptr_t user_data; + + /** + * Used by the VGA arbiter. Type of resource decoded by the device and + * the file descriptor (/dev/vga_arbiter). */ + int vgaarb_rsrc; +}; + + +/** + * Description of the AGP capability of the device. + * + * \sa pci_device_get_agp_info + */ +struct pci_agp_info { + /** + * Offset of the AGP registers in the devices configuration register + * space. This is generally used so that the offset of the AGP command + * register can be determined. + */ + unsigned config_offset; + + + /** + * \name AGP major / minor version. + */ + /*@{*/ + uint8_t major_version; + uint8_t minor_version; + /*@}*/ + + /** + * Logical OR of the supported AGP rates. For example, a value of 0x07 + * means that the device can support 1x, 2x, and 4x. A value of 0x0c + * means that the device can support 8x and 4x. + */ + uint8_t rates; + + unsigned int fast_writes:1; /**< Are fast-writes supported? */ + unsigned int addr64:1; + unsigned int htrans:1; + unsigned int gart64:1; + unsigned int coherent:1; + unsigned int sideband:1; /**< Is side-band addressing supported? */ + unsigned int isochronus:1; + + uint8_t async_req_size; + uint8_t calibration_cycle_timing; + uint8_t max_requests; +}; + +/** + * Description of a PCI-to-PCI bridge device. + * + * \sa pci_device_get_bridge_info + */ +struct pci_bridge_info { + uint8_t primary_bus; + uint8_t secondary_bus; + uint8_t subordinate_bus; + uint8_t secondary_latency_timer; + + uint8_t io_type; + uint8_t mem_type; + uint8_t prefetch_mem_type; + + uint16_t secondary_status; + uint16_t bridge_control; + + uint32_t io_base; + uint32_t io_limit; + + uint32_t mem_base; + uint32_t mem_limit; + + uint64_t prefetch_mem_base; + uint64_t prefetch_mem_limit; +}; + +/** + * Description of a PCI-to-PCMCIA bridge device. + * + * \sa pci_device_get_pcmcia_bridge_info + */ +struct pci_pcmcia_bridge_info { + uint8_t primary_bus; + uint8_t card_bus; + uint8_t subordinate_bus; + uint8_t cardbus_latency_timer; + + uint16_t secondary_status; + uint16_t bridge_control; + + struct { + uint32_t base; + uint32_t limit; + } io[2]; + + struct { + uint32_t base; + uint32_t limit; + } mem[2]; + +}; + + +/** + * VGA Arbiter definitions, functions and related. + */ + +/* Legacy VGA regions */ +#define VGA_ARB_RSRC_NONE 0x00 +#define VGA_ARB_RSRC_LEGACY_IO 0x01 +#define VGA_ARB_RSRC_LEGACY_MEM 0x02 +/* Non-legacy access */ +#define VGA_ARB_RSRC_NORMAL_IO 0x04 +#define VGA_ARB_RSRC_NORMAL_MEM 0x08 + +int pci_device_vgaarb_init (void); +void pci_device_vgaarb_fini (void); +int pci_device_vgaarb_set_target (struct pci_device *dev); +/* use the targetted device */ +int pci_device_vgaarb_decodes (int new_vga_rsrc); +int pci_device_vgaarb_lock (void); +int pci_device_vgaarb_trylock (void); +int pci_device_vgaarb_unlock (void); +/* return the current device count + resource decodes for the device */ +int pci_device_vgaarb_get_info (struct pci_device *dev, int *vga_count, int *rsrc_decodes); + +#endif /* PCIACCESS_H */ Index: /trunk/src/VBox/Additions/x11/x11include/libpciaccess-0.10.8/pciaccess_private.h =================================================================== --- /trunk/src/VBox/Additions/x11/x11include/libpciaccess-0.10.8/pciaccess_private.h (revision 22659) +++ /trunk/src/VBox/Additions/x11/x11include/libpciaccess-0.10.8/pciaccess_private.h (revision 22659) @@ -0,0 +1,148 @@ +/* + * (C) Copyright IBM Corporation 2006 + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * IBM AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +/** + * \file pciaccess_private.h + * Functions and datastructures that are private to the pciaccess library. + * + * \author Ian Romanick + */ + +#if defined(__GNUC__) && (__GNUC__ >= 4) +# define _pci_hidden __attribute__((visibility("hidden"))) +#elif defined(__SUNPRO_C) && (__SUNPRO_C >= 0x550) +# define _pci_hidden __hidden +#else /* not gcc >= 4 and not Sun Studio >= 8 */ +# define _pci_hidden +#endif /* GNUC >= 4 */ + +struct pci_device_mapping; + +int pci_fill_capabilities_generic( struct pci_device * dev ); +int pci_device_generic_unmap_range(struct pci_device *dev, + struct pci_device_mapping *map); + +struct pci_system_methods { + void (*destroy)( void ); + void (*destroy_device)( struct pci_device * dev ); + int (*read_rom)( struct pci_device * dev, void * buffer ); + int (*probe)( struct pci_device * dev ); + int (*map_range)(struct pci_device *dev, struct pci_device_mapping *map); + int (*unmap_range)(struct pci_device * dev, + struct pci_device_mapping *map); + + int (*read)(struct pci_device * dev, void * data, pciaddr_t offset, + pciaddr_t size, pciaddr_t * bytes_read ); + + int (*write)(struct pci_device * dev, const void * data, pciaddr_t offset, + pciaddr_t size, pciaddr_t * bytes_written ); + + int (*fill_capabilities)( struct pci_device * dev ); + void (*enable)( struct pci_device *dev ); + int (*boot_vga)( struct pci_device *dev ); + int (*has_kernel_driver)( struct pci_device *dev ); +}; + +struct pci_device_mapping { + pciaddr_t base; + pciaddr_t size; + unsigned region; + unsigned flags; + void *memory; +}; + +struct pci_device_private { + struct pci_device base; + const char * device_string; + + uint8_t header_type; + + /** + * \name PCI Capabilities + */ + /*@{*/ + const struct pci_agp_info * agp; /**< AGP capability information. */ + /*@}*/ + + /** + * Base address of the device's expansion ROM. + */ + pciaddr_t rom_base; + + /** + * \name Bridge information. + */ + /*@{*/ + union { + struct pci_bridge_info * pci; + struct pci_pcmcia_bridge_info * pcmcia; + } bridge; + /*@}*/ + + /** + * \name Mappings active on this device. + */ + /*@{*/ + struct pci_device_mapping *mappings; + unsigned num_mappings; + /*@}*/ +}; + + +/** + * Base type for tracking PCI subsystem information. + */ +struct pci_system { + /** + * Platform dependent implementations of specific API routines. + */ + const struct pci_system_methods * methods; + + /** + * Number of known devices in the system. + */ + size_t num_devices; + + /** + * Array of known devices. + */ + struct pci_device_private * devices; + +#ifdef HAVE_MTRR + int mtrr_fd; +#endif + int vgaarb_fd; + int vga_count; + struct pci_device *vga_target; + struct pci_device *vga_default_dev; +}; + +extern struct pci_system * pci_sys; + +extern int pci_system_linux_sysfs_create( void ); +extern int pci_system_freebsd_create( void ); +extern int pci_system_netbsd_create( void ); +extern int pci_system_openbsd_create( void ); +extern void pci_system_openbsd_init_dev_mem( int ); +extern int pci_system_solx_devfs_create( void );