Index: /trunk/include/VBox/pdmapi.h
===================================================================
--- /trunk/include/VBox/pdmapi.h	(revision 20036)
+++ /trunk/include/VBox/pdmapi.h	(revision 20037)
@@ -50,4 +50,6 @@
 VMMDECL(int)    PDMApicSetBase(PVM pVM, uint64_t u64Base);
 VMMDECL(int)    PDMApicGetBase(PVM pVM, uint64_t *pu64Base);
+VMMDECL(int)    PDMApicSetTPREx(PVMCPU pVCpu, uint8_t u8TPR, bool fMMIOFormat);
+VMMDECL(int)    PDMApicGetTPREx(PVMCPU pVCpu, uint8_t *pu8TPR, bool fMMIOFormat, bool *pfPending);
 VMMDECL(int)    PDMApicSetTPR(PVMCPU pVCpu, uint8_t u8TPR);
 VMMDECL(int)    PDMApicGetTPR(PVMCPU pVCpu, uint8_t *pu8TPR, bool *pfPending);
Index: /trunk/include/VBox/pdmdev.h
===================================================================
--- /trunk/include/VBox/pdmdev.h	(revision 20036)
+++ /trunk/include/VBox/pdmdev.h	(revision 20037)
@@ -985,6 +985,7 @@
      * @param   idCpu           VCPU id
      * @param   u8TPR           The new TPR.
-     */
-    DECLR3CALLBACKMEMBER(void, pfnSetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
+     * @param   fMMIOFormat     Update as if MMIO write to ApicBase + 0x80
+     */
+    DECLR3CALLBACKMEMBER(void, pfnSetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR, bool fMMIOFormat));
 
     /**
@@ -994,6 +995,7 @@
      * @param   pDevIns         Device instance of the APIC.
      * @param   idCpu           VCPU id
-     */
-    DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu));
+     * @param   fMMIOFormat     Return as if MMIO read from ApicBase + 0x80
+     */
+    DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, bool fMMIOFormat));
 
     /**
Index: /trunk/src/VBox/Devices/PC/DevAPIC.cpp
===================================================================
--- /trunk/src/VBox/Devices/PC/DevAPIC.cpp	(revision 20036)
+++ /trunk/src/VBox/Devices/PC/DevAPIC.cpp	(revision 20037)
@@ -438,6 +438,6 @@
 PDMBOTHCBDECL(void) apicSetBase(PPDMDEVINS pDevIns, uint64_t val);
 PDMBOTHCBDECL(uint64_t) apicGetBase(PPDMDEVINS pDevIns);
-PDMBOTHCBDECL(void) apicSetTPR(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t val);
-PDMBOTHCBDECL(uint8_t) apicGetTPR(PPDMDEVINS pDevIns, VMCPUID idCpu);
+PDMBOTHCBDECL(void) apicSetTPR(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t val, bool fMMIOFormat);
+PDMBOTHCBDECL(uint8_t) apicGetTPR(PPDMDEVINS pDevIns, VMCPUID idCpu, bool fMMIOFormat);
 PDMBOTHCBDECL(int)  apicBusDeliverCallback(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode,
                                            uint8_t u8DeliveryMode, uint8_t iVector, uint8_t u8Polarity,
@@ -670,18 +670,31 @@
 }
 
-PDMBOTHCBDECL(void) apicSetTPR(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t val)
+PDMBOTHCBDECL(void) apicSetTPR(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t val, bool fMMIOFormat)
 {
     APICDeviceInfo *dev = PDMINS_2_DATA(pDevIns, APICDeviceInfo *);
     APICState *s = getLapicById(dev, idCpu);
-    LogFlow(("apicSetTPR: val=%#x (trp %#x -> %#x)\n", val, s->tpr, (val & 0x0f) << 4));
-    apic_update_tpr(dev, s, (val & 0x0f) << 4);
-}
-
-PDMBOTHCBDECL(uint8_t) apicGetTPR(PPDMDEVINS pDevIns, VMCPUID idCpu)
+
+    if (!fMMIOFormat)
+        val = (val & 0x0f) << 4;
+
+    LogFlow(("apicSetTPR: val=%#x (trp %#x -> %#x)\n", val, s->tpr, val));
+    apic_update_tpr(dev, s, val);
+}
+
+PDMBOTHCBDECL(uint8_t) apicGetTPR(PPDMDEVINS pDevIns, VMCPUID idCpu, bool fMMIOFormat)
 {
     APICDeviceInfo *dev = PDMINS_2_DATA(pDevIns, APICDeviceInfo *);
     APICState *s = getLapicById(dev, idCpu);
-    Log2(("apicGetTPR: returns %#x\n", s->tpr >> 4));
-    return s->tpr >> 4;
+
+    if (fMMIOFormat)
+    {
+        Log2(("apicGetTPR: returns %#x\n", s->tpr));
+        return s->tpr;
+    }
+    else
+    {
+        Log2(("apicGetTPR: returns %#x\n", s->tpr >> 4));
+        return s->tpr >> 4;
+    }
 }
 
Index: /trunk/src/VBox/VMM/PDMInternal.h
===================================================================
--- /trunk/src/VBox/VMM/PDMInternal.h	(revision 20036)
+++ /trunk/src/VBox/VMM/PDMInternal.h	(revision 20037)
@@ -420,7 +420,7 @@
     DECLR3CALLBACKMEMBER(uint64_t,  pfnGetBaseR3,(PPDMDEVINS pDevIns));
     /** @copydoc PDMAPICREG::pfnSetTPRR3 */
-    DECLR3CALLBACKMEMBER(void,      pfnSetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
+    DECLR3CALLBACKMEMBER(void,      pfnSetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR, bool fMMIOFormat));
     /** @copydoc PDMAPICREG::pfnGetTPRR3 */
-    DECLR3CALLBACKMEMBER(uint8_t,   pfnGetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu));
+    DECLR3CALLBACKMEMBER(uint8_t,   pfnGetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, bool fMMIOFormat));
     /** @copydoc PDMAPICREG::pfnWriteMSRR3 */
     DECLR3CALLBACKMEMBER(int,       pfnWriteMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
@@ -442,7 +442,7 @@
     DECLR0CALLBACKMEMBER(uint64_t,  pfnGetBaseR0,(PPDMDEVINS pDevIns));
     /** @copydoc PDMAPICREG::pfnSetTPRR3 */
-    DECLR0CALLBACKMEMBER(void,      pfnSetTPRR0,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
+    DECLR0CALLBACKMEMBER(void,      pfnSetTPRR0,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR, bool fMMIOFormat));
     /** @copydoc PDMAPICREG::pfnGetTPRR3 */
-    DECLR0CALLBACKMEMBER(uint8_t,   pfnGetTPRR0,(PPDMDEVINS pDevIns, VMCPUID idCpu));
+    DECLR0CALLBACKMEMBER(uint8_t,   pfnGetTPRR0,(PPDMDEVINS pDevIns, VMCPUID idCpu, bool fMMIOFormat));
      /** @copydoc PDMAPICREG::pfnWriteMSRR3 */
     DECLR0CALLBACKMEMBER(uint32_t,  pfnWriteMSRR0, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
@@ -464,7 +464,7 @@
     DECLRCCALLBACKMEMBER(uint64_t,  pfnGetBaseRC,(PPDMDEVINS pDevIns));
     /** @copydoc PDMAPICREG::pfnSetTPRR3 */
-    DECLRCCALLBACKMEMBER(void,      pfnSetTPRRC,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
+    DECLRCCALLBACKMEMBER(void,      pfnSetTPRRC,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR, bool fMMIOFormat));
     /** @copydoc PDMAPICREG::pfnGetTPRR3 */
-    DECLRCCALLBACKMEMBER(uint8_t,   pfnGetTPRRC,(PPDMDEVINS pDevIns, VMCPUID idCpu));
+    DECLRCCALLBACKMEMBER(uint8_t,   pfnGetTPRRC,(PPDMDEVINS pDevIns, VMCPUID idCpu, bool fMMIOFormat));
     /** @copydoc PDMAPICREG::pfnWriteMSRR3 */
     DECLRCCALLBACKMEMBER(uint32_t,  pfnWriteMSRRC, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
Index: /trunk/src/VBox/VMM/VMMAll/PDMAll.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMAll/PDMAll.cpp	(revision 20036)
+++ /trunk/src/VBox/VMM/VMMAll/PDMAll.cpp	(revision 20037)
@@ -223,21 +223,60 @@
 
 /**
- * Set the TPR (task priority register?).
+ * Set the TPR (task priority register).
  *
  * @returns VBox status code.
  * @param   pVCpu           VMCPU handle.
  * @param   u8TPR           The new TPR.
+ * @param   fMMIOFormat     Update as if MMIO write to ApicBase + 0x80
+ */
+VMMDECL(int) PDMApicSetTPREx(PVMCPU pVCpu, uint8_t u8TPR, bool fMMIOFormat)
+{
+    PVM pVM = pVCpu->CTX_SUFF(pVM);
+    if (pVM->pdm.s.Apic.CTX_SUFF(pDevIns))
+    {
+        Assert(pVM->pdm.s.Apic.CTX_SUFF(pfnSetTPR));
+        pdmLock(pVM);
+        pVM->pdm.s.Apic.CTX_SUFF(pfnSetTPR)(pVM->pdm.s.Apic.CTX_SUFF(pDevIns), pVCpu->idCpu, u8TPR, fMMIOFormat);
+        pdmUnlock(pVM);
+        return VINF_SUCCESS;
+    }
+    return VERR_PDM_NO_APIC_INSTANCE;
+}
+
+/**
+ * Set the TPR (task priority register).
+ *
+ * @returns VBox status code.
+ * @param   pVCpu           VMCPU handle.
+ * @param   u8TPR           The new TPR.
  */
 VMMDECL(int) PDMApicSetTPR(PVMCPU pVCpu, uint8_t u8TPR)
 {
+    return PDMApicSetTPREx(pVCpu, u8TPR, false /* TPR only */);
+}
+
+/**
+ * Get the TPR (task priority register).
+ *
+ * @returns The current TPR.
+ * @param   pVCpu           VMCPU handle.
+ * @param   pu8TPR          Where to store the TRP.
+ * @param   fMMIOFormat     Return as if MMIO read from ApicBase + 0x80
+ * @param   pfPending       Pending interrupt state (out).
+*/
+VMMDECL(int) PDMApicGetTPREx(PVMCPU pVCpu, uint8_t *pu8TPR, bool fMMIOFormat, bool *pfPending)
+{
     PVM pVM = pVCpu->CTX_SUFF(pVM);
     if (pVM->pdm.s.Apic.CTX_SUFF(pDevIns))
     {
-        Assert(pVM->pdm.s.Apic.CTX_SUFF(pfnSetTPR));
-        pdmLock(pVM);
-        pVM->pdm.s.Apic.CTX_SUFF(pfnSetTPR)(pVM->pdm.s.Apic.CTX_SUFF(pDevIns), pVCpu->idCpu, u8TPR);
-        pdmUnlock(pVM);
-        return VINF_SUCCESS;
-    }
+        Assert(pVM->pdm.s.Apic.CTX_SUFF(pfnGetTPR));
+        pdmLock(pVM);
+        *pu8TPR = pVM->pdm.s.Apic.CTX_SUFF(pfnGetTPR)(pVM->pdm.s.Apic.CTX_SUFF(pDevIns), pVCpu->idCpu, fMMIOFormat);
+        if (pfPending)
+            *pfPending = pVM->pdm.s.Apic.CTX_SUFF(pfnHasPendingIrq)(pVM->pdm.s.Apic.CTX_SUFF(pDevIns));
+        pdmUnlock(pVM);
+        return VINF_SUCCESS;
+    }
+    *pu8TPR = 0;
     return VERR_PDM_NO_APIC_INSTANCE;
 }
@@ -254,17 +293,5 @@
 VMMDECL(int) PDMApicGetTPR(PVMCPU pVCpu, uint8_t *pu8TPR, bool *pfPending)
 {
-    PVM pVM = pVCpu->CTX_SUFF(pVM);
-    if (pVM->pdm.s.Apic.CTX_SUFF(pDevIns))
-    {
-        Assert(pVM->pdm.s.Apic.CTX_SUFF(pfnGetTPR));
-        pdmLock(pVM);
-        *pu8TPR = pVM->pdm.s.Apic.CTX_SUFF(pfnGetTPR)(pVM->pdm.s.Apic.CTX_SUFF(pDevIns), pVCpu->idCpu);
-        if (pfPending)
-            *pfPending = pVM->pdm.s.Apic.CTX_SUFF(pfnHasPendingIrq)(pVM->pdm.s.Apic.CTX_SUFF(pDevIns));
-        pdmUnlock(pVM);
-        return VINF_SUCCESS;
-    }
-    *pu8TPR = 0;
-    return VERR_PDM_NO_APIC_INSTANCE;
+    return PDMApicGetTPREx(pVCpu, pu8TPR, false /* TPR only */, pfPending);
 }