Index: /trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp	(revision 20006)
+++ /trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp	(revision 20007)
@@ -431,4 +431,7 @@
 #endif /* HWACCM_VTX_WITH_VPID */
 
+            if (PDMHasIoApic(pVM))
+                val |= VMX_VMCS_CTRL_PROC_EXEC2_VIRT_APIC;
+            
             /* Mask away the bits that the CPU doesn't support */
             /** @todo make sure they don't conflict with the above requirements. */
@@ -2484,9 +2487,9 @@
                 TRPMSetFaultAddress(pVCpu, exitQualification);
 
-                /* Shortcut for APIC TPR reads and writes; 32 bits guests only */
+                /* Shortcut for APIC TPR reads and writes. */
                 if (    (exitQualification & 0xfff) == 0x080
                     &&  !(errCode & X86_TRAP_PF_P)  /* not present */
                     &&  fSetupTPRCaching
-                    &&  !CPUMIsGuestInLongModeEx(pCtx))
+                    &&  (pVM->hwaccm.s.vmx.msr.vmx_proc_ctls2.n.allowed1 & VMX_VMCS_CTRL_PROC_EXEC2_VIRT_APIC))
                 {
                     RTGCPHYS GCPhysApicBase, GCPhys;
@@ -2499,8 +2502,4 @@
                     {
                         Log(("Enable VT-x virtual APIC access filtering\n"));
-                        pVCpu->hwaccm.s.vmx.proc_ctls2 |= VMX_VMCS_CTRL_PROC_EXEC2_VIRT_APIC;
-                        rc = VMXWriteVMCS(VMX_VMCS_CTRL_PROC_EXEC_CONTROLS2, pVCpu->hwaccm.s.vmx.proc_ctls2);
-                        AssertRC(rc);
-
                         rc = IOMMMIOMapMMIOHCPage(pVM, GCPhysApicBase, pVM->hwaccm.s.vmx.pAPICPhys, X86_PTE_RW | X86_PTE_P);
                         AssertRC(rc);
@@ -2966,9 +2965,9 @@
         }
         else {
-            /* Shortcut for APIC TPR reads and writes; 32 bits guests only */
+            /* Shortcut for APIC TPR reads and writes. */
             if (    (GCPhys & 0xfff) == 0x080
                 &&  GCPhys > 0x1000000   /* to skip VGA frame buffer accesses */
-                &&  !CPUMIsGuestInLongModeEx(pCtx)
-                &&  fSetupTPRCaching)
+                &&  fSetupTPRCaching
+                &&  (pVM->hwaccm.s.vmx.msr.vmx_proc_ctls2.n.allowed1 & VMX_VMCS_CTRL_PROC_EXEC2_VIRT_APIC))
             {
                 RTGCPHYS GCPhysApicBase;
@@ -2978,8 +2977,4 @@
                 {
                     Log(("Enable VT-x virtual APIC access filtering\n"));
-                    pVCpu->hwaccm.s.vmx.proc_ctls2 |= VMX_VMCS_CTRL_PROC_EXEC2_VIRT_APIC;
-                    rc = VMXWriteVMCS(VMX_VMCS_CTRL_PROC_EXEC_CONTROLS2, pVCpu->hwaccm.s.vmx.proc_ctls2);
-                    AssertRC(rc);
-
                     rc = IOMMMIOMapMMIOHCPage(pVM, GCPhysApicBase, pVM->hwaccm.s.vmx.pAPICPhys, X86_PTE_RW | X86_PTE_P);
                     AssertRC(rc);
