VirtualBox

Changeset 20001 in vbox


Ignore:
Timestamp:
May 25, 2009 1:59:29 PM (15 years ago)
Author:
vboxsync
Message:

Cleaned up PDMGet/SetTPR.

Location:
trunk
Files:
8 edited

Legend:

Unmodified
Added
Removed

  • trunk/include/VBox/pdmapi.h

    r19995 r20001  
    5050VMMDECL(int)    PDMApicSetBase(PVM pVM, uint64_t u64Base);
    5151VMMDECL(int)    PDMApicGetBase(PVM pVM, uint64_t *pu64Base);
    52 VMMDECL(int)    PDMApicSetTPR(PVM pVM, uint8_t u8TPR);
    53 VMMDECL(int)    PDMApicGetTPR(PVM pVM, uint8_t *pu8TPR, bool *pfPending);
     52VMMDECL(int)    PDMApicSetTPR(PVMCPU pVCpu, uint8_t u8TPR);
     53VMMDECL(int)    PDMApicGetTPR(PVMCPU pVCpu, uint8_t *pu8TPR, bool *pfPending);
    5454VMMDECL(int)    PDMApicWriteMSR(PVM pVM, VMCPUID iCpu, uint32_t u32Reg, uint64_t u64Value);
    5555VMMDECL(int)    PDMApicReadMSR(PVM pVM, VMCPUID iCpu, uint32_t u32Reg, uint64_t *pu64Value);

  • trunk/include/VBox/pdmdev.h

    r19475 r20001  
    983983     *
    984984     * @param   pDevIns         Device instance of the APIC.
     985     * @param   idCpu           VCPU id
    985986     * @param   u8TPR           The new TPR.
    986987     */
    987     DECLR3CALLBACKMEMBER(void, pfnSetTPRR3,(PPDMDEVINS pDevIns, uint8_t u8TPR));
     988    DECLR3CALLBACKMEMBER(void, pfnSetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
    988989
    989990    /**
    … …  
    992993     * @returns The current TPR.
    993994     * @param   pDevIns         Device instance of the APIC.
    994      * @param   pfPending       Pending interrupt state (out).
    995      */
    996     DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRR3,(PPDMDEVINS pDevIns));
     995     * @param   idCpu           VCPU id
     996     */
     997    DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu));
    997998
    998999    /**

  • trunk/src/VBox/Devices/PC/DevAPIC.cpp

    r19787 r20001  
    438438PDMBOTHCBDECL(void) apicSetBase(PPDMDEVINS pDevIns, uint64_t val);
    439439PDMBOTHCBDECL(uint64_t) apicGetBase(PPDMDEVINS pDevIns);
    440 PDMBOTHCBDECL(void) apicSetTPR(PPDMDEVINS pDevIns, uint8_t val);
    441 PDMBOTHCBDECL(uint8_t) apicGetTPR(PPDMDEVINS pDevIns);
     440PDMBOTHCBDECL(void) apicSetTPR(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t val);
     441PDMBOTHCBDECL(uint8_t) apicGetTPR(PPDMDEVINS pDevIns, VMCPUID idCpu);
    442442PDMBOTHCBDECL(int)  apicBusDeliverCallback(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode,
    443443                                           uint8_t u8DeliveryMode, uint8_t iVector, uint8_t u8Polarity,
    … …  
    670670}
    671671
    672 PDMBOTHCBDECL(void) apicSetTPR(PPDMDEVINS pDevIns, uint8_t val)
     672PDMBOTHCBDECL(void) apicSetTPR(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t val)
    673673{
    674674    APICDeviceInfo *dev = PDMINS_2_DATA(pDevIns, APICDeviceInfo *);
    675     APICState *s = getLapic(dev);
     675    APICState *s = getLapicById(dev, idCpu);
    676676    LogFlow(("apicSetTPR: val=%#x (trp %#x -> %#x)\n", val, s->tpr, (val & 0x0f) << 4));
    677677    apic_update_tpr(dev, s, (val & 0x0f) << 4);
    678678}
    679679
    680 PDMBOTHCBDECL(uint8_t) apicGetTPR(PPDMDEVINS pDevIns)
     680PDMBOTHCBDECL(uint8_t) apicGetTPR(PPDMDEVINS pDevIns, VMCPUID idCpu)
    681681{
    682682    APICDeviceInfo *dev = PDMINS_2_DATA(pDevIns, APICDeviceInfo *);
    683     APICState *s = getLapic(dev);
     683    APICState *s = getLapicById(dev, idCpu);
    684684    Log2(("apicGetTPR: returns %#x\n", s->tpr >> 4));
    685685    return s->tpr >> 4;
    … …  
    23682368    /*
    23692369     * Register the MMIO range.
    2370      * @todo: may need to rethink for cases when different LAPICs mapped to different address
    2371      *        (see IA32_APIC_BASE_MSR)
    23722370     */
    23732371    rc = PDMDevHlpMMIORegister(pDevIns, LAPIC_BASE(pThis)->apicbase & ~0xfff, 0x1000, pThis,

  • trunk/src/VBox/VMM/PDMInternal.h

    r19785 r20001  
    409409    DECLR3CALLBACKMEMBER(uint64_t,  pfnGetBaseR3,(PPDMDEVINS pDevIns));
    410410    /** @copydoc PDMAPICREG::pfnSetTPRR3 */
    411     DECLR3CALLBACKMEMBER(void,      pfnSetTPRR3,(PPDMDEVINS pDevIns, uint8_t u8TPR));
     411    DECLR3CALLBACKMEMBER(void,      pfnSetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
    412412    /** @copydoc PDMAPICREG::pfnGetTPRR3 */
    413     DECLR3CALLBACKMEMBER(uint8_t,   pfnGetTPRR3,(PPDMDEVINS pDevIns));
     413    DECLR3CALLBACKMEMBER(uint8_t,   pfnGetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu));
    414414    /** @copydoc PDMAPICREG::pfnWriteMSRR3 */
    415415    DECLR3CALLBACKMEMBER(int,       pfnWriteMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
    … …  
    431431    DECLR0CALLBACKMEMBER(uint64_t,  pfnGetBaseR0,(PPDMDEVINS pDevIns));
    432432    /** @copydoc PDMAPICREG::pfnSetTPRR3 */
    433     DECLR0CALLBACKMEMBER(void,      pfnSetTPRR0,(PPDMDEVINS pDevIns, uint8_t u8TPR));
     433    DECLR0CALLBACKMEMBER(void,      pfnSetTPRR0,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
    434434    /** @copydoc PDMAPICREG::pfnGetTPRR3 */
    435     DECLR0CALLBACKMEMBER(uint8_t,   pfnGetTPRR0,(PPDMDEVINS pDevIns));
     435    DECLR0CALLBACKMEMBER(uint8_t,   pfnGetTPRR0,(PPDMDEVINS pDevIns, VMCPUID idCpu));
    436436     /** @copydoc PDMAPICREG::pfnWriteMSRR3 */
    437437    DECLR0CALLBACKMEMBER(uint32_t,  pfnWriteMSRR0, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
    … …  
    453453    DECLRCCALLBACKMEMBER(uint64_t,  pfnGetBaseRC,(PPDMDEVINS pDevIns));
    454454    /** @copydoc PDMAPICREG::pfnSetTPRR3 */
    455     DECLRCCALLBACKMEMBER(void,      pfnSetTPRRC,(PPDMDEVINS pDevIns, uint8_t u8TPR));
     455    DECLRCCALLBACKMEMBER(void,      pfnSetTPRRC,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
    456456    /** @copydoc PDMAPICREG::pfnGetTPRR3 */
    457     DECLRCCALLBACKMEMBER(uint8_t,   pfnGetTPRRC,(PPDMDEVINS pDevIns));
     457    DECLRCCALLBACKMEMBER(uint8_t,   pfnGetTPRRC,(PPDMDEVINS pDevIns, VMCPUID idCpu));
    458458    /** @copydoc PDMAPICREG::pfnWriteMSRR3 */
    459459    DECLRCCALLBACKMEMBER(uint32_t,  pfnWriteMSRRC, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));

  • trunk/src/VBox/VMM/VMMAll/EMAll.cpp

    r19992 r20001  
    19941994    {
    19951995        val64 = 0;
    1996         rc = PDMApicGetTPR(pVM, (uint8_t *)&val64, NULL);
     1996        rc = PDMApicGetTPR(pVCpu, (uint8_t *)&val64, NULL);
    19971997        AssertMsgRCReturn(rc, ("PDMApicGetTPR failed\n"), VERR_EM_INTERPRETER);
    19981998    }
    … …  
    21712171
    21722172    case USE_REG_CR8:
    2173         return PDMApicSetTPR(pVM, val);
     2173        return PDMApicSetTPR(pVCpu, val);
    21742174
    21752175    default:

  • trunk/src/VBox/VMM/VMMAll/PDMAll.cpp

    r19995 r20001  
    226226 *
    227227 * @returns VBox status code.
    228  * @param   pVM             VM handle.
     228 * @param   pVCpu           VMCPU handle.
    229229 * @param   u8TPR           The new TPR.
    230230 */
    231 VMMDECL(int) PDMApicSetTPR(PVM pVM, uint8_t u8TPR)
    232 {
     231VMMDECL(int) PDMApicSetTPR(PVMCPU pVCpu, uint8_t u8TPR)
     232{
     233    PVM pVM = pVCpu->CTX_SUFF(pVM);
    233234    if (pVM->pdm.s.Apic.CTX_SUFF(pDevIns))
    234235    {
    235236        Assert(pVM->pdm.s.Apic.CTX_SUFF(pfnSetTPR));
    236237        pdmLock(pVM);
    237         pVM->pdm.s.Apic.CTX_SUFF(pfnSetTPR)(pVM->pdm.s.Apic.CTX_SUFF(pDevIns), u8TPR);
     238        pVM->pdm.s.Apic.CTX_SUFF(pfnSetTPR)(pVM->pdm.s.Apic.CTX_SUFF(pDevIns), pVCpu->idCpu, u8TPR);
    238239        pdmUnlock(pVM);
    239240        return VINF_SUCCESS;
    … …  
    247248 *
    248249 * @returns The current TPR.
    249  * @param   pVM             VM handle.
     250 * @param   pVCpu           VMCPU handle.
    250251 * @param   pu8TPR          Where to store the TRP.
    251252 * @param   pfPending       Pending interrupt state (out).
    252253*/
    253 VMMDECL(int) PDMApicGetTPR(PVM pVM, uint8_t *pu8TPR, bool *pfPending)
    254 {
     254VMMDECL(int) PDMApicGetTPR(PVMCPU pVCpu, uint8_t *pu8TPR, bool *pfPending)
     255{
     256    PVM pVM = pVCpu->CTX_SUFF(pVM);
    255257    if (pVM->pdm.s.Apic.CTX_SUFF(pDevIns))
    256258    {
    257259        Assert(pVM->pdm.s.Apic.CTX_SUFF(pfnGetTPR));
    258260        pdmLock(pVM);
    259         *pu8TPR = pVM->pdm.s.Apic.CTX_SUFF(pfnGetTPR)(pVM->pdm.s.Apic.CTX_SUFF(pDevIns));
     261        *pu8TPR = pVM->pdm.s.Apic.CTX_SUFF(pfnGetTPR)(pVM->pdm.s.Apic.CTX_SUFF(pDevIns), pVCpu->idCpu);
    260262        if (pfPending)
    261263            *pfPending = pVM->pdm.s.Apic.CTX_SUFF(pfnHasPendingIrq)(pVM->pdm.s.Apic.CTX_SUFF(pDevIns));

  • trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp

    r19992 r20001  
    947947
    948948        /* TPR caching in CR8 */
    949         int rc = PDMApicGetTPR(pVM, &u8LastVTPR, &fPending);
     949        int rc = PDMApicGetTPR(pVCpu, &u8LastVTPR, &fPending);
    950950        AssertRC(rc);
    951951        pVMCB->ctrl.IntCtrl.n.u8VTPR = u8LastVTPR;
    … …  
    13401340    if (fSyncTPR)
    13411341    {
    1342         rc = PDMApicSetTPR(pVM, pVMCB->ctrl.IntCtrl.n.u8VTPR);
     1342        rc = PDMApicSetTPR(pVCpu, pVMCB->ctrl.IntCtrl.n.u8VTPR);
    13431343        AssertRC(rc);
    13441344    }

  • trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp

    r20000 r20001  
    21812181        bool    fPending;
    21822182
    2183         int rc = PDMApicGetTPR(pVM, &u8TPR, &fPending);
     2183        int rc = PDMApicGetTPR(pVCpu, &u8TPR, &fPending);
    21842184        AssertRC(rc);
    21852185        /* The TPR can be found at offset 0x80 in the APIC mmio page. */
    … …  
    23842384    if (fSyncTPR)
    23852385    {
    2386         rc = PDMApicSetTPR(pVM, pVCpu->hwaccm.s.vmx.pVAPIC[0x80] >> 4);
     2386        rc = PDMApicSetTPR(pVCpu, pVCpu->hwaccm.s.vmx.pVAPIC[0x80] >> 4);
    23872387        AssertRC(rc);
    23882388    }
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