VirtualBox

Changeset 16317 in vbox


Ignore:
Timestamp:
Jan 28, 2009 2:42:00 PM (16 years ago)
Author:
vboxsync
Message:

Moved Map- and UnmapCR3 to Bth as they affect both guest and shadow structures.

Location:
trunk/src/VBox/VMM
Files:
12 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/VMM/PGM.cpp

    r16300 r16317  
    685685#define PGM_BTH_NAME_R0_STR(name)   PGM_BTH_NAME_R0_32BIT_REAL_STR(name)
    686686#define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_32BIT_PT_FOR_PHYS
     687#include "PGMBth.h"
    687688#include "PGMGst.h"
    688 #include "PGMBth.h"
    689689#undef BTH_PGMPOOLKIND_PT_FOR_PT
    690690#undef PGM_BTH_NAME
    … …  
    705705#define PGM_BTH_NAME_R0_STR(name)   PGM_BTH_NAME_R0_32BIT_PROT_STR(name)
    706706#define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_32BIT_PT_FOR_PHYS
     707#include "PGMBth.h"
    707708#include "PGMGst.h"
    708 #include "PGMBth.h"
    709709#undef BTH_PGMPOOLKIND_PT_FOR_PT
    710710#undef PGM_BTH_NAME
    … …  
    726726#define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT
    727727#define BTH_PGMPOOLKIND_PT_FOR_BIG  PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB
     728#include "PGMBth.h"
    728729#include "PGMGst.h"
    729 #include "PGMBth.h"
    730730#undef BTH_PGMPOOLKIND_PT_FOR_BIG
    731731#undef BTH_PGMPOOLKIND_PT_FOR_PT
    … …  
    823823#define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_PAE_PT_FOR_PAE_PT
    824824#define BTH_PGMPOOLKIND_PT_FOR_BIG  PGMPOOLKIND_PAE_PT_FOR_PAE_2MB
     825#include "PGMBth.h"
    825826#include "PGMGst.h"
    826 #include "PGMBth.h"
    827827#undef BTH_PGMPOOLKIND_PT_FOR_BIG
    828828#undef BTH_PGMPOOLKIND_PT_FOR_PT
    … …  
    861861# define BTH_PGMPOOLKIND_PT_FOR_PT  PGMPOOLKIND_PAE_PT_FOR_PAE_PT
    862862# define BTH_PGMPOOLKIND_PT_FOR_BIG PGMPOOLKIND_PAE_PT_FOR_PAE_2MB
     863# include "PGMBth.h"
    863864# include "PGMGst.h"
    864 # include "PGMBth.h"
    865865# undef BTH_PGMPOOLKIND_PT_FOR_BIG
    866866# undef BTH_PGMPOOLKIND_PT_FOR_PT
    … …  
    30453045    pVM->pgm.s.pfnR3GstUnmonitorCR3         = pModeData->pfnR3GstUnmonitorCR3;
    30463046#endif
    3047     pVM->pgm.s.pfnR3GstMapCR3               = pModeData->pfnR3GstMapCR3;
    3048     pVM->pgm.s.pfnR3GstUnmapCR3             = pModeData->pfnR3GstUnmapCR3;
    30493047#ifndef VBOX_WITH_PGMPOOL_PAGING_ONLY
    30503048    pVM->pgm.s.pfnR3GstWriteHandlerCR3      = pModeData->pfnR3GstWriteHandlerCR3;
    … …  
    30603058    pVM->pgm.s.pfnRCGstUnmonitorCR3         = pModeData->pfnRCGstUnmonitorCR3;
    30613059#endif
    3062     pVM->pgm.s.pfnRCGstMapCR3               = pModeData->pfnRCGstMapCR3;
    3063     pVM->pgm.s.pfnRCGstUnmapCR3             = pModeData->pfnRCGstUnmapCR3;
    30643060#ifndef VBOX_WITH_PGMPOOL_PAGING_ONLY
    30653061    pVM->pgm.s.pfnRCGstWriteHandlerCR3      = pModeData->pfnRCGstWriteHandlerCR3;
    … …  
    30733069    pVM->pgm.s.pfnR0GstUnmonitorCR3         = pModeData->pfnR0GstUnmonitorCR3;
    30743070#endif
    3075     pVM->pgm.s.pfnR0GstMapCR3               = pModeData->pfnR0GstMapCR3;
    3076     pVM->pgm.s.pfnR0GstUnmapCR3             = pModeData->pfnR0GstUnmapCR3;
    30773071#ifndef VBOX_WITH_PGMPOOL_PAGING_ONLY
    30783072    pVM->pgm.s.pfnR0GstWriteHandlerCR3      = pModeData->pfnR0GstWriteHandlerCR3;
    … …  
    30913085    pVM->pgm.s.pfnR3BthAssertCR3            = pModeData->pfnR3BthAssertCR3;
    30923086#endif
     3087    pVM->pgm.s.pfnR3BthMapCR3               = pModeData->pfnR3BthMapCR3;
     3088    pVM->pgm.s.pfnR3BthUnmapCR3             = pModeData->pfnR3BthUnmapCR3;
    30933089
    30943090    pVM->pgm.s.pfnRCBthTrap0eHandler        = pModeData->pfnRCBthTrap0eHandler;
    … …  
    31013097    pVM->pgm.s.pfnRCBthAssertCR3            = pModeData->pfnRCBthAssertCR3;
    31023098#endif
     3099    pVM->pgm.s.pfnRCBthMapCR3               = pModeData->pfnRCBthMapCR3;
     3100    pVM->pgm.s.pfnRCBthUnmapCR3             = pModeData->pfnRCBthUnmapCR3;
    31033101
    31043102    pVM->pgm.s.pfnR0BthTrap0eHandler        = pModeData->pfnR0BthTrap0eHandler;
    … …  
    31113109    pVM->pgm.s.pfnR0BthAssertCR3            = pModeData->pfnR0BthAssertCR3;
    31123110#endif
     3111    pVM->pgm.s.pfnR0BthMapCR3               = pModeData->pfnR0BthMapCR3;
     3112    pVM->pgm.s.pfnR0BthUnmapCR3             = pModeData->pfnR0BthUnmapCR3;
    31133113}
    31143114

  • trunk/src/VBox/VMM/PGMBth.h

    r13937 r16317  
    3636PGM_BTH_DECL(int, PrefetchPage)(PVM pVM, RTGCPTR GCPtrPage);
    3737PGM_BTH_DECL(unsigned, AssertCR3)(PVM pVM, uint64_t cr3, uint64_t cr4, RTGCPTR GCPtr = 0, RTGCPTR cb = ~(RTGCPTR)0);
     38PGM_BTH_DECL(int, MapCR3)(PVM pVM, RTGCPHYS GCPhysCR3);
     39PGM_BTH_DECL(int, UnmapCR3)(PVM pVM);
    3840__END_DECLS
    3941
    … …  
    6264    pModeData->pfnR3BthAssertCR3            = PGM_BTH_NAME(AssertCR3);
    6365#endif
     66    pModeData->pfnR3BthMapCR3               = PGM_BTH_NAME(MapCR3);
     67    pModeData->pfnR3BthUnmapCR3             = PGM_BTH_NAME(UnmapCR3);
    6468
    6569    if (fResolveGCAndR0)
    … …  
    8589        AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_BTH_NAME_RC_STR(AssertCR3), rc), rc);
    8690# endif
     91        rc = PDMR3LdrGetSymbolRC(pVM, NULL,       PGM_BTH_NAME_RC_STR(MapCR3),              &pModeData->pfnRCBthMapCR3);
     92        AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_BTH_NAME_RC_STR(MapCR3), rc), rc);
     93        rc = PDMR3LdrGetSymbolRC(pVM, NULL,       PGM_BTH_NAME_RC_STR(UnmapCR3),            &pModeData->pfnRCBthUnmapCR3);
     94        AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_BTH_NAME_RC_STR(UnmapCR3), rc), rc);
    8795#endif /* Not AMD64 shadow paging. */
    8896
    … …  
    104112        AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_BTH_NAME_R0_STR(AssertCR3), rc), rc);
    105113#endif
     114        rc = PDMR3LdrGetSymbolR0(pVM, NULL,       PGM_BTH_NAME_R0_STR(MapCR3),              &pModeData->pfnR0BthMapCR3);
     115        AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_BTH_NAME_R0_STR(MapCR3), rc), rc);
     116        rc = PDMR3LdrGetSymbolR0(pVM, NULL,       PGM_BTH_NAME_R0_STR(UnmapCR3),            &pModeData->pfnR0BthUnmapCR3);
     117        AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_BTH_NAME_R0_STR(UnmapCR3), rc), rc);
    106118    }
    107119    return VINF_SUCCESS;

  • trunk/src/VBox/VMM/PGMGst.h

    r16300 r16317  
    119119PGM_GST_DECL(int, ModifyPage)(PVM pVM, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask);
    120120PGM_GST_DECL(int, GetPDE)(PVM pVM, RTGCPTR GCPtr, PX86PDEPAE pPDE);
    121 PGM_GST_DECL(int, MapCR3)(PVM pVM, RTGCPHYS GCPhysCR3);
    122 PGM_GST_DECL(int, UnmapCR3)(PVM pVM);
    123121#ifndef VBOX_WITH_PGMPOOL_PAGING_ONLY
    124122PGM_GST_DECL(int, MonitorCR3)(PVM pVM, RTGCPHYS GCPhysCR3);
    … …  
    147145    pModeData->pfnR3GstGetPage            = PGM_GST_NAME(GetPage);
    148146    pModeData->pfnR3GstModifyPage         = PGM_GST_NAME(ModifyPage);
    149     pModeData->pfnR3GstMapCR3             = PGM_GST_NAME(MapCR3);
    150     pModeData->pfnR3GstUnmapCR3           = PGM_GST_NAME(UnmapCR3);
    151147#ifndef VBOX_WITH_PGMPOOL_PAGING_ONLY
    152148    pModeData->pfnR3GstMonitorCR3         = PGM_GST_NAME(MonitorCR3);
    … …  
    186182        AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_GST_NAME_RC_STR(UnmonitorCR3), rc), rc);
    187183# endif
    188         rc = PDMR3LdrGetSymbolRC(pVM, NULL,       PGM_GST_NAME_RC_STR(MapCR3),           &pModeData->pfnRCGstMapCR3);
    189         AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_GST_NAME_RC_STR(MapCR3), rc), rc);
    190         rc = PDMR3LdrGetSymbolRC(pVM, NULL,       PGM_GST_NAME_RC_STR(UnmapCR3),         &pModeData->pfnRCGstUnmapCR3);
    191         AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_GST_NAME_RC_STR(UnmapCR3), rc), rc);
    192184# ifndef VBOX_WITH_PGMPOOL_PAGING_ONLY
    193185#  if PGM_GST_TYPE == PGM_TYPE_32BIT || PGM_GST_TYPE == PGM_TYPE_PAE
    … …  
    213205        AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_GST_NAME_R0_STR(UnmonitorCR3), rc), rc);
    214206#endif
    215         rc = PDMR3LdrGetSymbolR0(pVM, NULL,       PGM_GST_NAME_R0_STR(MapCR3),           &pModeData->pfnR0GstMapCR3);
    216         AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_GST_NAME_R0_STR(MapCR3), rc), rc);
    217         rc = PDMR3LdrGetSymbolR0(pVM, NULL,       PGM_GST_NAME_R0_STR(UnmapCR3),         &pModeData->pfnR0GstUnmapCR3);
    218         AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_GST_NAME_R0_STR(UnmapCR3), rc), rc);
    219207#ifndef VBOX_WITH_PGMPOOL_PAGING_ONLY
    220208# if PGM_GST_TYPE == PGM_TYPE_32BIT || PGM_GST_TYPE == PGM_TYPE_PAE
    … …  
    243231     * Map and monitor CR3
    244232     */
    245     int rc = PGM_GST_NAME(MapCR3)(pVM, GCPhysCR3);
     233    int rc = PGM_BTH_NAME(MapCR3)(pVM, GCPhysCR3);
    246234#ifndef VBOX_WITH_PGMPOOL_PAGING_ONLY
    247235    if (RT_SUCCESS(rc) && !pVM->pgm.s.fMappingsFixed)
    … …  
    280268    if (RT_SUCCESS(rc))
    281269#endif
    282         rc = PGM_GST_NAME(UnmapCR3)(pVM);
     270        rc = PGM_BTH_NAME(UnmapCR3)(pVM);
    283271    return rc;
    284272}

  • trunk/src/VBox/VMM/PGMInternal.h

    r16206 r16317  
    15311531    /** Shw: PAE page directory pointer table (legacy, 4 entries);  Gst PAE PDPT. */
    15321532    PGMPOOLKIND_PAE_PDPT,
     1533    /** Shw: PAE page directory pointer table (legacy, 4 entries);  Gst: real mode. */
     1534    PGMPOOLKIND_PAE_PDPT_PHYS_REAL,
     1535    /** Shw: PAE page directory pointer table (legacy, 4 entries);  Gst: protected mode without paging. */
     1536    PGMPOOLKIND_PAE_PDPT_PHYS_PROT,
    15331537
    15341538    /** Shw: 64-bit page directory pointer table;   Gst: 64-bit page directory pointer table. */
    … …  
    15421546
    15431547    /** Shw: 64-bit PML4;                           Gst: 64-bit PML4. */
    1544     PGMPOOLKIND_64BIT_PML4_FOR_64BIT_PML4,
     1548    PGMPOOLKIND_64BIT_PML4,
    15451549
    15461550    /** Shw: EPT page directory pointer table;      Gst: no paging  */
    … …  
    20482052    DECLR3CALLBACKMEMBER(int,       pfnR3GstUnmonitorCR3,(PVM pVM));
    20492053#endif
    2050     DECLR3CALLBACKMEMBER(int,       pfnR3GstMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
    2051     DECLR3CALLBACKMEMBER(int,       pfnR3GstUnmapCR3,(PVM pVM));
    20522054#ifndef VBOX_WITH_PGMPOOL_PAGING_ONLY
    20532055    R3PTRTYPE(PFNPGMR3PHYSHANDLER)  pfnR3GstWriteHandlerCR3;
    … …  
    20632065    DECLRCCALLBACKMEMBER(int,       pfnRCGstUnmonitorCR3,(PVM pVM));
    20642066#endif
    2065     DECLRCCALLBACKMEMBER(int,       pfnRCGstMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
    2066     DECLRCCALLBACKMEMBER(int,       pfnRCGstUnmapCR3,(PVM pVM));
    20672067#ifndef VBOX_WITH_PGMPOOL_PAGING_ONLY
    20682068    RCPTRTYPE(PFNPGMRCPHYSHANDLER)  pfnRCGstWriteHandlerCR3;
    … …  
    20762076    DECLR0CALLBACKMEMBER(int,       pfnR0GstUnmonitorCR3,(PVM pVM));
    20772077#endif
    2078     DECLR0CALLBACKMEMBER(int,       pfnR0GstMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
    2079     DECLR0CALLBACKMEMBER(int,       pfnR0GstUnmapCR3,(PVM pVM));
    20802078#ifndef VBOX_WITH_PGMPOOL_PAGING_ONLY
    20812079    R0PTRTYPE(PFNPGMRCPHYSHANDLER)  pfnR0GstWriteHandlerCR3;
    … …  
    20972095    DECLR3CALLBACKMEMBER(unsigned,  pfnR3BthAssertCR3,(PVM pVM, uint64_t cr3, uint64_t cr4, RTGCPTR GCPtr, RTGCPTR cb));
    20982096#endif
     2097    DECLR3CALLBACKMEMBER(int,       pfnR3BthMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
     2098    DECLR3CALLBACKMEMBER(int,       pfnR3BthUnmapCR3,(PVM pVM));
    20992099
    21002100    DECLRCCALLBACKMEMBER(int,       pfnRCBthTrap0eHandler,(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));
    … …  
    21072107    DECLRCCALLBACKMEMBER(unsigned,  pfnRCBthAssertCR3,(PVM pVM, uint64_t cr3, uint64_t cr4, RTGCPTR GCPtr, RTGCPTR cb));
    21082108#endif
     2109    DECLRCCALLBACKMEMBER(int,       pfnRCBthMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
     2110    DECLRCCALLBACKMEMBER(int,       pfnRCBthUnmapCR3,(PVM pVM));
    21092111
    21102112    DECLR0CALLBACKMEMBER(int,       pfnR0BthTrap0eHandler,(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));
    … …  
    21172119    DECLR0CALLBACKMEMBER(unsigned,  pfnR0BthAssertCR3,(PVM pVM, uint64_t cr3, uint64_t cr4, RTGCPTR GCPtr, RTGCPTR cb));
    21182120#endif
     2121    DECLR0CALLBACKMEMBER(int,       pfnR0BthMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
     2122    DECLR0CALLBACKMEMBER(int,       pfnR0BthUnmapCR3,(PVM pVM));
    21192123    /** @} */
    21202124} PGMMODEDATA, *PPGMMODEDATA;
    … …  
    23382342    DECLR3CALLBACKMEMBER(int,       pfnR3GstUnmonitorCR3,(PVM pVM));
    23392343#endif
    2340     DECLR3CALLBACKMEMBER(int,       pfnR3GstMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
    2341     DECLR3CALLBACKMEMBER(int,       pfnR3GstUnmapCR3,(PVM pVM));
    23422344#ifndef VBOX_WITH_PGMPOOL_PAGING_ONLY
    23432345    R3PTRTYPE(PFNPGMR3PHYSHANDLER)  pfnR3GstWriteHandlerCR3;
    … …  
    23532355    DECLRCCALLBACKMEMBER(int,       pfnRCGstUnmonitorCR3,(PVM pVM));
    23542356#endif
    2355     DECLRCCALLBACKMEMBER(int,       pfnRCGstMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
    2356     DECLRCCALLBACKMEMBER(int,       pfnRCGstUnmapCR3,(PVM pVM));
    23572357#ifndef VBOX_WITH_PGMPOOL_PAGING_ONLY
    23582358    RCPTRTYPE(PFNPGMRCPHYSHANDLER)  pfnRCGstWriteHandlerCR3;
    … …  
    23702370    DECLR0CALLBACKMEMBER(int,       pfnR0GstUnmonitorCR3,(PVM pVM));
    23712371#endif
    2372     DECLR0CALLBACKMEMBER(int,       pfnR0GstMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
    2373     DECLR0CALLBACKMEMBER(int,       pfnR0GstUnmapCR3,(PVM pVM));
    23742372#ifndef VBOX_WITH_PGMPOOL_PAGING_ONLY
    23752373    R0PTRTYPE(PFNPGMRCPHYSHANDLER)  pfnR0GstWriteHandlerCR3;
    … …  
    23892387    DECLR3CALLBACKMEMBER(int,       pfnR3BthVerifyAccessSyncPage,(PVM pVM, RTGCPTR GCPtrPage, unsigned fFlags, unsigned uError));
    23902388    DECLR3CALLBACKMEMBER(unsigned,  pfnR3BthAssertCR3,(PVM pVM, uint64_t cr3, uint64_t cr4, RTGCPTR GCPtr, RTGCPTR cb));
     2389    DECLR3CALLBACKMEMBER(int,       pfnR3BthMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
     2390    DECLR3CALLBACKMEMBER(int,       pfnR3BthUnmapCR3,(PVM pVM));
    23912391
    23922392    DECLR0CALLBACKMEMBER(int,       pfnR0BthTrap0eHandler,(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));
    … …  
    23972397    DECLR0CALLBACKMEMBER(int,       pfnR0BthVerifyAccessSyncPage,(PVM pVM, RTGCPTR GCPtrPage, unsigned fFlags, unsigned uError));
    23982398    DECLR0CALLBACKMEMBER(unsigned,  pfnR0BthAssertCR3,(PVM pVM, uint64_t cr3, uint64_t cr4, RTGCPTR GCPtr, RTGCPTR cb));
     2399    DECLR0CALLBACKMEMBER(int,       pfnR0BthMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
     2400    DECLR0CALLBACKMEMBER(int,       pfnR0BthUnmapCR3,(PVM pVM));
    23992401
    24002402    DECLRCCALLBACKMEMBER(int,       pfnRCBthTrap0eHandler,(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));
    … …  
    24052407    DECLRCCALLBACKMEMBER(int,       pfnRCBthVerifyAccessSyncPage,(PVM pVM, RTGCPTR GCPtrPage, unsigned fFlags, unsigned uError));
    24062408    DECLRCCALLBACKMEMBER(unsigned,  pfnRCBthAssertCR3,(PVM pVM, uint64_t cr3, uint64_t cr4, RTGCPTR GCPtr, RTGCPTR cb));
     2409    DECLRCCALLBACKMEMBER(int,       pfnRCBthMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
     2410    DECLRCCALLBACKMEMBER(int,       pfnRCBthUnmapCR3,(PVM pVM));
    24072411#if HC_ARCH_BITS == 64
    24082412    RTRCPTR                         alignment2; /**< structure size alignment. */

  • trunk/src/VBox/VMM/PGMMap.cpp

    r16300 r16317  
    656656    Log(("PGMR3MappingsUnfix: fMappingsFixed=%d\n", pVM->pgm.s.fMappingsFixed));
    657657
    658     /* Refuse in VT-x/AMD-V mode. */
     658    /* Ignore in VT-x/AMD-V mode. */
    659659    if (HWACCMR3IsActive(pVM))
    660660        return VINF_SUCCESS;
    … …  
    676676#endif
    677677    /* Remap CR3 as we have just flushed the CR3 shadow PML4 in case we're in long mode. */
    678     int rc = PGM_GST_PFN(MapCR3, pVM)(pVM, pVM->pgm.s.GCPhysCR3);
     678    int rc = PGM_BTH_PFN(MapCR3, pVM)(pVM, pVM->pgm.s.GCPhysCR3);
    679679    AssertRCSuccess(rc);
    680680

  • trunk/src/VBox/VMM/PGMPool.cpp

    r15225 r16317  
    303303    pPool->aPages[PGMPOOL_IDX_AMD64_CR3].pvPageR3  = pVM->pgm.s.pShwPaePdptR3;  /* not used - isn't it wrong as well? */
    304304#endif
    305     pPool->aPages[PGMPOOL_IDX_AMD64_CR3].enmKind   = PGMPOOLKIND_64BIT_PML4_FOR_64BIT_PML4;
     305    pPool->aPages[PGMPOOL_IDX_AMD64_CR3].enmKind   = PGMPOOLKIND_64BIT_PML4;
    306306    pPool->aPages[PGMPOOL_IDX_AMD64_CR3].idx       = PGMPOOL_IDX_AMD64_CR3;
    307307

  • trunk/src/VBox/VMM/VMMAll/PGMAll.cpp

    r16232 r16317  
    9090#define PGM_BTH_NAME(name)          PGM_BTH_NAME_32BIT_REAL(name)
    9191#define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_32BIT_PT_FOR_PHYS
     92#define BTH_PGMPOOLKIND_ROOT        PGMPOOLKIND_32BIT_PD_PHYS_REAL
    9293#include "PGMAllGst.h"
    9394#include "PGMAllBth.h"
    9495#undef BTH_PGMPOOLKIND_PT_FOR_PT
     96#undef BTH_PGMPOOLKIND_ROOT
    9597#undef PGM_BTH_NAME
    9698#undef PGM_GST_TYPE
    … …  
    102104#define PGM_BTH_NAME(name)          PGM_BTH_NAME_32BIT_PROT(name)
    103105#define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_32BIT_PT_FOR_PHYS
     106#define BTH_PGMPOOLKIND_ROOT        PGMPOOLKIND_32BIT_PD_PHYS_PROT
    104107#include "PGMAllGst.h"
    105108#include "PGMAllBth.h"
    106109#undef BTH_PGMPOOLKIND_PT_FOR_PT
     110#undef BTH_PGMPOOLKIND_ROOT
    107111#undef PGM_BTH_NAME
    108112#undef PGM_GST_TYPE
    … …  
    115119#define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT
    116120#define BTH_PGMPOOLKIND_PT_FOR_BIG  PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB
     121#define BTH_PGMPOOLKIND_ROOT        PGMPOOLKIND_32BIT_PD
    117122#include "PGMAllGst.h"
    118123#include "PGMAllBth.h"
    119124#undef BTH_PGMPOOLKIND_PT_FOR_BIG
    120125#undef BTH_PGMPOOLKIND_PT_FOR_PT
     126#undef BTH_PGMPOOLKIND_ROOT
    121127#undef PGM_BTH_NAME
    122128#undef PGM_GST_TYPE
    … …  
    140146#define PGM_BTH_NAME(name)          PGM_BTH_NAME_PAE_REAL(name)
    141147#define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_PAE_PT_FOR_PHYS
     148#define BTH_PGMPOOLKIND_ROOT        PGMPOOLKIND_PAE_PDPT_PHYS_REAL
    142149#include "PGMAllBth.h"
    143150#undef BTH_PGMPOOLKIND_PT_FOR_PT
     151#undef BTH_PGMPOOLKIND_ROOT
    144152#undef PGM_BTH_NAME
    145153#undef PGM_GST_TYPE
    … …  
    151159#define PGM_BTH_NAME(name)          PGM_BTH_NAME_PAE_PROT(name)
    152160#define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_PAE_PT_FOR_PHYS
     161#define BTH_PGMPOOLKIND_ROOT        PGMPOOLKIND_PAE_PDPT_PHYS_PROT
    153162#include "PGMAllBth.h"
    154163#undef BTH_PGMPOOLKIND_PT_FOR_PT
     164#undef BTH_PGMPOOLKIND_ROOT
    155165#undef PGM_BTH_NAME
    156166#undef PGM_GST_TYPE
    … …  
    163173#define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_PAE_PT_FOR_32BIT_PT
    164174#define BTH_PGMPOOLKIND_PT_FOR_BIG  PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB
     175#define BTH_PGMPOOLKIND_ROOT        PGMPOOLKIND_PAE_PDPT_FOR_32BIT
    165176#include "PGMAllBth.h"
    166177#undef BTH_PGMPOOLKIND_PT_FOR_BIG
    167178#undef BTH_PGMPOOLKIND_PT_FOR_PT
     179#undef BTH_PGMPOOLKIND_ROOT
    168180#undef PGM_BTH_NAME
    169181#undef PGM_GST_TYPE
    … …  
    177189#define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_PAE_PT_FOR_PAE_PT
    178190#define BTH_PGMPOOLKIND_PT_FOR_BIG  PGMPOOLKIND_PAE_PT_FOR_PAE_2MB
     191#define BTH_PGMPOOLKIND_ROOT        PGMPOOLKIND_PAE_PDPT
    179192#include "PGMAllGst.h"
    180193#include "PGMAllBth.h"
    181194#undef BTH_PGMPOOLKIND_PT_FOR_BIG
    182195#undef BTH_PGMPOOLKIND_PT_FOR_PT
     196#undef BTH_PGMPOOLKIND_ROOT
    183197#undef PGM_BTH_NAME
    184198#undef PGM_GST_TYPE
    … …  
    202216# define PGM_BTH_NAME(name)         PGM_BTH_NAME_AMD64_PROT(name)
    203217# define BTH_PGMPOOLKIND_PT_FOR_PT  PGMPOOLKIND_PAE_PT_FOR_PHYS
     218# define BTH_PGMPOOLKIND_ROOT       PGMPOOLKIND_PAE_PD_PHYS_PROT
    204219# include "PGMAllBth.h"
    205220# undef BTH_PGMPOOLKIND_PT_FOR_PT
     221# undef BTH_PGMPOOLKIND_ROOT
    206222# undef PGM_BTH_NAME
    207223# undef PGM_GST_TYPE
    … …  
    215231#  define BTH_PGMPOOLKIND_PT_FOR_PT PGMPOOLKIND_PAE_PT_FOR_PAE_PT
    216232#  define BTH_PGMPOOLKIND_PT_FOR_BIG PGMPOOLKIND_PAE_PT_FOR_PAE_2MB
     233#  define BTH_PGMPOOLKIND_ROOT      PGMPOOLKIND_64BIT_PML4
    217234#  include "PGMAllGst.h"
    218235#  include "PGMAllBth.h"
    219236#  undef BTH_PGMPOOLKIND_PT_FOR_BIG
    220237#  undef BTH_PGMPOOLKIND_PT_FOR_PT
     238#  undef BTH_PGMPOOLKIND_ROOT
    221239#  undef PGM_BTH_NAME
    222240#  undef PGM_GST_TYPE
    … …  
    15421560    if (pVM->pgm.s.GCPhysCR3 != GCPhysCR3)
    15431561    {
     1562#ifdef VBOX_WITH_PGMPOOL_PAGING_ONLY
     1563        /* Unmap the old CR3 value before activating the new one. */
     1564        rc = PGM_BTH_PFN(UnmapCR3, pVM)(pVM);
     1565        AssertRC(rc);
     1566#endif
    15441567        RTGCPHYS GCPhysOldCR3 = pVM->pgm.s.GCPhysCR3;
    15451568        pVM->pgm.s.GCPhysCR3  = GCPhysCR3;
    1546         rc = PGM_GST_PFN(MapCR3, pVM)(pVM, GCPhysCR3);
     1569        rc = PGM_BTH_PFN(MapCR3, pVM)(pVM, GCPhysCR3);
    15471570        if (RT_LIKELY(rc == VINF_SUCCESS))
    15481571        {
    … …  
    16351658    {
    16361659        pVM->pgm.s.GCPhysCR3 = GCPhysCR3;
    1637         rc = PGM_GST_PFN(MapCR3, pVM)(pVM, GCPhysCR3);
     1660        rc = PGM_BTH_PFN(MapCR3, pVM)(pVM, GCPhysCR3);
    16381661        AssertRCSuccess(rc); /* Assumes VINF_PGM_SYNC_CR3 doesn't apply to nested paging. */
    16391662    }
    … …  
    17091732        else
    17101733            GCPhysCR3 = (RTGCPHYS)(cr3 & X86_CR3_PAGE_MASK);
     1734
     1735#ifdef VBOX_WITH_PGMPOOL_PAGING_ONLY
     1736        if (pVM->pgm.s.GCPhysCR3 != GCPhysCR3)
     1737        {
     1738            /* Unmap the old CR3 value before activating the new one. */
     1739            rc = PGM_BTH_PFN(UnmapCR3, pVM)(pVM);
     1740            AssertRC(rc);
     1741        }
     1742#endif
     1743
    17111744        pVM->pgm.s.GCPhysCR3 = GCPhysCR3;
    1712         rc = PGM_GST_PFN(MapCR3, pVM)(pVM, GCPhysCR3);
     1745        rc = PGM_BTH_PFN(MapCR3, pVM)(pVM, GCPhysCR3);
    17131746#ifdef IN_RING3
    17141747        if (rc == VINF_PGM_SYNC_CR3)

  • trunk/src/VBox/VMM/VMMAll/PGMAllBth.h

    r16260 r16317  
    4040DECLINLINE(void) PGM_BTH_NAME(SyncPageWorkerTrackDeref)(PVM pVM, PPGMPOOLPAGE pShwPage, RTHCPHYS HCPhys);
    4141#endif
     42PGM_BTH_DECL(int, MapCR3)(PVM pVM, RTGCPHYS GCPhysCR3);
     43PGM_BTH_DECL(int, UnmapCR3)(PVM pVM);
    4244__END_DECLS
    4345
    … …  
    44044406#endif /* VBOX_STRICT */
    44054407
     4408
     4409/**
     4410 * Sets up the CR3 for shadow paging
     4411 *
     4412 * @returns Strict VBox status code.
     4413 * @retval  VINF_SUCCESS.
     4414 *
     4415 * @param   pVM             VM handle.
     4416 * @param   GCPhysCR3       The physical address in the CR3 register.
     4417 */
     4418PGM_BTH_DECL(int, MapCR3)(PVM pVM, RTGCPHYS GCPhysCR3)
     4419{
     4420#if PGM_GST_TYPE == PGM_TYPE_32BIT \
     4421 || PGM_GST_TYPE == PGM_TYPE_PAE \
     4422 || PGM_GST_TYPE == PGM_TYPE_AMD64
     4423
     4424    LogFlow(("MapCR3: %RGp\n", GCPhysCR3));
     4425
     4426    /*
     4427     * Map the page CR3 points at.
     4428     */
     4429    RTHCPHYS    HCPhysGuestCR3;
     4430    RTHCPTR     HCPtrGuestCR3;
     4431    int rc = pgmRamGCPhys2HCPtrAndHCPhysWithFlags(&pVM->pgm.s, GCPhysCR3 & GST_CR3_PAGE_MASK, &HCPtrGuestCR3, &HCPhysGuestCR3);
     4432    if (RT_SUCCESS(rc))
     4433    {
     4434        rc = PGMMap(pVM, (RTGCPTR)pVM->pgm.s.GCPtrCR3Mapping, HCPhysGuestCR3, PAGE_SIZE, 0);
     4435        if (RT_SUCCESS(rc))
     4436        {
     4437            PGM_INVL_PG(pVM->pgm.s.GCPtrCR3Mapping);
     4438# if PGM_GST_TYPE == PGM_TYPE_32BIT
     4439            pVM->pgm.s.pGst32BitPdR3 = (R3PTRTYPE(PX86PD))HCPtrGuestCR3;
     4440#  ifndef VBOX_WITH_2X_4GB_ADDR_SPACE
     4441            pVM->pgm.s.pGst32BitPdR0 = (R0PTRTYPE(PX86PD))HCPtrGuestCR3;
     4442#  endif
     4443            pVM->pgm.s.pGst32BitPdRC = (RCPTRTYPE(PX86PD))pVM->pgm.s.GCPtrCR3Mapping;
     4444
     4445# elif PGM_GST_TYPE == PGM_TYPE_PAE
     4446            unsigned off = GCPhysCR3 & GST_CR3_PAGE_MASK & PAGE_OFFSET_MASK;
     4447            pVM->pgm.s.pGstPaePdptR3 = (R3PTRTYPE(PX86PDPT))HCPtrGuestCR3;
     4448#  ifndef VBOX_WITH_2X_4GB_ADDR_SPACE
     4449            pVM->pgm.s.pGstPaePdptR0 = (R0PTRTYPE(PX86PDPT))HCPtrGuestCR3;
     4450#  endif
     4451            pVM->pgm.s.pGstPaePdptRC = (RCPTRTYPE(PX86PDPT))((RCPTRTYPE(uint8_t *))pVM->pgm.s.GCPtrCR3Mapping + off);
     4452            Log(("Cached mapping %RGv\n", pVM->pgm.s.pGstPaePdptRC));
     4453
     4454            /*
     4455             * Map the 4 PDs too.
     4456             */
     4457            PX86PDPT pGuestPDPT = pgmGstGetPaePDPTPtr(&pVM->pgm.s);
     4458            RTGCPTR GCPtr = pVM->pgm.s.GCPtrCR3Mapping + PAGE_SIZE;
     4459            for (unsigned i = 0; i < X86_PG_PAE_PDPE_ENTRIES; i++, GCPtr += PAGE_SIZE)
     4460            {
     4461                if (pGuestPDPT->a[i].n.u1Present)
     4462                {
     4463                    RTHCPTR     HCPtr;
     4464                    RTHCPHYS    HCPhys;
     4465                    RTGCPHYS    GCPhys = pGuestPDPT->a[i].u & X86_PDPE_PG_MASK;
     4466                    int rc2 = pgmRamGCPhys2HCPtrAndHCPhysWithFlags(&pVM->pgm.s, GCPhys, &HCPtr, &HCPhys);
     4467                    if (RT_SUCCESS(rc2))
     4468                    {
     4469                        rc = PGMMap(pVM, GCPtr, HCPhys & X86_PTE_PAE_PG_MASK, PAGE_SIZE, 0);
     4470                        AssertRCReturn(rc, rc);
     4471
     4472                        pVM->pgm.s.apGstPaePDsR3[i]     = (R3PTRTYPE(PX86PDPAE))HCPtr;
     4473#  ifndef VBOX_WITH_2X_4GB_ADDR_SPACE
     4474                        pVM->pgm.s.apGstPaePDsR0[i]     = (R0PTRTYPE(PX86PDPAE))HCPtr;
     4475#  endif
     4476                        pVM->pgm.s.apGstPaePDsRC[i]     = (RCPTRTYPE(PX86PDPAE))GCPtr;
     4477                        pVM->pgm.s.aGCPhysGstPaePDs[i]  = GCPhys;
     4478                        PGM_INVL_PG(GCPtr); /** @todo This ends up calling HWACCMInvalidatePage, is that correct? */
     4479                        continue;
     4480                    }
     4481                    AssertMsgFailed(("pgmR3Gst32BitMapCR3: rc2=%d GCPhys=%RGp i=%d\n", rc2, GCPhys, i));
     4482                }
     4483
     4484                pVM->pgm.s.apGstPaePDsR3[i]     = 0;
     4485#  ifndef VBOX_WITH_2X_4GB_ADDR_SPACE
     4486                pVM->pgm.s.apGstPaePDsR0[i]     = 0;
     4487#  endif
     4488                pVM->pgm.s.apGstPaePDsRC[i]     = 0;
     4489                pVM->pgm.s.aGCPhysGstPaePDs[i]  = NIL_RTGCPHYS;
     4490                PGM_INVL_PG(GCPtr); /** @todo this shouldn't be necessary? */
     4491            }
     4492
     4493# elif PGM_GST_TYPE == PGM_TYPE_AMD64
     4494            pVM->pgm.s.pGstAmd64Pml4R3 = (R3PTRTYPE(PX86PML4))HCPtrGuestCR3;
     4495#  ifndef VBOX_WITH_2X_4GB_ADDR_SPACE
     4496            pVM->pgm.s.pGstAmd64Pml4R0 = (R0PTRTYPE(PX86PML4))HCPtrGuestCR3;
     4497#  endif
     4498#  ifndef VBOX_WITH_PGMPOOL_PAGING_ONLY
     4499            if (!HWACCMIsNestedPagingActive(pVM))
     4500            {
     4501                /*
     4502                 * Update the shadow root page as well since that's not fixed.
     4503                 */
     4504                /** @todo Move this into PGMAllBth.h. */
     4505                PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
     4506                if (pVM->pgm.s.CTX_SUFF(pShwPageCR3))
     4507                {
     4508                    /* It might have been freed already by a pool flush (see e.g. PGMR3MappingsUnfix). */
     4509                    /** @todo Coordinate this better with the pool. */
     4510                    if (pVM->pgm.s.CTX_SUFF(pShwPageCR3)->enmKind != PGMPOOLKIND_FREE)
     4511                        pgmPoolFreeByPage(pPool, pVM->pgm.s.CTX_SUFF(pShwPageCR3), PGMPOOL_IDX_AMD64_CR3, pVM->pgm.s.CTX_SUFF(pShwPageCR3)->GCPhys >> PAGE_SHIFT);
     4512                    pVM->pgm.s.pShwPageCR3R3 = 0;
     4513                    pVM->pgm.s.pShwPageCR3R0 = 0;
     4514                    pVM->pgm.s.pShwRootR3    = 0;
     4515#  ifndef VBOX_WITH_2X_4GB_ADDR_SPACE
     4516                    pVM->pgm.s.pShwRootR0    = 0;
     4517#  endif
     4518                    pVM->pgm.s.HCPhysShwCR3  = 0;
     4519                }
     4520
     4521                Assert(!(GCPhysCR3 >> (PAGE_SHIFT + 32)));
     4522                rc = pgmPoolAlloc(pVM, GCPhysCR3, PGMPOOLKIND_64BIT_PML4, PGMPOOL_IDX_AMD64_CR3, GCPhysCR3 >> PAGE_SHIFT, &pVM->pgm.s.CTX_SUFF(pShwPageCR3));
     4523                if (rc == VERR_PGM_POOL_FLUSHED)
     4524                {
     4525                    Log(("MapCR3: PGM pool flushed -> signal sync cr3\n"));
     4526                    Assert(VM_FF_ISSET(pVM, VM_FF_PGM_SYNC_CR3));
     4527                    return VINF_PGM_SYNC_CR3;
     4528                }
     4529                AssertRCReturn(rc, rc);
     4530#  ifdef IN_RING0
     4531                pVM->pgm.s.pShwPageCR3R3 = MMHyperCCToR3(pVM, pVM->pgm.s.CTX_SUFF(pShwPageCR3));
     4532#  else
     4533                pVM->pgm.s.pShwPageCR3R0 = MMHyperCCToR0(pVM, pVM->pgm.s.CTX_SUFF(pShwPageCR3));
     4534#  endif
     4535                pVM->pgm.s.pShwRootR3    = (R3PTRTYPE(void *))pVM->pgm.s.CTX_SUFF(pShwPageCR3)->pvPageR3;
     4536                Assert(pVM->pgm.s.pShwRootR3);
     4537#  ifndef VBOX_WITH_2X_4GB_ADDR_SPACE
     4538                pVM->pgm.s.pShwRootR0    = (R0PTRTYPE(void *))PGMPOOL_PAGE_2_PTR(pPool->CTX_SUFF(pVM), pVM->pgm.s.CTX_SUFF(pShwPageCR3));
     4539#  endif
     4540                pVM->pgm.s.HCPhysShwCR3  = pVM->pgm.s.CTX_SUFF(pShwPageCR3)->Core.Key;
     4541                rc = VINF_SUCCESS; /* clear it - pgmPoolAlloc returns hints. */
     4542            }
     4543#  endif /* !VBOX_WITH_PGMPOOL_PAGING_ONLY */
     4544# endif
     4545        }
     4546        else
     4547            AssertMsgFailed(("rc=%Rrc GCPhysGuestPD=%RGp\n", rc, GCPhysCR3));
     4548    }
     4549    else
     4550        AssertMsgFailed(("rc=%Rrc GCPhysGuestPD=%RGp\n", rc, GCPhysCR3));
     4551
     4552#else /* prot/real stub */
     4553    int rc = VINF_SUCCESS;
     4554#endif
     4555    return rc;
     4556}
     4557
     4558/**
     4559 * Unmaps the shadow CR3.
     4560 *
     4561 * @returns VBox status, no specials.
     4562 * @param   pVM             VM handle.
     4563 */
     4564PGM_BTH_DECL(int, UnmapCR3)(PVM pVM)
     4565{
     4566    LogFlow(("UnmapCR3\n"));
     4567
     4568    int rc = VINF_SUCCESS;
     4569
     4570#if PGM_GST_TYPE == PGM_TYPE_32BIT
     4571    pVM->pgm.s.pGst32BitPdR3 = 0;
     4572#ifndef VBOX_WITH_2X_4GB_ADDR_SPACE
     4573    pVM->pgm.s.pGst32BitPdR0 = 0;
     4574#endif
     4575    pVM->pgm.s.pGst32BitPdRC = 0;
     4576
     4577#elif PGM_GST_TYPE == PGM_TYPE_PAE
     4578    pVM->pgm.s.pGstPaePdptR3 = 0;
     4579# ifndef VBOX_WITH_2X_4GB_ADDR_SPACE
     4580    pVM->pgm.s.pGstPaePdptR0 = 0;
     4581# endif
     4582    pVM->pgm.s.pGstPaePdptRC = 0;
     4583    for (unsigned i = 0; i < X86_PG_PAE_PDPE_ENTRIES; i++)
     4584    {
     4585        pVM->pgm.s.apGstPaePDsR3[i]    = 0;
     4586# ifndef VBOX_WITH_2X_4GB_ADDR_SPACE
     4587        pVM->pgm.s.apGstPaePDsR0[i]    = 0;
     4588# endif
     4589        pVM->pgm.s.apGstPaePDsRC[i]    = 0;
     4590        pVM->pgm.s.aGCPhysGstPaePDs[i] = NIL_RTGCPHYS;
     4591    }
     4592
     4593#elif PGM_GST_TYPE == PGM_TYPE_AMD64
     4594    pVM->pgm.s.pGstAmd64Pml4R3 = 0;
     4595# ifndef VBOX_WITH_2X_4GB_ADDR_SPACE
     4596    pVM->pgm.s.pGstAmd64Pml4R0 = 0;
     4597# endif
     4598    if (!HWACCMIsNestedPagingActive(pVM))
     4599    {
     4600        pVM->pgm.s.pShwRootR3 = 0;
     4601# ifndef VBOX_WITH_2X_4GB_ADDR_SPACE
     4602        pVM->pgm.s.pShwRootR0 = 0;
     4603# endif
     4604        pVM->pgm.s.HCPhysShwCR3 = 0;
     4605# ifndef VBOX_WITH_PGMPOOL_PAGING_ONLY
     4606        if (pVM->pgm.s.CTX_SUFF(pShwPageCR3))
     4607        {
     4608            PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
     4609            pgmPoolFreeByPage(pPool, pVM->pgm.s.CTX_SUFF(pShwPageCR3), PGMPOOL_IDX_AMD64_CR3, pVM->pgm.s.CTX_SUFF(pShwPageCR3)->GCPhys >> PAGE_SHIFT);
     4610            pVM->pgm.s.pShwPageCR3R3 = 0;
     4611            pVM->pgm.s.pShwPageCR3R0 = 0;
     4612        }
     4613# endif /* !VBOX_WITH_PGMPOOL_PAGING_ONLY */
     4614    }
     4615
     4616#else /* prot/real mode stub */
     4617    /* nothing to do */
     4618#endif
     4619    return rc;
     4620}
     4621

  • trunk/src/VBox/VMM/VMMAll/PGMAllGst.h

    r16172 r16317  
    129129PGM_GST_DECL(int, ModifyPage)(PVM pVM, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask);
    130130PGM_GST_DECL(int, GetPDE)(PVM pVM, RTGCPTR GCPtr, PX86PDEPAE pPDE);
    131 PGM_GST_DECL(int, MapCR3)(PVM pVM, RTGCPHYS GCPhysCR3);
    132 PGM_GST_DECL(int, UnmapCR3)(PVM pVM);
    133131#ifndef VBOX_WITH_PGMPOOL_PAGING_ONLY
    134132PGM_GST_DECL(int, MonitorCR3)(PVM pVM, RTGCPHYS GCPhysCR3);
    … …  
    413411    return VERR_NOT_IMPLEMENTED;
    414412#endif
    415 }
    416 
    417 
    418 
    419 /**
    420  * Maps the CR3 into HMA in GC and locate it in HC.
    421  *
    422  * Note that a MapCR3 call is usually not followed by an UnmapCR3 call; whenever
    423  * CR3 is updated we simply call MapCR3 again.
    424  *
    425  * @returns Strict VBox status code.
    426  * @retval  VINF_SUCCESS.
    427  * @retval  VINF_PGM_SYNC_CR3 if the shadow page pool overflowed.
    428  *
    429  * @param   pVM             VM handle.
    430  * @param   GCPhysCR3       The physical address in the CR3 register.
    431  */
    432 PGM_GST_DECL(int, MapCR3)(PVM pVM, RTGCPHYS GCPhysCR3)
    433 {
    434 #if PGM_GST_TYPE == PGM_TYPE_32BIT \
    435  || PGM_GST_TYPE == PGM_TYPE_PAE \
    436  || PGM_GST_TYPE == PGM_TYPE_AMD64
    437 
    438     LogFlow(("MapCR3: %RGp\n", GCPhysCR3));
    439 
    440     /*
    441      * Map the page CR3 points at.
    442      */
    443     RTHCPHYS    HCPhysGuestCR3;
    444     RTHCPTR     HCPtrGuestCR3;
    445     int rc = pgmRamGCPhys2HCPtrAndHCPhysWithFlags(&pVM->pgm.s, GCPhysCR3 & GST_CR3_PAGE_MASK, &HCPtrGuestCR3, &HCPhysGuestCR3);
    446     if (RT_SUCCESS(rc))
    447     {
    448         rc = PGMMap(pVM, (RTGCPTR)pVM->pgm.s.GCPtrCR3Mapping, HCPhysGuestCR3, PAGE_SIZE, 0);
    449         if (RT_SUCCESS(rc))
    450         {
    451             PGM_INVL_PG(pVM->pgm.s.GCPtrCR3Mapping);
    452 # if PGM_GST_TYPE == PGM_TYPE_32BIT
    453             pVM->pgm.s.pGst32BitPdR3 = (R3PTRTYPE(PX86PD))HCPtrGuestCR3;
    454 #  ifndef VBOX_WITH_2X_4GB_ADDR_SPACE
    455             pVM->pgm.s.pGst32BitPdR0 = (R0PTRTYPE(PX86PD))HCPtrGuestCR3;
    456 #  endif
    457             pVM->pgm.s.pGst32BitPdRC = (RCPTRTYPE(PX86PD))pVM->pgm.s.GCPtrCR3Mapping;
    458 
    459 # elif PGM_GST_TYPE == PGM_TYPE_PAE
    460             unsigned off = GCPhysCR3 & GST_CR3_PAGE_MASK & PAGE_OFFSET_MASK;
    461             pVM->pgm.s.pGstPaePdptR3 = (R3PTRTYPE(PX86PDPT))HCPtrGuestCR3;
    462 #  ifndef VBOX_WITH_2X_4GB_ADDR_SPACE
    463             pVM->pgm.s.pGstPaePdptR0 = (R0PTRTYPE(PX86PDPT))HCPtrGuestCR3;
    464 #  endif
    465             pVM->pgm.s.pGstPaePdptRC = (RCPTRTYPE(PX86PDPT))((RCPTRTYPE(uint8_t *))pVM->pgm.s.GCPtrCR3Mapping + off);
    466             Log(("Cached mapping %RGv\n", pVM->pgm.s.pGstPaePdptRC));
    467 
    468             /*
    469              * Map the 4 PDs too.
    470              */
    471             PX86PDPT pGuestPDPT = pgmGstGetPaePDPTPtr(&pVM->pgm.s);
    472             RTGCPTR GCPtr = pVM->pgm.s.GCPtrCR3Mapping + PAGE_SIZE;
    473             for (unsigned i = 0; i < X86_PG_PAE_PDPE_ENTRIES; i++, GCPtr += PAGE_SIZE)
    474             {
    475                 if (pGuestPDPT->a[i].n.u1Present)
    476                 {
    477                     RTHCPTR     HCPtr;
    478                     RTHCPHYS    HCPhys;
    479                     RTGCPHYS    GCPhys = pGuestPDPT->a[i].u & X86_PDPE_PG_MASK;
    480                     int rc2 = pgmRamGCPhys2HCPtrAndHCPhysWithFlags(&pVM->pgm.s, GCPhys, &HCPtr, &HCPhys);
    481                     if (RT_SUCCESS(rc2))
    482                     {
    483                         rc = PGMMap(pVM, GCPtr, HCPhys & X86_PTE_PAE_PG_MASK, PAGE_SIZE, 0);
    484                         AssertRCReturn(rc, rc);
    485 
    486                         pVM->pgm.s.apGstPaePDsR3[i]     = (R3PTRTYPE(PX86PDPAE))HCPtr;
    487 #  ifndef VBOX_WITH_2X_4GB_ADDR_SPACE
    488                         pVM->pgm.s.apGstPaePDsR0[i]     = (R0PTRTYPE(PX86PDPAE))HCPtr;
    489 #  endif
    490                         pVM->pgm.s.apGstPaePDsRC[i]     = (RCPTRTYPE(PX86PDPAE))GCPtr;
    491                         pVM->pgm.s.aGCPhysGstPaePDs[i]  = GCPhys;
    492                         PGM_INVL_PG(GCPtr); /** @todo This ends up calling HWACCMInvalidatePage, is that correct? */
    493                         continue;
    494                     }
    495                     AssertMsgFailed(("pgmR3Gst32BitMapCR3: rc2=%d GCPhys=%RGp i=%d\n", rc2, GCPhys, i));
    496                 }
    497 
    498                 pVM->pgm.s.apGstPaePDsR3[i]     = 0;
    499 #  ifndef VBOX_WITH_2X_4GB_ADDR_SPACE
    500                 pVM->pgm.s.apGstPaePDsR0[i]     = 0;
    501 #  endif
    502                 pVM->pgm.s.apGstPaePDsRC[i]     = 0;
    503                 pVM->pgm.s.aGCPhysGstPaePDs[i]  = NIL_RTGCPHYS;
    504                 PGM_INVL_PG(GCPtr); /** @todo this shouldn't be necessary? */
    505             }
    506 
    507 # elif PGM_GST_TYPE == PGM_TYPE_AMD64
    508             pVM->pgm.s.pGstAmd64Pml4R3 = (R3PTRTYPE(PX86PML4))HCPtrGuestCR3;
    509 #  ifndef VBOX_WITH_2X_4GB_ADDR_SPACE
    510             pVM->pgm.s.pGstAmd64Pml4R0 = (R0PTRTYPE(PX86PML4))HCPtrGuestCR3;
    511 #  endif
    512             if (!HWACCMIsNestedPagingActive(pVM))
    513             {
    514                 /*
    515                  * Update the shadow root page as well since that's not fixed.
    516                  */
    517                 /** @todo Move this into PGMAllBth.h. */
    518                 PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
    519                 if (pVM->pgm.s.CTX_SUFF(pShwPageCR3))
    520                 {
    521                     /* It might have been freed already by a pool flush (see e.g. PGMR3MappingsUnfix). */
    522                     /** @todo Coordinate this better with the pool. */
    523                     if (pVM->pgm.s.CTX_SUFF(pShwPageCR3)->enmKind != PGMPOOLKIND_FREE)
    524                         pgmPoolFreeByPage(pPool, pVM->pgm.s.CTX_SUFF(pShwPageCR3), PGMPOOL_IDX_AMD64_CR3, pVM->pgm.s.CTX_SUFF(pShwPageCR3)->GCPhys >> PAGE_SHIFT);
    525                     pVM->pgm.s.pShwPageCR3R3 = 0;
    526                     pVM->pgm.s.pShwPageCR3R0 = 0;
    527                     pVM->pgm.s.pShwRootR3    = 0;
    528 #  ifndef VBOX_WITH_2X_4GB_ADDR_SPACE
    529                     pVM->pgm.s.pShwRootR0    = 0;
    530 #  endif
    531                     pVM->pgm.s.HCPhysShwCR3  = 0;
    532                 }
    533 
    534                 Assert(!(GCPhysCR3 >> (PAGE_SHIFT + 32)));
    535                 rc = pgmPoolAlloc(pVM, GCPhysCR3, PGMPOOLKIND_64BIT_PML4_FOR_64BIT_PML4, PGMPOOL_IDX_AMD64_CR3, GCPhysCR3 >> PAGE_SHIFT, &pVM->pgm.s.CTX_SUFF(pShwPageCR3));
    536                 if (rc == VERR_PGM_POOL_FLUSHED)
    537                 {
    538                     Log(("MapCR3: PGM pool flushed -> signal sync cr3\n"));
    539                     Assert(VM_FF_ISSET(pVM, VM_FF_PGM_SYNC_CR3));
    540                     return VINF_PGM_SYNC_CR3;
    541                 }
    542                 AssertRCReturn(rc, rc);
    543 #  ifdef IN_RING0
    544                 pVM->pgm.s.pShwPageCR3R3 = MMHyperCCToR3(pVM, pVM->pgm.s.CTX_SUFF(pShwPageCR3));
    545 #  else
    546                 pVM->pgm.s.pShwPageCR3R0 = MMHyperCCToR0(pVM, pVM->pgm.s.CTX_SUFF(pShwPageCR3));
    547 #  endif
    548                 pVM->pgm.s.pShwRootR3    = (R3PTRTYPE(void *))pVM->pgm.s.CTX_SUFF(pShwPageCR3)->pvPageR3;
    549                 Assert(pVM->pgm.s.pShwRootR3);
    550 #  ifndef VBOX_WITH_2X_4GB_ADDR_SPACE
    551                 pVM->pgm.s.pShwRootR0    = (R0PTRTYPE(void *))PGMPOOL_PAGE_2_PTR(pPool->CTX_SUFF(pVM), pVM->pgm.s.CTX_SUFF(pShwPageCR3));
    552 #  endif
    553                 pVM->pgm.s.HCPhysShwCR3  = pVM->pgm.s.CTX_SUFF(pShwPageCR3)->Core.Key;
    554                 rc = VINF_SUCCESS; /* clear it - pgmPoolAlloc returns hints. */
    555             }
    556 # endif
    557         }
    558         else
    559             AssertMsgFailed(("rc=%Rrc GCPhysGuestPD=%RGp\n", rc, GCPhysCR3));
    560     }
    561     else
    562         AssertMsgFailed(("rc=%Rrc GCPhysGuestPD=%RGp\n", rc, GCPhysCR3));
    563 
    564 #else /* prot/real stub */
    565     int rc = VINF_SUCCESS;
    566 #endif
    567     return rc;
    568 }
    569 
    570 
    571 /**
    572  * Unmaps the CR3.
    573  *
    574  * @returns VBox status, no specials.
    575  * @param   pVM             VM handle.
    576  */
    577 PGM_GST_DECL(int, UnmapCR3)(PVM pVM)
    578 {
    579     LogFlow(("UnmapCR3\n"));
    580 
    581     int rc = VINF_SUCCESS;
    582 
    583 #if PGM_GST_TYPE == PGM_TYPE_32BIT
    584     pVM->pgm.s.pGst32BitPdR3 = 0;
    585 #ifndef VBOX_WITH_2X_4GB_ADDR_SPACE
    586     pVM->pgm.s.pGst32BitPdR0 = 0;
    587 #endif
    588     pVM->pgm.s.pGst32BitPdRC = 0;
    589 
    590 #elif PGM_GST_TYPE == PGM_TYPE_PAE
    591     pVM->pgm.s.pGstPaePdptR3 = 0;
    592 # ifndef VBOX_WITH_2X_4GB_ADDR_SPACE
    593     pVM->pgm.s.pGstPaePdptR0 = 0;
    594 # endif
    595     pVM->pgm.s.pGstPaePdptRC = 0;
    596     for (unsigned i = 0; i < X86_PG_PAE_PDPE_ENTRIES; i++)
    597     {
    598         pVM->pgm.s.apGstPaePDsR3[i]    = 0;
    599 # ifndef VBOX_WITH_2X_4GB_ADDR_SPACE
    600         pVM->pgm.s.apGstPaePDsR0[i]    = 0;
    601 # endif
    602         pVM->pgm.s.apGstPaePDsRC[i]    = 0;
    603         pVM->pgm.s.aGCPhysGstPaePDs[i] = NIL_RTGCPHYS;
    604     }
    605 
    606 #elif PGM_GST_TYPE == PGM_TYPE_AMD64
    607     pVM->pgm.s.pGstAmd64Pml4R3 = 0;
    608 # ifndef VBOX_WITH_2X_4GB_ADDR_SPACE
    609     pVM->pgm.s.pGstAmd64Pml4R0 = 0;
    610 # endif
    611     if (!HWACCMIsNestedPagingActive(pVM))
    612     {
    613         pVM->pgm.s.pShwRootR3 = 0;
    614 # ifndef VBOX_WITH_2X_4GB_ADDR_SPACE
    615         pVM->pgm.s.pShwRootR0 = 0;
    616 # endif
    617         pVM->pgm.s.HCPhysShwCR3 = 0;
    618         if (pVM->pgm.s.CTX_SUFF(pShwPageCR3))
    619         {
    620             PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
    621             pgmPoolFreeByPage(pPool, pVM->pgm.s.CTX_SUFF(pShwPageCR3), PGMPOOL_IDX_AMD64_CR3, pVM->pgm.s.CTX_SUFF(pShwPageCR3)->GCPhys >> PAGE_SHIFT);
    622             pVM->pgm.s.pShwPageCR3R3 = 0;
    623             pVM->pgm.s.pShwPageCR3R0 = 0;
    624         }
    625     }
    626 
    627 #else /* prot/real mode stub */
    628     /* nothing to do */
    629 #endif
    630     return rc;
    631413}
    632414

  • trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp

    r16300 r16317  
    694694            }
    695695
    696             case PGMPOOLKIND_64BIT_PML4_FOR_64BIT_PML4:
     696            case PGMPOOLKIND_64BIT_PML4:
    697697            {
    698698                /*
    … …  
    12941294                case PGMPOOLKIND_64BIT_PD_FOR_64BIT_PD:
    12951295                case PGMPOOLKIND_64BIT_PDPT_FOR_64BIT_PDPT:
    1296                 case PGMPOOLKIND_64BIT_PML4_FOR_64BIT_PML4:
     1296                case PGMPOOLKIND_64BIT_PML4:
    12971297                case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
    12981298                case PGMPOOLKIND_32BIT_PT_FOR_PHYS:
    … …  
    13151315        case PGMPOOLKIND_64BIT_PD_FOR_64BIT_PD:
    13161316        case PGMPOOLKIND_64BIT_PDPT_FOR_64BIT_PDPT:
    1317         case PGMPOOLKIND_64BIT_PML4_FOR_64BIT_PML4:
     1317        case PGMPOOLKIND_64BIT_PML4:
    13181318        case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
    13191319            switch (enmKind2)
    … …  
    15351535                case PGMPOOLKIND_64BIT_PD_FOR_64BIT_PD:
    15361536                case PGMPOOLKIND_64BIT_PDPT_FOR_64BIT_PDPT:
    1537                 case PGMPOOLKIND_64BIT_PML4_FOR_64BIT_PML4:
     1537                case PGMPOOLKIND_64BIT_PML4:
    15381538#ifdef VBOX_WITH_PGMPOOL_PAGING_ONLY
    15391539                case PGMPOOLKIND_32BIT_PD:
    … …  
    16041604        case PGMPOOLKIND_64BIT_PD_FOR_64BIT_PD:
    16051605        case PGMPOOLKIND_64BIT_PDPT_FOR_64BIT_PDPT:
    1606         case PGMPOOLKIND_64BIT_PML4_FOR_64BIT_PML4:
     1606        case PGMPOOLKIND_64BIT_PML4:
    16071607#ifdef VBOX_WITH_PGMPOOL_PAGING_ONLY
    16081608        case PGMPOOLKIND_32BIT_PD:
    … …  
    16991699        case PGMPOOLKIND_64BIT_PD_FOR_64BIT_PD:
    17001700        case PGMPOOLKIND_64BIT_PDPT_FOR_64BIT_PDPT:
    1701         case PGMPOOLKIND_64BIT_PML4_FOR_64BIT_PML4:
     1701        case PGMPOOLKIND_64BIT_PML4:
    17021702#ifdef VBOX_WITH_PGMPOOL_PAGING_ONLY
    17031703        case PGMPOOLKIND_32BIT_PD:
    … …  
    24492449        case PGMPOOLKIND_64BIT_PD_FOR_64BIT_PD:
    24502450        case PGMPOOLKIND_64BIT_PDPT_FOR_64BIT_PDPT:
    2451         case PGMPOOLKIND_64BIT_PML4_FOR_64BIT_PML4:
     2451        case PGMPOOLKIND_64BIT_PML4:
    24522452#ifndef VBOX_WITH_PGMPOOL_PAGING_ONLY
    24532453        case PGMPOOLKIND_ROOT_PAE_PD:
    … …  
    24992499        case PGMPOOLKIND_64BIT_PD_FOR_64BIT_PD:
    25002500        case PGMPOOLKIND_64BIT_PDPT_FOR_64BIT_PDPT:
    2501         case PGMPOOLKIND_64BIT_PML4_FOR_64BIT_PML4:
     2501        case PGMPOOLKIND_64BIT_PML4:
    25022502#ifdef VBOX_WITH_PGMPOOL_PAGING_ONLY
    25032503        case PGMPOOLKIND_PAE_PDPT:
    … …  
    28832883            Assert(!(u.pau64[iUserTable] & PGM_PLXFLAGS_PERMANENT));
    28842884            break;
    2885         case PGMPOOLKIND_64BIT_PML4_FOR_64BIT_PML4:
     2885        case PGMPOOLKIND_64BIT_PML4:
    28862886            Assert(!(u.pau64[iUserTable] & PGM_PLXFLAGS_PERMANENT));
    28872887            /* GCPhys >> PAGE_SHIFT is the index here */
    … …  
    29262926        case PGMPOOLKIND_64BIT_PD_FOR_64BIT_PD:
    29272927        case PGMPOOLKIND_64BIT_PDPT_FOR_64BIT_PDPT:
    2928         case PGMPOOLKIND_64BIT_PML4_FOR_64BIT_PML4:
     2928        case PGMPOOLKIND_64BIT_PML4:
    29292929        case PGMPOOLKIND_64BIT_PDPT_FOR_PHYS:
    29302930        case PGMPOOLKIND_64BIT_PD_FOR_PHYS:
    … …  
    37113711            break;
    37123712
    3713         case PGMPOOLKIND_64BIT_PML4_FOR_64BIT_PML4:
     3713        case PGMPOOLKIND_64BIT_PML4:
    37143714            pgmPoolTrackDerefPML464Bit(pPool, pPage, (PX86PML4)pvShw);
    37153715            break;
    … …  
    40184018    if (PGMGetHyperCR3(pPool->CTX_SUFF(pVM)) == pPage->Core.Key)
    40194019    {
    4020         AssertMsg(pPage->enmKind == PGMPOOLKIND_64BIT_PML4_FOR_64BIT_PML4,
     4020        AssertMsg(pPage->enmKind == PGMPOOLKIND_64BIT_PML4,
    40214021                  ("Can't free the shadow CR3! (%RHp vs %RHp kind=%d\n", PGMGetHyperCR3(pPool->CTX_SUFF(pVM)), pPage->Core.Key, pPage->enmKind));
    40224022        Log(("pgmPoolFlushPage: current active shadow CR3, rejected. enmKind=%d idx=%d\n", pPage->enmKind, pPage->idx));

  • trunk/src/VBox/VMM/VMMAll/PGMAllShw.h

    r14147 r16317  
    9797# define SHW_PT_SHIFT           X86_PT_PAE_SHIFT
    9898# define SHW_PT_MASK            X86_PT_PAE_MASK
     99
    99100# if PGM_SHW_TYPE == PGM_TYPE_AMD64
    100101#  define SHW_PDPT_SHIFT        X86_PDPT_SHIFT
    … …  
    102103#  define SHW_PDPE_PG_MASK      X86_PDPE_PG_MASK
    103104#  define SHW_TOTAL_PD_ENTRIES  (X86_PG_AMD64_ENTRIES*X86_PG_AMD64_PDPE_ENTRIES)
    104 #  define SHW_POOL_ROOT_IDX     PGMPOOL_IDX_PAE_PD      /* do not use! exception is real mode & protected mode without paging. */
     105#  define SHW_POOL_ROOT_IDX     PGMPOOL_IDX_AMD64_CR3
     106
    105107# else /* 32 bits PAE mode */
    106108#  define SHW_PDPT_SHIFT        X86_PDPT_SHIFT
    … …  
    109111#  define SHW_TOTAL_PD_ENTRIES  (X86_PG_PAE_ENTRIES*X86_PG_PAE_PDPE_ENTRIES)
    110112#  define SHW_POOL_ROOT_IDX     PGMPOOL_IDX_PAE_PD
     113
    111114# endif
    112115#endif

  • trunk/src/VBox/VMM/testcase/tstVMStructGC.cpp

    r16203 r16317  
    469469    GEN_CHECK_OFF(PGM, pfnR3GstUnmonitorCR3);
    470470#endif
    471     GEN_CHECK_OFF(PGM, pfnR3GstMapCR3);
    472     GEN_CHECK_OFF(PGM, pfnR3GstUnmapCR3);
     471    GEN_CHECK_OFF(PGM, pfnR3BthMapCR3);
     472    GEN_CHECK_OFF(PGM, pfnR3BthUnmapCR3);
    473473    GEN_CHECK_OFF(PGM, pfnR3GstGetPage);
    474474    GEN_CHECK_OFF(PGM, pfnR3GstModifyPage);
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