VirtualBox

Changeset 105789 in vbox


Ignore:
Timestamp:
Aug 21, 2024 5:45:44 PM (5 weeks ago)
Author:
vboxsync
Message:

Disassembler/ARMv8: Move the mask bits from the opcode into the class where it belongs as the mask should be always the same in one class, saves a bit of memory space and reduces risk of introducing errors with wrong masks, bugref:10394

Location:
trunk/src/VBox/Disassembler
Files:
3 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/Disassembler/DisasmCore-armv8.cpp

    r105785 r105789  
    462462    AssertPtr(pOp);
    463463    AssertPtr(pDis);
    464     Assert((u32Insn & pOp->fMask) == pOp->fValue);
     464    Assert((u32Insn & pInsnClass->fFixedInsn) == pOp->fValue);
    465465
    466466    /* Should contain the parameter type on input. */

  • trunk/src/VBox/Disassembler/DisasmInternal-armv8.h

    r105785 r105789  
    7777typedef struct DISARMV8OPCODE
    7878{
    79     /** The mask defining the static bits of the opcode. */
    80     uint32_t            fMask;
    8179    /** The value of masked bits of the isntruction. */
    8280    uint32_t            fValue;
    … …  
    159157    /** Pointer to the arry of opcodes. */
    160158    PCDISARMV8OPCODE        paOpcodes;
     159    /** The mask of fixed instruction bits. */
     160    uint32_t                fFixedInsn;
    161161    /** Some flags for this instruction class. */
    162162    uint32_t                fClass;
    … …  
    185185#define DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(a_Name) \
    186186    static const DISARMV8OPCODE a_Name ## Opcodes[] = {
    187 #define DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_4(a_Name, a_fClass, a_enmOpcDecode, a_fMask, a_cShift, \
     187#define DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_4(a_Name, a_fFixedInsn, a_fClass, a_enmOpcDecode, a_fMask, a_cShift, \
    188188                                                    a_enmParamType1, a_enmParamType2, a_enmParamType3, a_enmParamType4) \
    189189    }; \
    190190    static const DISARMV8INSNCLASS a_Name = { { kDisArmV8DecodeType_InsnClass, RT_ELEMENTS(a_Name ## Opcodes) }, &a_Name ## Opcodes[0],\
    191                                               a_fClass, a_enmOpcDecode, a_fMask, a_cShift, \
     191                                              a_fFixedInsn, a_fClass, a_enmOpcDecode, a_fMask, a_cShift, \
    192192                                              { a_enmParamType1, a_enmParamType2, a_enmParamType3, a_enmParamType4 }, {
    193 #define DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_3(a_Name, a_fClass, a_enmOpcDecode, a_fMask, a_cShift, \
     193#define DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_3(a_Name, a_fFixedInsn, a_fClass, a_enmOpcDecode, a_fMask, a_cShift, \
    194194                                                    a_enmParamType1, a_enmParamType2, a_enmParamType3) \
    195     DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_4(a_Name, a_fClass, a_enmOpcDecode, a_fMask, a_cShift, \
     195    DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_4(a_Name, a_fFixedInsn, a_fClass, a_enmOpcDecode, a_fMask, a_cShift, \
    196196                                                a_enmParamType1, a_enmParamType2, a_enmParamType3, kDisArmv8OpParmNone)
    197 #define DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_2(a_Name, a_fClass, a_enmOpcDecode, a_fMask, a_cShift, \
     197#define DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_2(a_Name, a_fFixedInsn, a_fClass, a_enmOpcDecode, a_fMask, a_cShift, \
    198198                                                    a_enmParamType1, a_enmParamType2) \
    199     DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_3(a_Name, a_fClass, a_enmOpcDecode, a_fMask, a_cShift, \
     199    DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_3(a_Name, a_fFixedInsn, a_fClass, a_enmOpcDecode, a_fMask, a_cShift, \
    200200                                                a_enmParamType1, a_enmParamType2, kDisArmv8OpParmNone)
    201 #define DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_1(a_Name, a_fClass, a_enmOpcDecode, a_fMask, a_cShift, \
     201#define DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_1(a_Name, a_fFixedInsn, a_fClass, a_enmOpcDecode, a_fMask, a_cShift, \
    202202                                                    a_enmParamType1) \
    203     DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_2(a_Name, a_fClass, a_enmOpcDecode, a_fMask, a_cShift, \
     203    DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_2(a_Name, a_fFixedInsn, a_fClass, a_enmOpcDecode, a_fMask, a_cShift, \
    204204                                                a_enmParamType1, kDisArmv8OpParmNone)
    205 #define DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_0(a_Name, a_fClass, a_enmOpcDecode, a_fMask, a_cShift) \
    206     DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_1(a_Name, a_fClass, a_enmOpcDecode, a_fMask, a_cShift, \
     205#define DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_0(a_Name, a_fFixedInsn, a_fClass, a_enmOpcDecode, a_fMask, a_cShift) \
     206    DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_1(a_Name, a_fFixedInsn, a_fClass, a_enmOpcDecode, a_fMask, a_cShift, \
    207207                                                kDisArmv8OpParmNone)
    208208

  • trunk/src/VBox/Disassembler/DisasmTables-armv8-a64.cpp

    r105785 r105789  
    3939*********************************************************************************************************************************/
    4040
    41 #define DIS_ARMV8_OP(a_fMask, a_fValue, a_szOpcode, a_uOpcode, a_fOpType) \
    42     { a_fMask, a_fValue, OP(a_szOpcode, 0, 0, 0, a_uOpcode, 0, 0, 0, a_fOpType) }
     41#define DIS_ARMV8_OP(a_fValue, a_szOpcode, a_uOpcode, a_fOpType) \
     42    { a_fValue, OP(a_szOpcode, 0, 0, 0, a_uOpcode, 0, 0, 0, a_fOpType) }
    4343
    4444#ifndef DIS_CORE_ONLY
    … …  
    4747
    4848#define INVALID_OPCODE  \
    49     DIS_ARMV8_OP(0xffffffff, 0, g_szInvalidOpcode,    OP_ARMV8_INVALID, DISOPTYPE_INVALID)
     49    DIS_ARMV8_OP(0, g_szInvalidOpcode,    OP_ARMV8_INVALID, DISOPTYPE_INVALID)
    5050
    5151
    … …  
    5959/* UDF */
    6060DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(g_aArmV8A64InsnRsvd)
    61     DIS_ARMV8_OP(0xffff0000, 0x00000000, "udf" ,            OP_ARMV8_A64_UDF,       DISOPTYPE_INVALID)
    62 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_1(g_aArmV8A64InsnRsvd, 0 /*fClass*/,
     61    DIS_ARMV8_OP(0x00000000, "udf" ,            OP_ARMV8_A64_UDF,       DISOPTYPE_INVALID)
     62DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_1(g_aArmV8A64InsnRsvd, 0xffff0000 /*fFixedInsn*/, 0 /*fClass*/,
    6363                                            kDisArmV8OpcDecodeNop, 0xffff0000, 16,
    6464                                            kDisArmv8OpParmImm)
    … …  
    7373/* ADR/ADRP */
    7474DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(g_ArmV8A64Adr)
    75     DIS_ARMV8_OP(0x9f000000, 0x10000000, "adr" ,            OP_ARMV8_A64_ADR,       DISOPTYPE_HARMLESS),
    76     DIS_ARMV8_OP(0x9f000000, 0x90000000, "adrp" ,           OP_ARMV8_A64_ADRP,      DISOPTYPE_HARMLESS)
    77 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_2(g_ArmV8A64Adr, DISARMV8INSNCLASS_F_FORCED_64BIT,
     75    DIS_ARMV8_OP(0x10000000, "adr" ,            OP_ARMV8_A64_ADR,       DISOPTYPE_HARMLESS),
     76    DIS_ARMV8_OP(0x90000000, "adrp" ,           OP_ARMV8_A64_ADRP,      DISOPTYPE_HARMLESS)
     77DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_2(g_ArmV8A64Adr, 0x9f000000 /*fFixedInsn*/, DISARMV8INSNCLASS_F_FORCED_64BIT,
    7878                                            kDisArmV8OpcDecodeNop, RT_BIT_32(31), 31,
    7979                                            kDisArmv8OpParmGpr, kDisArmv8OpParmImmRel)
    … …  
    8888/* ADD/ADDS/SUB/SUBS */
    8989DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(g_ArmV8A64AddSubImm)
    90     DIS_ARMV8_OP(0x7f800000, 0x11000000, "add" ,            OP_ARMV8_A64_ADD,       DISOPTYPE_HARMLESS),
    91     DIS_ARMV8_OP(0x7f800000, 0x31000000, "adds" ,           OP_ARMV8_A64_ADDS,      DISOPTYPE_HARMLESS),
    92     DIS_ARMV8_OP(0x7f800000, 0x51000000, "sub" ,            OP_ARMV8_A64_SUB,       DISOPTYPE_HARMLESS),
    93     DIS_ARMV8_OP(0x7f800000, 0x71000000, "subs" ,           OP_ARMV8_A64_SUBS,      DISOPTYPE_HARMLESS),
    94 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_3(g_ArmV8A64AddSubImm, DISARMV8INSNCLASS_F_SF,
     90    DIS_ARMV8_OP(0x11000000, "add" ,            OP_ARMV8_A64_ADD,       DISOPTYPE_HARMLESS),
     91    DIS_ARMV8_OP(0x31000000, "adds" ,           OP_ARMV8_A64_ADDS,      DISOPTYPE_HARMLESS),
     92    DIS_ARMV8_OP(0x51000000, "sub" ,            OP_ARMV8_A64_SUB,       DISOPTYPE_HARMLESS),
     93    DIS_ARMV8_OP(0x71000000, "subs" ,           OP_ARMV8_A64_SUBS,      DISOPTYPE_HARMLESS),
     94DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_3(g_ArmV8A64AddSubImm, 0x7f800000 /*fFixedInsn*/, DISARMV8INSNCLASS_F_SF,
    9595                                            kDisArmV8OpcDecodeNop, RT_BIT_32(29) | RT_BIT_32(30), 29,
    9696                                            kDisArmv8OpParmGpr, kDisArmv8OpParmGpr, kDisArmv8OpParmImm)
    … …  
    105105/* AND/ORR/EOR/ANDS */
    106106DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(g_ArmV8A64LogicalImm)
    107     DIS_ARMV8_OP(0x7f800000, 0x12000000, "and" ,            OP_ARMV8_A64_AND,       DISOPTYPE_HARMLESS),
    108     DIS_ARMV8_OP(0x7f800000, 0x32000000, "orr" ,            OP_ARMV8_A64_ORR,       DISOPTYPE_HARMLESS),
    109     DIS_ARMV8_OP(0x7f800000, 0x52000000, "eor" ,            OP_ARMV8_A64_EOR,       DISOPTYPE_HARMLESS),
    110     DIS_ARMV8_OP(0x7f800000, 0x72000000, "ands" ,           OP_ARMV8_A64_ANDS,      DISOPTYPE_HARMLESS),
    111 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_3(g_ArmV8A64LogicalImm, DISARMV8INSNCLASS_F_SF,
     107    DIS_ARMV8_OP(0x12000000, "and" ,            OP_ARMV8_A64_AND,       DISOPTYPE_HARMLESS),
     108    DIS_ARMV8_OP(0x32000000, "orr" ,            OP_ARMV8_A64_ORR,       DISOPTYPE_HARMLESS),
     109    DIS_ARMV8_OP(0x52000000, "eor" ,            OP_ARMV8_A64_EOR,       DISOPTYPE_HARMLESS),
     110    DIS_ARMV8_OP(0x72000000, "ands" ,           OP_ARMV8_A64_ANDS,      DISOPTYPE_HARMLESS),
     111DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_3(g_ArmV8A64LogicalImm, 0x7f800000 /*fFixedInsn*/, DISARMV8INSNCLASS_F_SF,
    112112                                            kDisArmV8OpcDecodeNop, RT_BIT_32(29) | RT_BIT_32(30), 29,
    113113                                            kDisArmv8OpParmGpr, kDisArmv8OpParmGpr, kDisArmv8OpParmImm)
    … …  
    122122/* MOVN/MOVZ/MOVK */
    123123DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(g_ArmV8A64MoveWide)
    124     DIS_ARMV8_OP(0x7f800000, 0x12800000, "movn",            OP_ARMV8_A64_MOVN,      DISOPTYPE_HARMLESS),
     124    DIS_ARMV8_OP(0x12800000, "movn",            OP_ARMV8_A64_MOVN,      DISOPTYPE_HARMLESS),
    125125    INVALID_OPCODE,
    126     DIS_ARMV8_OP(0x7f800000, 0x52800000, "movz" ,           OP_ARMV8_A64_MOVZ,      DISOPTYPE_HARMLESS),
    127     DIS_ARMV8_OP(0x7f800000, 0x72800000, "movk" ,           OP_ARMV8_A64_MOVK,      DISOPTYPE_HARMLESS),
    128 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_2(g_ArmV8A64MoveWide, DISARMV8INSNCLASS_F_SF,
     126    DIS_ARMV8_OP(0x52800000, "movz" ,           OP_ARMV8_A64_MOVZ,      DISOPTYPE_HARMLESS),
     127    DIS_ARMV8_OP(0x72800000, "movk" ,           OP_ARMV8_A64_MOVK,      DISOPTYPE_HARMLESS),
     128DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_2(g_ArmV8A64MoveWide, 0x7f800000 /*fFixedInsn*/, DISARMV8INSNCLASS_F_SF,
    129129                                            kDisArmV8OpcDecodeNop, RT_BIT_32(29) | RT_BIT_32(30), 29,
    130130                                            kDisArmv8OpParmGpr, kDisArmv8OpParmImm)
    … …  
    139139/* SBFM/BFM/UBFM */
    140140DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(g_ArmV8A64Bitfield)
    141     DIS_ARMV8_OP(0x7f800000, 0x13000000, "sbfm",            OP_ARMV8_A64_SBFM,      DISOPTYPE_HARMLESS),
    142     DIS_ARMV8_OP(0x7f800000, 0x33000000, "bfm",             OP_ARMV8_A64_BFM,       DISOPTYPE_HARMLESS),
    143     DIS_ARMV8_OP(0x7f800000, 0x53000000, "ubfm",            OP_ARMV8_A64_UBFM,      DISOPTYPE_HARMLESS),
     141    DIS_ARMV8_OP(0x13000000, "sbfm",            OP_ARMV8_A64_SBFM,      DISOPTYPE_HARMLESS),
     142    DIS_ARMV8_OP(0x33000000, "bfm",             OP_ARMV8_A64_BFM,       DISOPTYPE_HARMLESS),
     143    DIS_ARMV8_OP(0x53000000, "ubfm",            OP_ARMV8_A64_UBFM,      DISOPTYPE_HARMLESS),
    144144    INVALID_OPCODE,
    145 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_4(g_ArmV8A64Bitfield, DISARMV8INSNCLASS_F_SF | DISARMV8INSNCLASS_F_N_FORCED_1_ON_64BIT,
     145DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_4(g_ArmV8A64Bitfield, 0x7f800000 /*fFixedInsn*/, DISARMV8INSNCLASS_F_SF | DISARMV8INSNCLASS_F_N_FORCED_1_ON_64BIT,
    146146                                            kDisArmV8OpcDecodeNop, RT_BIT_32(29) | RT_BIT_32(30), 29,
    147147                                            kDisArmv8OpParmGpr, kDisArmv8OpParmGpr, kDisArmv8OpParmImm, kDisArmv8OpParmImm)
    … …  
    182182/* B.cond/BC.cond */
    183183DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(g_ArmV8A64CondBr)
    184     DIS_ARMV8_OP(0xff000010, 0x54000000, "b",               OP_ARMV8_A64_B,         DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW | DISOPTYPE_RELATIVE_CONTROLFLOW | DISOPTYPE_COND_CONTROLFLOW),
    185     DIS_ARMV8_OP(0xff000010, 0x54000010, "bc" ,             OP_ARMV8_A64_BC,        DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW | DISOPTYPE_RELATIVE_CONTROLFLOW | DISOPTYPE_COND_CONTROLFLOW),
    186 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_1(g_ArmV8A64CondBr, 0 /*fClass*/,
     184    DIS_ARMV8_OP(0x54000000, "b",               OP_ARMV8_A64_B,         DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW | DISOPTYPE_RELATIVE_CONTROLFLOW | DISOPTYPE_COND_CONTROLFLOW),
     185    DIS_ARMV8_OP(0x54000010, "bc" ,             OP_ARMV8_A64_BC,        DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW | DISOPTYPE_RELATIVE_CONTROLFLOW | DISOPTYPE_COND_CONTROLFLOW),
     186DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_1(g_ArmV8A64CondBr, 0xff000010 /*fFixedInsn*/, 0 /*fClass*/,
    187187                                            kDisArmV8OpcDecodeNop, RT_BIT_32(4), 4,
    188188                                            kDisArmv8OpParmImmRel)
    … …  
    197197/* SVC/HVC/SMC/BRK/HLT/TCANCEL/DCPS1/DCPS2/DCPS3 */
    198198DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(g_ArmV8A64Excp)
    199     DIS_ARMV8_OP(0xffe0001f, 0xd4000001, "svc",             OP_ARMV8_A64_SVC,       DISOPTYPE_CONTROLFLOW | DISOPTYPE_INTERRUPT),
    200     DIS_ARMV8_OP(0xffe0001f, 0xd4000002, "hvc",             OP_ARMV8_A64_HVC,       DISOPTYPE_CONTROLFLOW | DISOPTYPE_INTERRUPT | DISOPTYPE_PRIVILEGED),
    201     DIS_ARMV8_OP(0xffe0001f, 0xd4000003, "smc",             OP_ARMV8_A64_SMC,       DISOPTYPE_CONTROLFLOW | DISOPTYPE_INTERRUPT | DISOPTYPE_PRIVILEGED),
    202     DIS_ARMV8_OP(0xffe0001f, 0xd4200000, "brk",             OP_ARMV8_A64_BRK,       DISOPTYPE_CONTROLFLOW | DISOPTYPE_INTERRUPT),
    203     DIS_ARMV8_OP(0xffe0001f, 0xd4400000, "hlt",             OP_ARMV8_A64_HLT,       DISOPTYPE_CONTROLFLOW | DISOPTYPE_INTERRUPT),
    204     DIS_ARMV8_OP(0xffe0001f, 0xd4600000, "tcancel",         OP_ARMV8_A64_TCANCEL,   DISOPTYPE_CONTROLFLOW | DISOPTYPE_INTERRUPT), /* FEAT_TME */
    205     DIS_ARMV8_OP(0xffe0001f, 0xd4a00001, "dcps1",           OP_ARMV8_A64_DCPS1,     DISOPTYPE_CONTROLFLOW | DISOPTYPE_INTERRUPT),
    206     DIS_ARMV8_OP(0xffe0001f, 0xd4a00002, "dcps2",           OP_ARMV8_A64_DCPS2,     DISOPTYPE_CONTROLFLOW | DISOPTYPE_INTERRUPT),
    207     DIS_ARMV8_OP(0xffe0001f, 0xd4a00003, "dcps3",           OP_ARMV8_A64_DCPS3,     DISOPTYPE_CONTROLFLOW | DISOPTYPE_INTERRUPT),
    208 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_1(g_ArmV8A64Excp, 0 /*fClass*/,
     199    DIS_ARMV8_OP(0xd4000001, "svc",             OP_ARMV8_A64_SVC,       DISOPTYPE_CONTROLFLOW | DISOPTYPE_INTERRUPT),
     200    DIS_ARMV8_OP(0xd4000002, "hvc",             OP_ARMV8_A64_HVC,       DISOPTYPE_CONTROLFLOW | DISOPTYPE_INTERRUPT | DISOPTYPE_PRIVILEGED),
     201    DIS_ARMV8_OP(0xd4000003, "smc",             OP_ARMV8_A64_SMC,       DISOPTYPE_CONTROLFLOW | DISOPTYPE_INTERRUPT | DISOPTYPE_PRIVILEGED),
     202    DIS_ARMV8_OP(0xd4200000, "brk",             OP_ARMV8_A64_BRK,       DISOPTYPE_CONTROLFLOW | DISOPTYPE_INTERRUPT),
     203    DIS_ARMV8_OP(0xd4400000, "hlt",             OP_ARMV8_A64_HLT,       DISOPTYPE_CONTROLFLOW | DISOPTYPE_INTERRUPT),
     204    DIS_ARMV8_OP(0xd4600000, "tcancel",         OP_ARMV8_A64_TCANCEL,   DISOPTYPE_CONTROLFLOW | DISOPTYPE_INTERRUPT), /* FEAT_TME */
     205    DIS_ARMV8_OP(0xd4a00001, "dcps1",           OP_ARMV8_A64_DCPS1,     DISOPTYPE_CONTROLFLOW | DISOPTYPE_INTERRUPT),
     206    DIS_ARMV8_OP(0xd4a00002, "dcps2",           OP_ARMV8_A64_DCPS2,     DISOPTYPE_CONTROLFLOW | DISOPTYPE_INTERRUPT),
     207    DIS_ARMV8_OP(0xd4a00003, "dcps3",           OP_ARMV8_A64_DCPS3,     DISOPTYPE_CONTROLFLOW | DISOPTYPE_INTERRUPT),
     208DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_1(g_ArmV8A64Excp, 0xffe0001f /*fFixedInsn*/, 0 /*fClass*/,
    209209                                            kDisArmV8OpcDecodeLookup, 0xffe0001f, 0,
    210210                                            kDisArmv8OpParmImm)
    … …  
    219219/* WFET/WFIT */
    220220DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(g_ArmV8A64SysReg)
    221     DIS_ARMV8_OP(0xffffffe0, 0xd5031000, "wfet",            OP_ARMV8_A64_WFET,      DISOPTYPE_HARMLESS), /* FEAT_WFxT */
    222     DIS_ARMV8_OP(0xffffffe0, 0x54000010, "wfit" ,           OP_ARMV8_A64_WFIT,      DISOPTYPE_HARMLESS), /* FEAT_WFxT */
    223 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_1(g_ArmV8A64SysReg, DISARMV8INSNCLASS_F_FORCED_64BIT,
     221    DIS_ARMV8_OP(0xd5031000, "wfet",            OP_ARMV8_A64_WFET,      DISOPTYPE_HARMLESS), /* FEAT_WFxT */
     222    DIS_ARMV8_OP(0x54000010, "wfit" ,           OP_ARMV8_A64_WFIT,      DISOPTYPE_HARMLESS), /* FEAT_WFxT */
     223DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_1(g_ArmV8A64SysReg, 0xffffffe0 /*fFixedInsn*/, DISARMV8INSNCLASS_F_FORCED_64BIT,
    224224                                            kDisArmV8OpcDecodeNop, 0xfe0, 5,
    225225                                            kDisArmv8OpParmGpr)
    … …  
    234234/* Various hint instructions */
    235235DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(g_ArmV8A64Hints)
    236     DIS_ARMV8_OP(0xffffffff, 0xd503201f, "nop",             OP_ARMV8_A64_NOP,       DISOPTYPE_HARMLESS),
    237     DIS_ARMV8_OP(0xffffffff, 0xd503203f, "yield",           OP_ARMV8_A64_YIELD,     DISOPTYPE_HARMLESS),
    238     DIS_ARMV8_OP(0xffffffff, 0xd503205f, "wfe",             OP_ARMV8_A64_WFE,       DISOPTYPE_HARMLESS),
    239     DIS_ARMV8_OP(0xffffffff, 0xd503207f, "wfi",             OP_ARMV8_A64_WFI,       DISOPTYPE_HARMLESS),
    240     DIS_ARMV8_OP(0xffffffff, 0xd503209f, "sev",             OP_ARMV8_A64_SEV,       DISOPTYPE_HARMLESS),
    241     DIS_ARMV8_OP(0xffffffff, 0xd50320bf, "sevl",            OP_ARMV8_A64_SEVL,      DISOPTYPE_HARMLESS),
    242     DIS_ARMV8_OP(0xffffffff, 0xd50320df, "dgh",             OP_ARMV8_A64_DGH,       DISOPTYPE_HARMLESS), /* FEAT_DGH */
    243     DIS_ARMV8_OP(0xffffffff, 0xd50320ff, "xpaclri",         OP_ARMV8_A64_XPACLRI,   DISOPTYPE_HARMLESS), /* FEAT_PAuth */
     236    DIS_ARMV8_OP(0xd503201f, "nop",             OP_ARMV8_A64_NOP,       DISOPTYPE_HARMLESS),
     237    DIS_ARMV8_OP(0xd503203f, "yield",           OP_ARMV8_A64_YIELD,     DISOPTYPE_HARMLESS),
     238    DIS_ARMV8_OP(0xd503205f, "wfe",             OP_ARMV8_A64_WFE,       DISOPTYPE_HARMLESS),
     239    DIS_ARMV8_OP(0xd503207f, "wfi",             OP_ARMV8_A64_WFI,       DISOPTYPE_HARMLESS),
     240    DIS_ARMV8_OP(0xd503209f, "sev",             OP_ARMV8_A64_SEV,       DISOPTYPE_HARMLESS),
     241    DIS_ARMV8_OP(0xd50320bf, "sevl",            OP_ARMV8_A64_SEVL,      DISOPTYPE_HARMLESS),
     242    DIS_ARMV8_OP(0xd50320df, "dgh",             OP_ARMV8_A64_DGH,       DISOPTYPE_HARMLESS), /* FEAT_DGH */
     243    DIS_ARMV8_OP(0xd50320ff, "xpaclri",         OP_ARMV8_A64_XPACLRI,   DISOPTYPE_HARMLESS), /* FEAT_PAuth */
    244244    /** @todo */
    245 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_0(g_ArmV8A64Hints, 0 /*fClass*/,
     245DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_0(g_ArmV8A64Hints, 0xffffffff /*fFixedInsn*/, 0 /*fClass*/,
    246246                                            kDisArmV8OpcDecodeNop, 0xfe0, 5)
    247247    DIS_ARMV8_INSN_PARAM_NONE,
    … …  
    255255/* CLREX */
    256256DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(g_ArmV8A64DecBarriers)
    257     DIS_ARMV8_OP(0xfffff0ff, 0xd503304f, "clrex",           OP_ARMV8_A64_CLREX,     DISOPTYPE_HARMLESS),
    258     DIS_ARMV8_OP(0xfffff0ff, 0xd50330bf, "dmb",             OP_ARMV8_A64_DMB,       DISOPTYPE_HARMLESS),
    259 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_1(g_ArmV8A64DecBarriers, 0 /*fClass*/,
     257    DIS_ARMV8_OP(0xd503304f, "clrex",           OP_ARMV8_A64_CLREX,     DISOPTYPE_HARMLESS),
     258    DIS_ARMV8_OP(0xd50330bf, "dmb",             OP_ARMV8_A64_DMB,       DISOPTYPE_HARMLESS),
     259DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_1(g_ArmV8A64DecBarriers, 0xfffff0ff /*fFixedInsn*/, 0 /*fClass*/,
    260260                                            kDisArmV8OpcDecodeNop, RT_BIT_32(5), 5,
    261261                                            kDisArmv8OpParmImm)
    … …  
    283283/* MSR (and potentially CFINV,XAFLAG,AXFLAG) */
    284284DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(g_ArmV8A64PState)
    285     DIS_ARMV8_OP(0xfffff0ff, 0xd503305f, "msr",             OP_ARMV8_A64_MSR,       DISOPTYPE_PRIVILEGED),
    286 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_2(g_ArmV8A64PState, 0 /*fClass*/,
     285    DIS_ARMV8_OP(0xd503305f, "msr",             OP_ARMV8_A64_MSR,       DISOPTYPE_PRIVILEGED),
     286DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_2(g_ArmV8A64PState, 0xfffff0ff /*fFixedInsn*/, 0 /*fClass*/,
    287287                                            kDisArmV8OpcDecodeNop, 0, 0,
    288288                                            kDisArmv8OpParmImm, kDisArmv8OpParmNone) /** @todo */
    … …  
    297297/* TSTART/TTEST */
    298298DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(g_ArmV8A64SysResult)
    299     DIS_ARMV8_OP(0xfffffffe, 0xd5233060, "tstart",          OP_ARMV8_A64_TSTART,    DISOPTYPE_HARMLESS | DISOPTYPE_PRIVILEGED),  /* FEAT_TME */
    300     DIS_ARMV8_OP(0xfffffffe, 0xd5233160, "ttest",           OP_ARMV8_A64_TTEST,     DISOPTYPE_HARMLESS),                         /* FEAT_TME */
    301 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_1(g_ArmV8A64SysResult, DISARMV8INSNCLASS_F_FORCED_64BIT,
     299    DIS_ARMV8_OP(0xd5233060, "tstart",          OP_ARMV8_A64_TSTART,    DISOPTYPE_HARMLESS | DISOPTYPE_PRIVILEGED),  /* FEAT_TME */
     300    DIS_ARMV8_OP(0xd5233160, "ttest",           OP_ARMV8_A64_TTEST,     DISOPTYPE_HARMLESS),                         /* FEAT_TME */
     301DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_1(g_ArmV8A64SysResult, 0xfffffffe /*fFixedInsn*/, DISARMV8INSNCLASS_F_FORCED_64BIT,
    302302                                            kDisArmV8OpcDecodeNop, RT_BIT_32(8) | RT_BIT_32(9) | RT_BIT_32(10) | RT_BIT_32(11), 8,
    303303                                            kDisArmv8OpParmGpr)
    … …  
    312312/* SYS */
    313313DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(g_ArmV8A64Sys)
    314     DIS_ARMV8_OP(0xfff80000, 0xd5080000, "sys",             OP_ARMV8_A64_SYS,       DISOPTYPE_HARMLESS),
    315 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_0(g_ArmV8A64Sys, DISARMV8INSNCLASS_F_FORCED_64BIT,
     314    DIS_ARMV8_OP(0xd5080000, "sys",             OP_ARMV8_A64_SYS,       DISOPTYPE_HARMLESS),
     315DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_0(g_ArmV8A64Sys, 0xfff80000 /*fFixedInsn*/, DISARMV8INSNCLASS_F_FORCED_64BIT,
    316316                                            kDisArmV8OpcDecodeNop, 0, 0) /** @todo */
    317317    DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseImm,           16,  3, 0 /*idxParam*/),
    … …  
    325325/* SYSL */
    326326DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(g_ArmV8A64SysL)
    327     DIS_ARMV8_OP(0xfff80000, 0xd5280000, "sysl",            OP_ARMV8_A64_SYSL,      DISOPTYPE_HARMLESS),
    328 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_0(g_ArmV8A64SysL, DISARMV8INSNCLASS_F_FORCED_64BIT,
     327    DIS_ARMV8_OP(0xd5280000, "sysl",            OP_ARMV8_A64_SYSL,      DISOPTYPE_HARMLESS),
     328DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_0(g_ArmV8A64SysL, 0xfff80000 /*fFixedInsn*/, DISARMV8INSNCLASS_F_FORCED_64BIT,
    329329                                            kDisArmV8OpcDecodeNop, 0, 0) /** @todo */
    330330    DIS_ARMV8_INSN_PARAM_CREATE(kDisParmParseReg,            0,  5, 0 /*idxParam*/),
    … …  
    338338/* MSR */
    339339DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(g_ArmV8A64Msr)
    340     DIS_ARMV8_OP(0xfff00000, 0xd5100000, "msr",             OP_ARMV8_A64_MSR,       DISOPTYPE_HARMLESS | DISOPTYPE_PRIVILEGED),
    341 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_2(g_ArmV8A64Msr, DISARMV8INSNCLASS_F_FORCED_64BIT,
     340    DIS_ARMV8_OP(0xd5100000, "msr",             OP_ARMV8_A64_MSR,       DISOPTYPE_HARMLESS | DISOPTYPE_PRIVILEGED),
     341DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_2(g_ArmV8A64Msr, 0xfff00000 /*fFixedInsn*/, DISARMV8INSNCLASS_F_FORCED_64BIT,
    342342                                            kDisArmV8OpcDecodeNop, 0, 0,
    343343                                            kDisArmv8OpParmSysReg, kDisArmv8OpParmGpr)
    … …  
    352352/* MRS */
    353353DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(g_ArmV8A64Mrs)
    354     DIS_ARMV8_OP(0xfff00000, 0xd5300000, "mrs",             OP_ARMV8_A64_MRS,       DISOPTYPE_HARMLESS | DISOPTYPE_PRIVILEGED),
    355 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_2(g_ArmV8A64Mrs, DISARMV8INSNCLASS_F_FORCED_64BIT,
     354    DIS_ARMV8_OP(0xd5300000, "mrs",             OP_ARMV8_A64_MRS,       DISOPTYPE_HARMLESS | DISOPTYPE_PRIVILEGED),
     355DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_2(g_ArmV8A64Mrs, 0xfff00000 /*fFixedInsn*/, DISARMV8INSNCLASS_F_FORCED_64BIT,
    356356                                            kDisArmV8OpcDecodeNop, 0, 0,
    357357                                            kDisArmv8OpParmGpr, kDisArmv8OpParmSysReg)
    … …  
    366366/* RET/RETAA/RETAB */
    367367DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(g_ArmV8A64Ret)
    368     DIS_ARMV8_OP(0xfffffc1f, 0xd65f0000, "ret",            OP_ARMV8_A64_RET,        DISOPTYPE_HARMLESS),
    369     DIS_ARMV8_OP(0xfffffc1f, 0xd65f0800, "retaa",          OP_ARMV8_A64_RETAA,      DISOPTYPE_HARMLESS),
    370     DIS_ARMV8_OP(0xfffffc1f, 0xd65f0c00, "retab",          OP_ARMV8_A64_RETAB,      DISOPTYPE_HARMLESS),
    371 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_1(g_ArmV8A64Ret, DISARMV8INSNCLASS_F_FORCED_64BIT,
     368    DIS_ARMV8_OP(0xd65f0000, "ret",            OP_ARMV8_A64_RET,        DISOPTYPE_HARMLESS),
     369    DIS_ARMV8_OP(0xd65f0800, "retaa",          OP_ARMV8_A64_RETAA,      DISOPTYPE_HARMLESS),
     370    DIS_ARMV8_OP(0xd65f0c00, "retab",          OP_ARMV8_A64_RETAB,      DISOPTYPE_HARMLESS),
     371DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_1(g_ArmV8A64Ret, 0xfffffc1f /*fFixedInsn*/, DISARMV8INSNCLASS_F_FORCED_64BIT,
    372372                                            kDisArmV8OpcDecodeLookup, 0xfffffc1f, 0,
    373373                                            kDisArmv8OpParmGpr)
    … …  
    403403/* B/BL */
    404404DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(g_ArmV8A64UncondBrImm)
    405     DIS_ARMV8_OP(0xfc000000, 0x14000000, "b",              OP_ARMV8_A64_B,         DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW),
    406     DIS_ARMV8_OP(0xfc000000, 0x94000000, "bl",             OP_ARMV8_A64_BL,        DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW),
    407 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_1(g_ArmV8A64UncondBrImm, 0 /*fClass*/,
     405    DIS_ARMV8_OP(0x14000000, "b",              OP_ARMV8_A64_B,         DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW),
     406    DIS_ARMV8_OP(0x94000000, "bl",             OP_ARMV8_A64_BL,        DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW),
     407DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_1(g_ArmV8A64UncondBrImm, 0xfc000000 /*fFixedInsn*/, 0 /*fClass*/,
    408408                                            kDisArmV8OpcDecodeNop, RT_BIT_32(31), 31,
    409409                                            kDisArmv8OpParmImmRel)
    … …  
    418418/* CBZ/CBNZ */
    419419DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(g_ArmV8A64CmpBrImm)
    420     DIS_ARMV8_OP(0x7f000000, 0x34000000, "cbz",             OP_ARMV8_A64_CBZ,       DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW),
    421     DIS_ARMV8_OP(0x7f000000, 0x35000000, "cbnz",            OP_ARMV8_A64_CBNZ,      DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW),
    422 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_2(g_ArmV8A64CmpBrImm, DISARMV8INSNCLASS_F_SF,
     420    DIS_ARMV8_OP(0x34000000, "cbz",             OP_ARMV8_A64_CBZ,       DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW),
     421    DIS_ARMV8_OP(0x35000000, "cbnz",            OP_ARMV8_A64_CBNZ,      DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW),
     422DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_2(g_ArmV8A64CmpBrImm, 0x7f000000 /*fFixedInsn*/, DISARMV8INSNCLASS_F_SF,
    423423                                            kDisArmV8OpcDecodeNop, RT_BIT_32(24), 24,
    424424                                            kDisArmv8OpParmGpr, kDisArmv8OpParmImmRel)
    … …  
    433433/* TBZ/TBNZ */
    434434DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(g_ArmV8A64TestBrImm)
    435     DIS_ARMV8_OP(0x7f000000, 0x36000000, "tbz",             OP_ARMV8_A64_TBZ,       DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW),
    436     DIS_ARMV8_OP(0x7f000000, 0x37000000, "tbnz",            OP_ARMV8_A64_TBNZ,      DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW),
    437 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_3(g_ArmV8A64TestBrImm, DISARMV8INSNCLASS_F_SF, /* Not an SF bit but has the same meaning. */
     435    DIS_ARMV8_OP(0x36000000, "tbz",             OP_ARMV8_A64_TBZ,       DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW),
     436    DIS_ARMV8_OP(0x37000000, "tbnz",            OP_ARMV8_A64_TBNZ,      DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW),
     437DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_3(g_ArmV8A64TestBrImm, 0x7f000000 /*fFixedInsn*/, DISARMV8INSNCLASS_F_SF, /* Not an SF bit but has the same meaning. */
    438438                                            kDisArmV8OpcDecodeNop, RT_BIT_32(24), 24,
    439439                                            kDisArmv8OpParmGpr, kDisArmv8OpParmImm, kDisArmv8OpParmImmRel)
    … …  
    467467/* AND/ORR/EOR/ANDS */
    468468DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(g_aArmV8A64InsnLogShiftRegN0)
    469     DIS_ARMV8_OP(0x7f200000, 0x0a000000, "and",             OP_ARMV8_A64_AND,       DISOPTYPE_HARMLESS),
    470     DIS_ARMV8_OP(0x7f200000, 0x2a000000, "orr",             OP_ARMV8_A64_ORR,       DISOPTYPE_HARMLESS),
    471     DIS_ARMV8_OP(0x7f200000, 0x4a000000, "eor",             OP_ARMV8_A64_EOR,       DISOPTYPE_HARMLESS),
    472     DIS_ARMV8_OP(0x7f200000, 0x6a000000, "ands",            OP_ARMV8_A64_ANDS,      DISOPTYPE_HARMLESS)
    473 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_3(g_aArmV8A64InsnLogShiftRegN0, DISARMV8INSNCLASS_F_SF,
     469    DIS_ARMV8_OP(0x0a000000, "and",             OP_ARMV8_A64_AND,       DISOPTYPE_HARMLESS),
     470    DIS_ARMV8_OP(0x2a000000, "orr",             OP_ARMV8_A64_ORR,       DISOPTYPE_HARMLESS),
     471    DIS_ARMV8_OP(0x4a000000, "eor",             OP_ARMV8_A64_EOR,       DISOPTYPE_HARMLESS),
     472    DIS_ARMV8_OP(0x6a000000, "ands",            OP_ARMV8_A64_ANDS,      DISOPTYPE_HARMLESS)
     473DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_3(g_aArmV8A64InsnLogShiftRegN0, 0x7f200000 /*fFixedInsn*/, DISARMV8INSNCLASS_F_SF,
    474474                                            kDisArmV8OpcDecodeNop, RT_BIT_32(29) | RT_BIT_32(30), 29,
    475475                                            kDisArmv8OpParmGpr, kDisArmv8OpParmGpr, kDisArmv8OpParmGpr)
    … …  
    484484/* AND/ORR/EOR/ANDS */
    485485DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(g_aArmV8A64InsnLogShiftRegN1)
    486     DIS_ARMV8_OP(0x7f200000, 0x0a200000, "bic",             OP_ARMV8_A64_BIC,       DISOPTYPE_HARMLESS),
    487     DIS_ARMV8_OP(0x7f200000, 0x2a200000, "orn",             OP_ARMV8_A64_ORN,       DISOPTYPE_HARMLESS),
    488     DIS_ARMV8_OP(0x7f200000, 0x4a200000, "eon",             OP_ARMV8_A64_EON,       DISOPTYPE_HARMLESS),
    489     DIS_ARMV8_OP(0x7f200000, 0x6a200000, "bics",            OP_ARMV8_A64_BICS,      DISOPTYPE_HARMLESS)
    490 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_3(g_aArmV8A64InsnLogShiftRegN1, DISARMV8INSNCLASS_F_SF,
     486    DIS_ARMV8_OP(0x0a200000, "bic",             OP_ARMV8_A64_BIC,       DISOPTYPE_HARMLESS),
     487    DIS_ARMV8_OP(0x2a200000, "orn",             OP_ARMV8_A64_ORN,       DISOPTYPE_HARMLESS),
     488    DIS_ARMV8_OP(0x4a200000, "eon",             OP_ARMV8_A64_EON,       DISOPTYPE_HARMLESS),
     489    DIS_ARMV8_OP(0x6a200000, "bics",            OP_ARMV8_A64_BICS,      DISOPTYPE_HARMLESS)
     490DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_3(g_aArmV8A64InsnLogShiftRegN1, 0x7f200000 /*fFixedInsn*/, DISARMV8INSNCLASS_F_SF,
    491491                                            kDisArmV8OpcDecodeNop, RT_BIT_32(29) | RT_BIT_32(30), 29,
    492492                                            kDisArmv8OpParmGpr, kDisArmv8OpParmGpr, kDisArmv8OpParmGpr)
    … …  
    517517
    518518DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(g_ArmV8A64LdSt)
    519     DIS_ARMV8_OP(0xbfc00000, 0xb9400000, "ldr",             OP_ARMV8_A64_LDR,       DISOPTYPE_HARMLESS),
    520     DIS_ARMV8_OP(0xbfc00000, 0xb9000000, "str",             OP_ARMV8_A64_STR,       DISOPTYPE_HARMLESS),
    521 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_2(g_ArmV8A64LdSt, 0 /*fClass*/,
     519    DIS_ARMV8_OP(0xb9400000, "ldr",             OP_ARMV8_A64_LDR,       DISOPTYPE_HARMLESS),
     520    DIS_ARMV8_OP(0xb9000000, "str",             OP_ARMV8_A64_STR,       DISOPTYPE_HARMLESS),
     521DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_PARAMS_2(g_ArmV8A64LdSt, 0xbfc00000 /*fFixedInsn*/, 0 /*fClass*/,
    522522                                            kDisArmV8OpcDecodeLookup, 0xbfc00000, 0,
    523523                                            kDisArmv8OpParmGpr, kDisArmv8OpParmAddrInGpr)
Note: See TracChangeset for help on using the changeset viewer.

© 2024 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette