- Timestamp:
- Mar 28, 2024 10:54:21 AM (6 months ago)
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 5 edited
-
VMMAll/IEMAllAImpl.asm (modified) (3 diffs)
-
VMMAll/IEMAllAImplC.cpp (modified) (121 diffs)
-
VMMAll/IEMAllInstThree0f38.cpp.h (modified) (52 diffs)
-
VMMAll/IEMAllInstTwoByte0f.cpp.h (modified) (89 diffs)
-
include/IEMInternal.h (modified) (2 diffs)
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/IEMAllAImpl.asm
r104099 r104103 3865 3865 ; @param A2 Pointer to the second media register size operand (input). 3866 3866 ; 3867 ; @todo r=aeichner Currently unused, can probably be removed. 3868 ; 3867 3869 %macro IEMIMPL_MEDIA_F2 2 3868 3870 %if %2 != 0 … … 3894 3896 ENDPROC iemAImpl_ %+ %1 %+ _u128 3895 3897 %endmacro 3896 3897 IEMIMPL_MEDIA_F2 pshufb, 13898 IEMIMPL_MEDIA_F2 pand, 13899 IEMIMPL_MEDIA_F2 pandn, 13900 IEMIMPL_MEDIA_F2 por, 13901 IEMIMPL_MEDIA_F2 pxor, 13902 IEMIMPL_MEDIA_F2 pcmpeqb, 13903 IEMIMPL_MEDIA_F2 pcmpeqw, 13904 IEMIMPL_MEDIA_F2 pcmpeqd, 13905 IEMIMPL_MEDIA_F2 pcmpeqq, 03906 IEMIMPL_MEDIA_F2 pcmpgtb, 13907 IEMIMPL_MEDIA_F2 pcmpgtw, 13908 IEMIMPL_MEDIA_F2 pcmpgtd, 13909 IEMIMPL_MEDIA_F2 pcmpgtq, 03910 IEMIMPL_MEDIA_F2 paddb, 13911 IEMIMPL_MEDIA_F2 paddw, 13912 IEMIMPL_MEDIA_F2 paddd, 13913 IEMIMPL_MEDIA_F2 paddq, 13914 IEMIMPL_MEDIA_F2 paddsb, 13915 IEMIMPL_MEDIA_F2 paddsw, 13916 IEMIMPL_MEDIA_F2 paddusb, 13917 IEMIMPL_MEDIA_F2 paddusw, 13918 IEMIMPL_MEDIA_F2 psubb, 13919 IEMIMPL_MEDIA_F2 psubw, 13920 IEMIMPL_MEDIA_F2 psubd, 13921 IEMIMPL_MEDIA_F2 psubq, 13922 IEMIMPL_MEDIA_F2 psubsb, 13923 IEMIMPL_MEDIA_F2 psubsw, 13924 IEMIMPL_MEDIA_F2 psubusb, 13925 IEMIMPL_MEDIA_F2 psubusw, 13926 IEMIMPL_MEDIA_F2 pmullw, 13927 IEMIMPL_MEDIA_F2 pmulld, 03928 IEMIMPL_MEDIA_F2 pmulhw, 13929 IEMIMPL_MEDIA_F2 pmaddwd, 13930 IEMIMPL_MEDIA_F2 pminub, 13931 IEMIMPL_MEDIA_F2 pminuw, 03932 IEMIMPL_MEDIA_F2 pminud, 03933 IEMIMPL_MEDIA_F2 pminsb, 03934 IEMIMPL_MEDIA_F2 pminsw, 13935 IEMIMPL_MEDIA_F2 pminsd, 03936 IEMIMPL_MEDIA_F2 pmaxub, 13937 IEMIMPL_MEDIA_F2 pmaxuw, 03938 IEMIMPL_MEDIA_F2 pmaxud, 03939 IEMIMPL_MEDIA_F2 pmaxsb, 03940 IEMIMPL_MEDIA_F2 pmaxsw, 13941 IEMIMPL_MEDIA_F2 pmaxsd, 03942 IEMIMPL_MEDIA_F2 pabsb, 13943 IEMIMPL_MEDIA_F2 pabsw, 13944 IEMIMPL_MEDIA_F2 pabsd, 13945 IEMIMPL_MEDIA_F2 psignb, 13946 IEMIMPL_MEDIA_F2 psignw, 13947 IEMIMPL_MEDIA_F2 psignd, 13948 IEMIMPL_MEDIA_F2 phaddw, 13949 IEMIMPL_MEDIA_F2 phaddd, 13950 IEMIMPL_MEDIA_F2 phsubw, 13951 IEMIMPL_MEDIA_F2 phsubd, 13952 IEMIMPL_MEDIA_F2 phaddsw, 13953 IEMIMPL_MEDIA_F2 phsubsw, 13954 IEMIMPL_MEDIA_F2 pmaddubsw, 13955 IEMIMPL_MEDIA_F2 pmulhrsw, 13956 IEMIMPL_MEDIA_F2 pmuludq, 13957 3958 3898 3959 3899 ;; … … 3996 3936 %endmacro 3997 3937 3938 IEMIMPL_MEDIA_OPT_F2 pshufb, 1 3939 IEMIMPL_MEDIA_OPT_F2 pand, 1 3940 IEMIMPL_MEDIA_OPT_F2 pandn, 1 3941 IEMIMPL_MEDIA_OPT_F2 por, 1 3942 IEMIMPL_MEDIA_OPT_F2 pxor, 1 3943 IEMIMPL_MEDIA_OPT_F2 pcmpeqb, 1 3944 IEMIMPL_MEDIA_OPT_F2 pcmpeqw, 1 3945 IEMIMPL_MEDIA_OPT_F2 pcmpeqd, 1 3946 IEMIMPL_MEDIA_OPT_F2 pcmpeqq, 0 3947 IEMIMPL_MEDIA_OPT_F2 pcmpgtb, 1 3948 IEMIMPL_MEDIA_OPT_F2 pcmpgtw, 1 3949 IEMIMPL_MEDIA_OPT_F2 pcmpgtd, 1 3950 IEMIMPL_MEDIA_OPT_F2 pcmpgtq, 0 3951 IEMIMPL_MEDIA_OPT_F2 paddb, 1 3952 IEMIMPL_MEDIA_OPT_F2 paddw, 1 3953 IEMIMPL_MEDIA_OPT_F2 paddd, 1 3954 IEMIMPL_MEDIA_OPT_F2 paddq, 1 3955 IEMIMPL_MEDIA_OPT_F2 paddsb, 1 3956 IEMIMPL_MEDIA_OPT_F2 paddsw, 1 3957 IEMIMPL_MEDIA_OPT_F2 paddusb, 1 3958 IEMIMPL_MEDIA_OPT_F2 paddusw, 1 3959 IEMIMPL_MEDIA_OPT_F2 psubb, 1 3960 IEMIMPL_MEDIA_OPT_F2 psubw, 1 3961 IEMIMPL_MEDIA_OPT_F2 psubd, 1 3962 IEMIMPL_MEDIA_OPT_F2 psubq, 1 3963 IEMIMPL_MEDIA_OPT_F2 psubsb, 1 3964 IEMIMPL_MEDIA_OPT_F2 psubsw, 1 3965 IEMIMPL_MEDIA_OPT_F2 psubusb, 1 3966 IEMIMPL_MEDIA_OPT_F2 psubusw, 1 3967 IEMIMPL_MEDIA_OPT_F2 pmullw, 1 3968 IEMIMPL_MEDIA_OPT_F2 pmulld, 0 3969 IEMIMPL_MEDIA_OPT_F2 pmulhw, 1 3970 IEMIMPL_MEDIA_OPT_F2 pmaddwd, 1 3971 IEMIMPL_MEDIA_OPT_F2 pminub, 1 3972 IEMIMPL_MEDIA_OPT_F2 pminuw, 0 3973 IEMIMPL_MEDIA_OPT_F2 pminud, 0 3974 IEMIMPL_MEDIA_OPT_F2 pminsb, 0 3975 IEMIMPL_MEDIA_OPT_F2 pminsw, 1 3976 IEMIMPL_MEDIA_OPT_F2 pminsd, 0 3977 IEMIMPL_MEDIA_OPT_F2 pmaxub, 1 3978 IEMIMPL_MEDIA_OPT_F2 pmaxuw, 0 3979 IEMIMPL_MEDIA_OPT_F2 pmaxud, 0 3980 IEMIMPL_MEDIA_OPT_F2 pmaxsb, 0 3981 IEMIMPL_MEDIA_OPT_F2 pmaxsw, 1 3982 IEMIMPL_MEDIA_OPT_F2 pmaxsd, 0 3983 IEMIMPL_MEDIA_OPT_F2 pabsb, 1 3984 IEMIMPL_MEDIA_OPT_F2 pabsw, 1 3985 IEMIMPL_MEDIA_OPT_F2 pabsd, 1 3986 IEMIMPL_MEDIA_OPT_F2 psignb, 1 3987 IEMIMPL_MEDIA_OPT_F2 psignw, 1 3988 IEMIMPL_MEDIA_OPT_F2 psignd, 1 3989 IEMIMPL_MEDIA_OPT_F2 phaddw, 1 3990 IEMIMPL_MEDIA_OPT_F2 phaddd, 1 3991 IEMIMPL_MEDIA_OPT_F2 phsubw, 1 3992 IEMIMPL_MEDIA_OPT_F2 phsubd, 1 3993 IEMIMPL_MEDIA_OPT_F2 phaddsw, 1 3994 IEMIMPL_MEDIA_OPT_F2 phsubsw, 1 3995 IEMIMPL_MEDIA_OPT_F2 pmaddubsw, 1 3996 IEMIMPL_MEDIA_OPT_F2 pmulhrsw, 1 3997 IEMIMPL_MEDIA_OPT_F2 pmuludq, 1 3998 3998 IEMIMPL_MEDIA_OPT_F2 packsswb, 1 3999 3999 IEMIMPL_MEDIA_OPT_F2 packssdw, 1 -
trunk/src/VBox/VMM/VMMAll/IEMAllAImplC.cpp
r104076 r104103 7839 7839 #ifdef IEM_WITHOUT_ASSEMBLY 7840 7840 7841 IEM_DECL_IMPL_DEF(void, iemAImpl_pand_u64,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc)) 7842 { 7843 RT_NOREF(pFpuState); 7841 IEM_DECL_IMPL_DEF(void, iemAImpl_pand_u64,(uint64_t *puDst, uint64_t const *puSrc)) 7842 { 7844 7843 *puDst &= *puSrc; 7845 7844 } 7846 7845 7847 7846 7848 IEM_DECL_IMPL_DEF(void, iemAImpl_pand_u128,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 7849 { 7850 RT_NOREF(pFpuState); 7847 IEM_DECL_IMPL_DEF(void, iemAImpl_pand_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 7848 { 7851 7849 puDst->au64[0] &= puSrc->au64[0]; 7852 7850 puDst->au64[1] &= puSrc->au64[1]; … … 7880 7878 #ifdef IEM_WITHOUT_ASSEMBLY 7881 7879 7882 IEM_DECL_IMPL_DEF(void, iemAImpl_pandn_u64,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc)) 7883 { 7884 RT_NOREF(pFpuState); 7880 IEM_DECL_IMPL_DEF(void, iemAImpl_pandn_u64,(uint64_t *puDst, uint64_t const *puSrc)) 7881 { 7885 7882 *puDst = ~*puDst & *puSrc; 7886 7883 } 7887 7884 7888 7885 7889 IEM_DECL_IMPL_DEF(void, iemAImpl_pandn_u128,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 7890 { 7891 RT_NOREF(pFpuState); 7886 IEM_DECL_IMPL_DEF(void, iemAImpl_pandn_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 7887 { 7892 7888 puDst->au64[0] = ~puDst->au64[0] & puSrc->au64[0]; 7893 7889 puDst->au64[1] = ~puDst->au64[1] & puSrc->au64[1]; … … 7921 7917 #ifdef IEM_WITHOUT_ASSEMBLY 7922 7918 7923 IEM_DECL_IMPL_DEF(void, iemAImpl_por_u64,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc)) 7924 { 7925 RT_NOREF(pFpuState); 7919 IEM_DECL_IMPL_DEF(void, iemAImpl_por_u64,(uint64_t *puDst, uint64_t const *puSrc)) 7920 { 7926 7921 *puDst |= *puSrc; 7927 7922 } 7928 7923 7929 7924 7930 IEM_DECL_IMPL_DEF(void, iemAImpl_por_u128,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 7931 { 7932 RT_NOREF(pFpuState); 7925 IEM_DECL_IMPL_DEF(void, iemAImpl_por_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 7926 { 7933 7927 puDst->au64[0] |= puSrc->au64[0]; 7934 7928 puDst->au64[1] |= puSrc->au64[1]; … … 7962 7956 #ifdef IEM_WITHOUT_ASSEMBLY 7963 7957 7964 IEM_DECL_IMPL_DEF(void, iemAImpl_pxor_u64,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc)) 7965 { 7966 RT_NOREF(pFpuState); 7958 IEM_DECL_IMPL_DEF(void, iemAImpl_pxor_u64,(uint64_t *puDst, uint64_t const *puSrc)) 7959 { 7967 7960 *puDst ^= *puSrc; 7968 7961 } 7969 7962 7970 7963 7971 IEM_DECL_IMPL_DEF(void, iemAImpl_pxor_u128,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 7972 { 7973 RT_NOREF(pFpuState); 7964 IEM_DECL_IMPL_DEF(void, iemAImpl_pxor_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 7965 { 7974 7966 puDst->au64[0] ^= puSrc->au64[0]; 7975 7967 puDst->au64[1] ^= puSrc->au64[1]; … … 8003 7995 #ifdef IEM_WITHOUT_ASSEMBLY 8004 7996 8005 IEM_DECL_IMPL_DEF(void, iemAImpl_pcmpeqb_u64,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc)) 8006 { 8007 RT_NOREF(pFpuState); 7997 IEM_DECL_IMPL_DEF(void, iemAImpl_pcmpeqb_u64,(uint64_t *puDst, uint64_t const *puSrc)) 7998 { 8008 7999 RTUINT64U uSrc1 = { *puDst }; 8009 8000 RTUINT64U uSrc2 = { *puSrc }; … … 8021 8012 8022 8013 8023 IEM_DECL_IMPL_DEF(void, iemAImpl_pcmpeqb_u128,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 8024 { 8025 RT_NOREF(pFpuState); 8014 IEM_DECL_IMPL_DEF(void, iemAImpl_pcmpeqb_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 8015 { 8026 8016 RTUINT128U uSrc1 = *puDst; 8027 8017 puDst->au8[0] = uSrc1.au8[0] == puSrc->au8[0] ? UINT8_MAX : 0; … … 8111 8101 #ifdef IEM_WITHOUT_ASSEMBLY 8112 8102 8113 IEM_DECL_IMPL_DEF(void, iemAImpl_pcmpeqw_u64,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc)) 8114 { 8115 RT_NOREF(pFpuState); 8103 IEM_DECL_IMPL_DEF(void, iemAImpl_pcmpeqw_u64,(uint64_t *puDst, uint64_t const *puSrc)) 8104 { 8116 8105 RTUINT64U uSrc1 = { *puDst }; 8117 8106 RTUINT64U uSrc2 = { *puSrc }; … … 8125 8114 8126 8115 8127 IEM_DECL_IMPL_DEF(void, iemAImpl_pcmpeqw_u128,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 8128 { 8129 RT_NOREF(pFpuState); 8116 IEM_DECL_IMPL_DEF(void, iemAImpl_pcmpeqw_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 8117 { 8130 8118 RTUINT128U uSrc1 = *puDst; 8131 8119 puDst->au16[0] = uSrc1.au16[0] == puSrc->au16[0] ? UINT16_MAX : 0; … … 8183 8171 #ifdef IEM_WITHOUT_ASSEMBLY 8184 8172 8185 IEM_DECL_IMPL_DEF(void, iemAImpl_pcmpeqd_u64,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc)) 8186 { 8187 RT_NOREF(pFpuState); 8173 IEM_DECL_IMPL_DEF(void, iemAImpl_pcmpeqd_u64,(uint64_t *puDst, uint64_t const *puSrc)) 8174 { 8188 8175 RTUINT64U uSrc1 = { *puDst }; 8189 8176 RTUINT64U uSrc2 = { *puSrc }; … … 8195 8182 8196 8183 8197 IEM_DECL_IMPL_DEF(void, iemAImpl_pcmpeqd_u128,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 8198 { 8199 RT_NOREF(pFpuState); 8184 IEM_DECL_IMPL_DEF(void, iemAImpl_pcmpeqd_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 8185 { 8200 8186 RTUINT128U uSrc1 = *puDst; 8201 8187 puDst->au32[0] = uSrc1.au32[0] == puSrc->au32[0] ? UINT32_MAX : 0; … … 8235 8221 * PCMPEQQ / VPCMPEQQ. 8236 8222 */ 8237 IEM_DECL_IMPL_DEF(void, iemAImpl_pcmpeqq_u128_fallback,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 8238 { 8239 RT_NOREF(pFpuState); 8223 IEM_DECL_IMPL_DEF(void, iemAImpl_pcmpeqq_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 8224 { 8240 8225 RTUINT128U uSrc1 = *puDst; 8241 8226 puDst->au64[0] = uSrc1.au64[0] == puSrc->au64[0] ? UINT64_MAX : 0; … … 8267 8252 #ifdef IEM_WITHOUT_ASSEMBLY 8268 8253 8269 IEM_DECL_IMPL_DEF(void, iemAImpl_pcmpgtb_u64,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc)) 8270 { 8271 RT_NOREF(pFpuState); 8254 IEM_DECL_IMPL_DEF(void, iemAImpl_pcmpgtb_u64,(uint64_t *puDst, uint64_t const *puSrc)) 8255 { 8272 8256 RTUINT64U uSrc1 = { *puDst }; 8273 8257 RTUINT64U uSrc2 = { *puSrc }; … … 8285 8269 8286 8270 8287 IEM_DECL_IMPL_DEF(void, iemAImpl_pcmpgtb_u128,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 8288 { 8289 RT_NOREF(pFpuState); 8271 IEM_DECL_IMPL_DEF(void, iemAImpl_pcmpgtb_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 8272 { 8290 8273 RTUINT128U uSrc1 = *puDst; 8291 8274 puDst->au8[0] = uSrc1.ai8[0] > puSrc->ai8[0] ? UINT8_MAX : 0; … … 8375 8358 #ifdef IEM_WITHOUT_ASSEMBLY 8376 8359 8377 IEM_DECL_IMPL_DEF(void, iemAImpl_pcmpgtw_u64,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc)) 8378 { 8379 RT_NOREF(pFpuState); 8360 IEM_DECL_IMPL_DEF(void, iemAImpl_pcmpgtw_u64,(uint64_t *puDst, uint64_t const *puSrc)) 8361 { 8380 8362 RTUINT64U uSrc1 = { *puDst }; 8381 8363 RTUINT64U uSrc2 = { *puSrc }; … … 8389 8371 8390 8372 8391 IEM_DECL_IMPL_DEF(void, iemAImpl_pcmpgtw_u128,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 8392 { 8393 RT_NOREF(pFpuState); 8373 IEM_DECL_IMPL_DEF(void, iemAImpl_pcmpgtw_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 8374 { 8394 8375 RTUINT128U uSrc1 = *puDst; 8395 8376 puDst->au16[0] = uSrc1.ai16[0] > puSrc->ai16[0] ? UINT16_MAX : 0; … … 8447 8428 #ifdef IEM_WITHOUT_ASSEMBLY 8448 8429 8449 IEM_DECL_IMPL_DEF(void, iemAImpl_pcmpgtd_u64,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc)) 8450 { 8451 RT_NOREF(pFpuState); 8430 IEM_DECL_IMPL_DEF(void, iemAImpl_pcmpgtd_u64,(uint64_t *puDst, uint64_t const *puSrc)) 8431 { 8452 8432 RTUINT64U uSrc1 = { *puDst }; 8453 8433 RTUINT64U uSrc2 = { *puSrc }; … … 8459 8439 8460 8440 8461 IEM_DECL_IMPL_DEF(void, iemAImpl_pcmpgtd_u128,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 8462 { 8463 RT_NOREF(pFpuState); 8441 IEM_DECL_IMPL_DEF(void, iemAImpl_pcmpgtd_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 8442 { 8464 8443 RTUINT128U uSrc1 = *puDst; 8465 8444 puDst->au32[0] = uSrc1.ai32[0] > puSrc->ai32[0] ? UINT32_MAX : 0; … … 8499 8478 * PCMPGTQ / VPCMPGTQ. 8500 8479 */ 8501 IEM_DECL_IMPL_DEF(void, iemAImpl_pcmpgtq_u128_fallback,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 8502 { 8503 RT_NOREF(pFpuState); 8480 IEM_DECL_IMPL_DEF(void, iemAImpl_pcmpgtq_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 8481 { 8504 8482 RTUINT128U uSrc1 = *puDst; 8505 8483 puDst->au64[0] = uSrc1.ai64[0] > puSrc->ai64[0] ? UINT64_MAX : 0; … … 8531 8509 #ifdef IEM_WITHOUT_ASSEMBLY 8532 8510 8533 IEM_DECL_IMPL_DEF(void, iemAImpl_paddb_u64,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc)) 8534 { 8535 RT_NOREF(pFpuState); 8511 IEM_DECL_IMPL_DEF(void, iemAImpl_paddb_u64,(uint64_t *puDst, uint64_t const *puSrc)) 8512 { 8536 8513 RTUINT64U uSrc1 = { *puDst }; 8537 8514 RTUINT64U uSrc2 = { *puSrc }; … … 8549 8526 8550 8527 8551 IEM_DECL_IMPL_DEF(void, iemAImpl_paddb_u128,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 8552 { 8553 RT_NOREF(pFpuState); 8528 IEM_DECL_IMPL_DEF(void, iemAImpl_paddb_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 8529 { 8554 8530 RTUINT128U uSrc1 = *puDst; 8555 8531 puDst->au8[0] = uSrc1.au8[0] + puSrc->au8[0]; … … 8645 8621 #ifdef IEM_WITHOUT_ASSEMBLY 8646 8622 8647 IEM_DECL_IMPL_DEF(void, iemAImpl_paddsb_u64,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc)) 8648 { 8649 RT_NOREF(pFpuState); 8623 IEM_DECL_IMPL_DEF(void, iemAImpl_paddsb_u64,(uint64_t *puDst, uint64_t const *puSrc)) 8624 { 8650 8625 RTUINT64U uSrc1 = { *puDst }; 8651 8626 RTUINT64U uSrc2 = { *puSrc }; … … 8663 8638 8664 8639 8665 IEM_DECL_IMPL_DEF(void, iemAImpl_paddsb_u128,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 8666 { 8667 RT_NOREF(pFpuState); 8640 IEM_DECL_IMPL_DEF(void, iemAImpl_paddsb_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 8641 { 8668 8642 RTUINT128U uSrc1 = *puDst; 8669 8643 puDst->au8[0] = SATURATED_SIGNED_WORD_TO_SIGNED_BYTE(uSrc1.ai8[0] + puSrc->ai8[0]); … … 8756 8730 #ifdef IEM_WITHOUT_ASSEMBLY 8757 8731 8758 IEM_DECL_IMPL_DEF(void, iemAImpl_paddusb_u64,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc)) 8759 { 8760 RT_NOREF(pFpuState); 8732 IEM_DECL_IMPL_DEF(void, iemAImpl_paddusb_u64,(uint64_t *puDst, uint64_t const *puSrc)) 8733 { 8761 8734 RTUINT64U uSrc1 = { *puDst }; 8762 8735 RTUINT64U uSrc2 = { *puSrc }; … … 8774 8747 8775 8748 8776 IEM_DECL_IMPL_DEF(void, iemAImpl_paddusb_u128,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 8777 { 8778 RT_NOREF(pFpuState); 8749 IEM_DECL_IMPL_DEF(void, iemAImpl_paddusb_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 8750 { 8779 8751 RTUINT128U uSrc1 = *puDst; 8780 8752 puDst->au8[0] = SATURATED_UNSIGNED_WORD_TO_UNSIGNED_BYTE(uSrc1.au8[0] + puSrc->au8[0]); … … 8862 8834 #ifdef IEM_WITHOUT_ASSEMBLY 8863 8835 8864 IEM_DECL_IMPL_DEF(void, iemAImpl_paddw_u64,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc)) 8865 { 8866 RT_NOREF(pFpuState); 8836 IEM_DECL_IMPL_DEF(void, iemAImpl_paddw_u64,(uint64_t *puDst, uint64_t const *puSrc)) 8837 { 8867 8838 RTUINT64U uSrc1 = { *puDst }; 8868 8839 RTUINT64U uSrc2 = { *puSrc }; … … 8876 8847 8877 8848 8878 IEM_DECL_IMPL_DEF(void, iemAImpl_paddw_u128,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 8879 { 8880 RT_NOREF(pFpuState); 8849 IEM_DECL_IMPL_DEF(void, iemAImpl_paddw_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 8850 { 8881 8851 RTUINT128U uSrc1 = *puDst; 8882 8852 puDst->au16[0] = uSrc1.au16[0] + puSrc->au16[0]; … … 8940 8910 #ifdef IEM_WITHOUT_ASSEMBLY 8941 8911 8942 IEM_DECL_IMPL_DEF(void, iemAImpl_paddsw_u64,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc)) 8943 { 8944 RT_NOREF(pFpuState); 8912 IEM_DECL_IMPL_DEF(void, iemAImpl_paddsw_u64,(uint64_t *puDst, uint64_t const *puSrc)) 8913 { 8945 8914 RTUINT64U uSrc1 = { *puDst }; 8946 8915 RTUINT64U uSrc2 = { *puSrc }; … … 8954 8923 8955 8924 8956 IEM_DECL_IMPL_DEF(void, iemAImpl_paddsw_u128,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 8957 { 8958 RT_NOREF(pFpuState); 8925 IEM_DECL_IMPL_DEF(void, iemAImpl_paddsw_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 8926 { 8959 8927 RTUINT128U uSrc1 = *puDst; 8960 8928 puDst->au16[0] = SATURATED_SIGNED_DWORD_TO_SIGNED_WORD(uSrc1.ai16[0] + puSrc->ai16[0]); … … 9015 8983 #ifdef IEM_WITHOUT_ASSEMBLY 9016 8984 9017 IEM_DECL_IMPL_DEF(void, iemAImpl_paddusw_u64,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc)) 9018 { 9019 RT_NOREF(pFpuState); 8985 IEM_DECL_IMPL_DEF(void, iemAImpl_paddusw_u64,(uint64_t *puDst, uint64_t const *puSrc)) 8986 { 9020 8987 RTUINT64U uSrc1 = { *puDst }; 9021 8988 RTUINT64U uSrc2 = { *puSrc }; … … 9029 8996 9030 8997 9031 IEM_DECL_IMPL_DEF(void, iemAImpl_paddusw_u128,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 9032 { 9033 RT_NOREF(pFpuState); 8998 IEM_DECL_IMPL_DEF(void, iemAImpl_paddusw_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 8999 { 9034 9000 RTUINT128U uSrc1 = *puDst; 9035 9001 puDst->au16[0] = SATURATED_UNSIGNED_DWORD_TO_UNSIGNED_WORD(uSrc1.au16[0] + puSrc->au16[0]); … … 9085 9051 #ifdef IEM_WITHOUT_ASSEMBLY 9086 9052 9087 IEM_DECL_IMPL_DEF(void, iemAImpl_paddd_u64,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc)) 9088 { 9089 RT_NOREF(pFpuState); 9053 IEM_DECL_IMPL_DEF(void, iemAImpl_paddd_u64,(uint64_t *puDst, uint64_t const *puSrc)) 9054 { 9090 9055 RTUINT64U uSrc1 = { *puDst }; 9091 9056 RTUINT64U uSrc2 = { *puSrc }; … … 9097 9062 9098 9063 9099 IEM_DECL_IMPL_DEF(void, iemAImpl_paddd_u128,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 9100 { 9101 RT_NOREF(pFpuState); 9064 IEM_DECL_IMPL_DEF(void, iemAImpl_paddd_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 9065 { 9102 9066 RTUINT128U uSrc1 = *puDst; 9103 9067 puDst->au32[0] = uSrc1.au32[0] + puSrc->au32[0]; … … 9139 9103 #ifdef IEM_WITHOUT_ASSEMBLY 9140 9104 9141 IEM_DECL_IMPL_DEF(void, iemAImpl_paddq_u64,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc)) 9142 { 9143 RT_NOREF(pFpuState); 9105 IEM_DECL_IMPL_DEF(void, iemAImpl_paddq_u64,(uint64_t *puDst, uint64_t const *puSrc)) 9106 { 9144 9107 *puDst = *puDst + *puSrc; 9145 9108 } 9146 9109 9147 IEM_DECL_IMPL_DEF(void, iemAImpl_paddq_u128,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 9148 { 9149 RT_NOREF(pFpuState); 9110 IEM_DECL_IMPL_DEF(void, iemAImpl_paddq_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 9111 { 9150 9112 RTUINT128U uSrc1 = *puDst; 9151 9113 puDst->au64[0] = uSrc1.au64[0] + puSrc->au64[0]; … … 9179 9141 #ifdef IEM_WITHOUT_ASSEMBLY 9180 9142 9181 IEM_DECL_IMPL_DEF(void, iemAImpl_psubb_u64,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc)) 9182 { 9183 RT_NOREF(pFpuState); 9143 IEM_DECL_IMPL_DEF(void, iemAImpl_psubb_u64,(uint64_t *puDst, uint64_t const *puSrc)) 9144 { 9184 9145 RTUINT64U uSrc1 = { *puDst }; 9185 9146 RTUINT64U uSrc2 = { *puSrc }; … … 9197 9158 9198 9159 9199 IEM_DECL_IMPL_DEF(void, iemAImpl_psubb_u128,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 9200 { 9201 RT_NOREF(pFpuState); 9160 IEM_DECL_IMPL_DEF(void, iemAImpl_psubb_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 9161 { 9202 9162 RTUINT128U uSrc1 = *puDst; 9203 9163 puDst->au8[0] = uSrc1.au8[0] - puSrc->au8[0]; … … 9287 9247 #ifdef IEM_WITHOUT_ASSEMBLY 9288 9248 9289 IEM_DECL_IMPL_DEF(void, iemAImpl_psubsb_u64,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc)) 9290 { 9291 RT_NOREF(pFpuState); 9249 IEM_DECL_IMPL_DEF(void, iemAImpl_psubsb_u64,(uint64_t *puDst, uint64_t const *puSrc)) 9250 { 9292 9251 RTUINT64U uSrc1 = { *puDst }; 9293 9252 RTUINT64U uSrc2 = { *puSrc }; … … 9305 9264 9306 9265 9307 IEM_DECL_IMPL_DEF(void, iemAImpl_psubsb_u128,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 9308 { 9309 RT_NOREF(pFpuState); 9266 IEM_DECL_IMPL_DEF(void, iemAImpl_psubsb_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 9267 { 9310 9268 RTUINT128U uSrc1 = *puDst; 9311 9269 puDst->au8[0] = SATURATED_SIGNED_WORD_TO_SIGNED_BYTE(uSrc1.ai8[0] - puSrc->ai8[0]); … … 9398 9356 #ifdef IEM_WITHOUT_ASSEMBLY 9399 9357 9400 IEM_DECL_IMPL_DEF(void, iemAImpl_psubusb_u64,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc)) 9401 { 9402 RT_NOREF(pFpuState); 9358 IEM_DECL_IMPL_DEF(void, iemAImpl_psubusb_u64,(uint64_t *puDst, uint64_t const *puSrc)) 9359 { 9403 9360 RTUINT64U uSrc1 = { *puDst }; 9404 9361 RTUINT64U uSrc2 = { *puSrc }; … … 9416 9373 9417 9374 9418 IEM_DECL_IMPL_DEF(void, iemAImpl_psubusb_u128,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 9419 { 9420 RT_NOREF(pFpuState); 9375 IEM_DECL_IMPL_DEF(void, iemAImpl_psubusb_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 9376 { 9421 9377 RTUINT128U uSrc1 = *puDst; 9422 9378 puDst->au8[0] = SATURATED_UNSIGNED_WORD_TO_UNSIGNED_BYTE_SUB(uSrc1.au8[0] - puSrc->au8[0]); … … 9504 9460 #ifdef IEM_WITHOUT_ASSEMBLY 9505 9461 9506 IEM_DECL_IMPL_DEF(void, iemAImpl_psubw_u64,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc)) 9507 { 9508 RT_NOREF(pFpuState); 9462 IEM_DECL_IMPL_DEF(void, iemAImpl_psubw_u64,(uint64_t *puDst, uint64_t const *puSrc)) 9463 { 9509 9464 RTUINT64U uSrc1 = { *puDst }; 9510 9465 RTUINT64U uSrc2 = { *puSrc }; … … 9518 9473 9519 9474 9520 IEM_DECL_IMPL_DEF(void, iemAImpl_psubw_u128,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 9521 { 9522 RT_NOREF(pFpuState); 9475 IEM_DECL_IMPL_DEF(void, iemAImpl_psubw_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 9476 { 9523 9477 RTUINT128U uSrc1 = *puDst; 9524 9478 puDst->au16[0] = uSrc1.au16[0] - puSrc->au16[0]; … … 9576 9530 #ifdef IEM_WITHOUT_ASSEMBLY 9577 9531 9578 IEM_DECL_IMPL_DEF(void, iemAImpl_psubsw_u64,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc)) 9579 { 9580 RT_NOREF(pFpuState); 9532 IEM_DECL_IMPL_DEF(void, iemAImpl_psubsw_u64,(uint64_t *puDst, uint64_t const *puSrc)) 9533 { 9581 9534 RTUINT64U uSrc1 = { *puDst }; 9582 9535 RTUINT64U uSrc2 = { *puSrc }; … … 9590 9543 9591 9544 9592 IEM_DECL_IMPL_DEF(void, iemAImpl_psubsw_u128,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 9593 { 9594 RT_NOREF(pFpuState); 9545 IEM_DECL_IMPL_DEF(void, iemAImpl_psubsw_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 9546 { 9595 9547 RTUINT128U uSrc1 = *puDst; 9596 9548 puDst->au16[0] = SATURATED_SIGNED_DWORD_TO_SIGNED_WORD(uSrc1.ai16[0] - puSrc->ai16[0]); … … 9651 9603 #ifdef IEM_WITHOUT_ASSEMBLY 9652 9604 9653 IEM_DECL_IMPL_DEF(void, iemAImpl_psubusw_u64,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc)) 9654 { 9655 RT_NOREF(pFpuState); 9605 IEM_DECL_IMPL_DEF(void, iemAImpl_psubusw_u64,(uint64_t *puDst, uint64_t const *puSrc)) 9606 { 9656 9607 RTUINT64U uSrc1 = { *puDst }; 9657 9608 RTUINT64U uSrc2 = { *puSrc }; … … 9665 9616 9666 9617 9667 IEM_DECL_IMPL_DEF(void, iemAImpl_psubusw_u128,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 9668 { 9669 RT_NOREF(pFpuState); 9618 IEM_DECL_IMPL_DEF(void, iemAImpl_psubusw_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 9619 { 9670 9620 RTUINT128U uSrc1 = *puDst; 9671 9621 puDst->au16[0] = SATURATED_UNSIGNED_DWORD_TO_UNSIGNED_WORD_SUB(uSrc1.au16[0] - puSrc->au16[0]); … … 9722 9672 #ifdef IEM_WITHOUT_ASSEMBLY 9723 9673 9724 IEM_DECL_IMPL_DEF(void, iemAImpl_psubd_u64,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc)) 9725 { 9726 RT_NOREF(pFpuState); 9674 IEM_DECL_IMPL_DEF(void, iemAImpl_psubd_u64,(uint64_t *puDst, uint64_t const *puSrc)) 9675 { 9727 9676 RTUINT64U uSrc1 = { *puDst }; 9728 9677 RTUINT64U uSrc2 = { *puSrc }; … … 9734 9683 9735 9684 9736 IEM_DECL_IMPL_DEF(void, iemAImpl_psubd_u128,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 9737 { 9738 RT_NOREF(pFpuState); 9685 IEM_DECL_IMPL_DEF(void, iemAImpl_psubd_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 9686 { 9739 9687 RTUINT128U uSrc1 = *puDst; 9740 9688 puDst->au32[0] = uSrc1.au32[0] - puSrc->au32[0]; … … 9776 9724 #ifdef IEM_WITHOUT_ASSEMBLY 9777 9725 9778 IEM_DECL_IMPL_DEF(void, iemAImpl_psubq_u64,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc)) 9779 { 9780 RT_NOREF(pFpuState); 9726 IEM_DECL_IMPL_DEF(void, iemAImpl_psubq_u64,(uint64_t *puDst, uint64_t const *puSrc)) 9727 { 9781 9728 *puDst = *puDst - *puSrc; 9782 9729 } 9783 9730 9784 IEM_DECL_IMPL_DEF(void, iemAImpl_psubq_u128,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 9785 { 9786 RT_NOREF(pFpuState); 9731 IEM_DECL_IMPL_DEF(void, iemAImpl_psubq_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 9732 { 9787 9733 RTUINT128U uSrc1 = *puDst; 9788 9734 puDst->au64[0] = uSrc1.au64[0] - puSrc->au64[0]; … … 9817 9763 #ifdef IEM_WITHOUT_ASSEMBLY 9818 9764 9819 IEM_DECL_IMPL_DEF(void, iemAImpl_pmullw_u64,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc)) 9820 { 9821 RT_NOREF(pFpuState); 9765 IEM_DECL_IMPL_DEF(void, iemAImpl_pmullw_u64,(uint64_t *puDst, uint64_t const *puSrc)) 9766 { 9822 9767 RTUINT64U uSrc1 = { *puDst }; 9823 9768 RTUINT64U uSrc2 = { *puSrc }; … … 9831 9776 9832 9777 9833 IEM_DECL_IMPL_DEF(void, iemAImpl_pmullw_u128,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 9834 { 9835 RT_NOREF(pFpuState); 9778 IEM_DECL_IMPL_DEF(void, iemAImpl_pmullw_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 9779 { 9836 9780 RTUINT128U uSrc1 = *puDst; 9837 9781 puDst->ai16[0] = uSrc1.ai16[0] * puSrc->ai16[0]; … … 9847 9791 #endif 9848 9792 9849 IEM_DECL_IMPL_DEF(void, iemAImpl_pmulld_u128_fallback,(P CX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc))9793 IEM_DECL_IMPL_DEF(void, iemAImpl_pmulld_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 9850 9794 { 9851 9795 RTUINT128U uSrc1 = *puDst; … … 9855 9799 puDst->ai32[2] = uSrc1.ai32[2] * puSrc->ai32[2]; 9856 9800 puDst->ai32[3] = uSrc1.ai32[3] * puSrc->ai32[3]; 9857 RT_NOREF(pFpuState);9858 9801 } 9859 9802 … … 9920 9863 #ifdef IEM_WITHOUT_ASSEMBLY 9921 9864 9922 IEM_DECL_IMPL_DEF(void, iemAImpl_pmulhw_u64,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc)) 9923 { 9924 RT_NOREF(pFpuState); 9865 IEM_DECL_IMPL_DEF(void, iemAImpl_pmulhw_u64,(uint64_t *puDst, uint64_t const *puSrc)) 9866 { 9925 9867 RTUINT64U uSrc1 = { *puDst }; 9926 9868 RTUINT64U uSrc2 = { *puSrc }; … … 9934 9876 9935 9877 9936 IEM_DECL_IMPL_DEF(void, iemAImpl_pmulhw_u128,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 9937 { 9938 RT_NOREF(pFpuState); 9878 IEM_DECL_IMPL_DEF(void, iemAImpl_pmulhw_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 9879 { 9939 9880 RTUINT128U uSrc1 = *puDst; 9940 9881 puDst->ai16[0] = RT_HIWORD(uSrc1.ai16[0] * puSrc->ai16[0]); … … 11339 11280 #ifdef IEM_WITHOUT_ASSEMBLY 11340 11281 11341 IEM_DECL_IMPL_DEF(void, iemAImpl_pmaddwd_u64,( PCX86FXSTATE pFpuState,uint64_t *puDst, uint64_t const *puSrc))11282 IEM_DECL_IMPL_DEF(void, iemAImpl_pmaddwd_u64,(uint64_t *puDst, uint64_t const *puSrc)) 11342 11283 { 11343 11284 RTUINT64U uSrc1 = { *puDst }; … … 11348 11289 uDst.ai32[1] = (int32_t)uSrc1.ai16[2] * uSrc2.ai16[2] + (int32_t)uSrc1.ai16[3] * uSrc2.ai16[3]; 11349 11290 *puDst = uDst.u; 11350 RT_NOREF(pFpuState); 11351 } 11352 11353 11354 IEM_DECL_IMPL_DEF(void, iemAImpl_pmaddwd_u128,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 11291 } 11292 11293 11294 IEM_DECL_IMPL_DEF(void, iemAImpl_pmaddwd_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 11355 11295 { 11356 11296 RTUINT128U uSrc1 = *puDst; … … 11360 11300 puDst->ai32[2] = (int32_t)uSrc1.ai16[4] * puSrc->ai16[4] + (int32_t)uSrc1.ai16[5] * puSrc->ai16[5]; 11361 11301 puDst->ai32[3] = (int32_t)uSrc1.ai16[6] * puSrc->ai16[6] + (int32_t)uSrc1.ai16[7] * puSrc->ai16[7]; 11362 RT_NOREF(pFpuState); 11363 } 11364 11365 #endif 11366 11367 11368 IEM_DECL_IMPL_DEF(void, iemAImpl_pmaddwd_u64_fallback,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc)) 11302 } 11303 11304 #endif 11305 11306 11307 IEM_DECL_IMPL_DEF(void, iemAImpl_pmaddwd_u64_fallback,(uint64_t *puDst, uint64_t const *puSrc)) 11369 11308 { 11370 11309 RTUINT64U uSrc1 = { *puDst }; … … 11375 11314 uDst.ai32[1] = (int32_t)uSrc1.ai16[2] * uSrc2.ai16[2] + (int32_t)uSrc1.ai16[3] * uSrc2.ai16[3]; 11376 11315 *puDst = uDst.u; 11377 RT_NOREF(pFpuState); 11378 } 11379 11380 11381 IEM_DECL_IMPL_DEF(void, iemAImpl_pmaddwd_u128_fallback,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 11316 } 11317 11318 11319 IEM_DECL_IMPL_DEF(void, iemAImpl_pmaddwd_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 11382 11320 { 11383 11321 RTUINT128U uSrc1 = *puDst; … … 11387 11325 puDst->ai32[2] = (int32_t)uSrc1.ai16[4] * puSrc->ai16[4] + (int32_t)uSrc1.ai16[5] * puSrc->ai16[5]; 11388 11326 puDst->ai32[3] = (int32_t)uSrc1.ai16[6] * puSrc->ai16[6] + (int32_t)uSrc1.ai16[7] * puSrc->ai16[7]; 11389 RT_NOREF(pFpuState);11390 11327 } 11391 11328 … … 11418 11355 #ifdef IEM_WITHOUT_ASSEMBLY 11419 11356 11420 IEM_DECL_IMPL_DEF(void, iemAImpl_pmaxub_u64,( PCX86FXSTATE pFpuState,uint64_t *puDst, uint64_t const *puSrc))11357 IEM_DECL_IMPL_DEF(void, iemAImpl_pmaxub_u64,(uint64_t *puDst, uint64_t const *puSrc)) 11421 11358 { 11422 11359 RTUINT64U uSrc1 = { *puDst }; … … 11433 11370 uDst.au8[7] = RT_MAX(uSrc1.au8[7], uSrc2.au8[7]); 11434 11371 *puDst = uDst.u; 11435 RT_NOREF(pFpuState); 11436 } 11437 11438 11439 IEM_DECL_IMPL_DEF(void, iemAImpl_pmaxub_u128,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 11372 } 11373 11374 11375 IEM_DECL_IMPL_DEF(void, iemAImpl_pmaxub_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 11440 11376 { 11441 11377 RTUINT128U uSrc1 = *puDst; … … 11457 11393 puDst->au8[14] = RT_MAX(uSrc1.au8[14], puSrc->au8[14]); 11458 11394 puDst->au8[15] = RT_MAX(uSrc1.au8[15], puSrc->au8[15]); 11459 RT_NOREF(pFpuState); 11460 } 11461 11462 #endif 11463 11464 11465 IEM_DECL_IMPL_DEF(void, iemAImpl_pmaxuw_u128_fallback,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 11395 } 11396 11397 #endif 11398 11399 11400 IEM_DECL_IMPL_DEF(void, iemAImpl_pmaxuw_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 11466 11401 { 11467 11402 RTUINT128U uSrc1 = *puDst; … … 11475 11410 puDst->au16[ 6] = RT_MAX(uSrc1.au16[ 6], puSrc->au16[ 6]); 11476 11411 puDst->au16[ 7] = RT_MAX(uSrc1.au16[ 7], puSrc->au16[ 7]); 11477 RT_NOREF(pFpuState); 11478 } 11479 11480 11481 IEM_DECL_IMPL_DEF(void, iemAImpl_pmaxud_u128_fallback,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 11412 } 11413 11414 11415 IEM_DECL_IMPL_DEF(void, iemAImpl_pmaxud_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 11482 11416 { 11483 11417 RTUINT128U uSrc1 = *puDst; … … 11487 11421 puDst->au32[ 2] = RT_MAX(uSrc1.au32[ 2], puSrc->au32[ 2]); 11488 11422 puDst->au32[ 3] = RT_MAX(uSrc1.au32[ 3], puSrc->au32[ 3]); 11489 RT_NOREF(pFpuState);11490 11423 } 11491 11424 … … 11622 11555 #ifdef IEM_WITHOUT_ASSEMBLY 11623 11556 11624 IEM_DECL_IMPL_DEF(void, iemAImpl_pmaxsw_u64,( PCX86FXSTATE pFpuState,uint64_t *puDst, uint64_t const *puSrc))11557 IEM_DECL_IMPL_DEF(void, iemAImpl_pmaxsw_u64,(uint64_t *puDst, uint64_t const *puSrc)) 11625 11558 { 11626 11559 RTUINT64U uSrc1 = { *puDst }; … … 11633 11566 uDst.ai16[3] = RT_MAX(uSrc1.ai16[3], uSrc2.ai16[3]); 11634 11567 *puDst = uDst.u; 11635 RT_NOREF(pFpuState); 11636 } 11637 11638 11639 IEM_DECL_IMPL_DEF(void, iemAImpl_pmaxsw_u128,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 11568 } 11569 11570 11571 IEM_DECL_IMPL_DEF(void, iemAImpl_pmaxsw_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 11640 11572 { 11641 11573 RTUINT128U uSrc1 = *puDst; … … 11649 11581 puDst->ai16[ 6] = RT_MAX(uSrc1.ai16[ 6], puSrc->ai16[ 6]); 11650 11582 puDst->ai16[ 7] = RT_MAX(uSrc1.ai16[ 7], puSrc->ai16[ 7]); 11651 RT_NOREF(pFpuState); 11652 } 11653 11654 #endif 11655 11656 IEM_DECL_IMPL_DEF(void, iemAImpl_pmaxsb_u128_fallback,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 11583 } 11584 11585 #endif 11586 11587 IEM_DECL_IMPL_DEF(void, iemAImpl_pmaxsb_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 11657 11588 { 11658 11589 RTUINT128U uSrc1 = *puDst; … … 11674 11605 puDst->ai8[14] = RT_MAX(uSrc1.ai8[14], puSrc->ai8[14]); 11675 11606 puDst->ai8[15] = RT_MAX(uSrc1.ai8[15], puSrc->ai8[15]); 11676 RT_NOREF(pFpuState); 11677 } 11678 11679 11680 IEM_DECL_IMPL_DEF(void, iemAImpl_pmaxsd_u128_fallback,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 11607 } 11608 11609 11610 IEM_DECL_IMPL_DEF(void, iemAImpl_pmaxsd_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 11681 11611 { 11682 11612 RTUINT128U uSrc1 = *puDst; … … 11686 11616 puDst->ai32[ 2] = RT_MAX(uSrc1.ai32[ 2], puSrc->ai32[ 2]); 11687 11617 puDst->ai32[ 3] = RT_MAX(uSrc1.ai32[ 3], puSrc->ai32[ 3]); 11688 RT_NOREF(pFpuState);11689 11618 } 11690 11619 … … 11821 11750 #ifdef IEM_WITHOUT_ASSEMBLY 11822 11751 11823 IEM_DECL_IMPL_DEF(void, iemAImpl_pminub_u64,( PCX86FXSTATE pFpuState,uint64_t *puDst, uint64_t const *puSrc))11752 IEM_DECL_IMPL_DEF(void, iemAImpl_pminub_u64,(uint64_t *puDst, uint64_t const *puSrc)) 11824 11753 { 11825 11754 RTUINT64U uSrc1 = { *puDst }; … … 11836 11765 uDst.au8[7] = RT_MIN(uSrc1.au8[7], uSrc2.au8[7]); 11837 11766 *puDst = uDst.u; 11838 RT_NOREF(pFpuState); 11839 } 11840 11841 11842 IEM_DECL_IMPL_DEF(void, iemAImpl_pminub_u128,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 11767 } 11768 11769 11770 IEM_DECL_IMPL_DEF(void, iemAImpl_pminub_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 11843 11771 { 11844 11772 RTUINT128U uSrc1 = *puDst; … … 11860 11788 puDst->au8[14] = RT_MIN(uSrc1.au8[14], puSrc->au8[14]); 11861 11789 puDst->au8[15] = RT_MIN(uSrc1.au8[15], puSrc->au8[15]); 11862 RT_NOREF(pFpuState); 11863 } 11864 11865 #endif 11866 11867 IEM_DECL_IMPL_DEF(void, iemAImpl_pminuw_u128_fallback,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 11790 } 11791 11792 #endif 11793 11794 IEM_DECL_IMPL_DEF(void, iemAImpl_pminuw_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 11868 11795 { 11869 11796 RTUINT128U uSrc1 = *puDst; … … 11877 11804 puDst->au16[ 6] = RT_MIN(uSrc1.au16[ 6], puSrc->au16[ 6]); 11878 11805 puDst->au16[ 7] = RT_MIN(uSrc1.au16[ 7], puSrc->au16[ 7]); 11879 RT_NOREF(pFpuState); 11880 } 11881 11882 11883 IEM_DECL_IMPL_DEF(void, iemAImpl_pminud_u128_fallback,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 11806 } 11807 11808 11809 IEM_DECL_IMPL_DEF(void, iemAImpl_pminud_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 11884 11810 { 11885 11811 RTUINT128U uSrc1 = *puDst; … … 11889 11815 puDst->au32[ 2] = RT_MIN(uSrc1.au32[ 2], puSrc->au32[ 2]); 11890 11816 puDst->au32[ 3] = RT_MIN(uSrc1.au32[ 3], puSrc->au32[ 3]); 11891 RT_NOREF(pFpuState);11892 11817 } 11893 11818 … … 12024 11949 #ifdef IEM_WITHOUT_ASSEMBLY 12025 11950 12026 IEM_DECL_IMPL_DEF(void, iemAImpl_pminsw_u64,( PCX86FXSTATE pFpuState,uint64_t *puDst, uint64_t const *puSrc))11951 IEM_DECL_IMPL_DEF(void, iemAImpl_pminsw_u64,(uint64_t *puDst, uint64_t const *puSrc)) 12027 11952 { 12028 11953 RTUINT64U uSrc1 = { *puDst }; … … 12035 11960 uDst.ai16[3] = RT_MIN(uSrc1.ai16[3], uSrc2.ai16[3]); 12036 11961 *puDst = uDst.u; 12037 RT_NOREF(pFpuState); 12038 } 12039 12040 12041 IEM_DECL_IMPL_DEF(void, iemAImpl_pminsw_u128,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 11962 } 11963 11964 11965 IEM_DECL_IMPL_DEF(void, iemAImpl_pminsw_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 12042 11966 { 12043 11967 RTUINT128U uSrc1 = *puDst; … … 12051 11975 puDst->ai16[ 6] = RT_MIN(uSrc1.ai16[ 6], puSrc->ai16[ 6]); 12052 11976 puDst->ai16[ 7] = RT_MIN(uSrc1.ai16[ 7], puSrc->ai16[ 7]); 12053 RT_NOREF(pFpuState); 12054 } 12055 12056 #endif 12057 12058 IEM_DECL_IMPL_DEF(void, iemAImpl_pminsb_u128_fallback,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 11977 } 11978 11979 #endif 11980 11981 IEM_DECL_IMPL_DEF(void, iemAImpl_pminsb_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 12059 11982 { 12060 11983 RTUINT128U uSrc1 = *puDst; … … 12076 11999 puDst->ai8[14] = RT_MIN(uSrc1.ai8[14], puSrc->ai8[14]); 12077 12000 puDst->ai8[15] = RT_MIN(uSrc1.ai8[15], puSrc->ai8[15]); 12078 RT_NOREF(pFpuState); 12079 } 12080 12081 12082 IEM_DECL_IMPL_DEF(void, iemAImpl_pminsd_u128_fallback,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 12001 } 12002 12003 12004 IEM_DECL_IMPL_DEF(void, iemAImpl_pminsd_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 12083 12005 { 12084 12006 RTUINT128U uSrc1 = *puDst; … … 12088 12010 puDst->ai32[ 2] = RT_MIN(uSrc1.ai32[ 2], puSrc->ai32[ 2]); 12089 12011 puDst->ai32[ 3] = RT_MIN(uSrc1.ai32[ 3], puSrc->ai32[ 3]); 12090 RT_NOREF(pFpuState);12091 12012 } 12092 12013 … … 12529 12450 */ 12530 12451 12531 IEM_DECL_IMPL_DEF(void, iemAImpl_pshufb_u64_fallback,( PCX86FXSTATE pFpuState,uint64_t *puDst, uint64_t const *puSrc))12452 IEM_DECL_IMPL_DEF(void, iemAImpl_pshufb_u64_fallback,(uint64_t *puDst, uint64_t const *puSrc)) 12532 12453 { 12533 12454 RTUINT64U const uSrc = { *puSrc }; … … 12542 12463 } 12543 12464 *puDst = uDstOut.u; 12544 RT_NOREF(pFpuState); 12545 } 12546 12547 12548 IEM_DECL_IMPL_DEF(void, iemAImpl_pshufb_u128_fallback,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 12465 } 12466 12467 12468 IEM_DECL_IMPL_DEF(void, iemAImpl_pshufb_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 12549 12469 { 12550 12470 RTUINT128U const uSrc = *puSrc; … … 12559 12479 puDst->au8[iByte] = uDstIn.au8[idxSrc & 15]; 12560 12480 } 12561 RT_NOREF(pFpuState);12562 12481 } 12563 12482 … … 13741 13660 */ 13742 13661 13743 IEM_DECL_IMPL_DEF(void, iemAImpl_pabsb_u64_fallback,( PCX86FXSTATE pFpuState,uint64_t *puDst, uint64_t const *puSrc))13662 IEM_DECL_IMPL_DEF(void, iemAImpl_pabsb_u64_fallback,(uint64_t *puDst, uint64_t const *puSrc)) 13744 13663 { 13745 13664 RTUINT64U const uSrc = { *puSrc }; … … 13755 13674 uDstOut.au8[7] = RT_ABS(uSrc.ai8[7]); 13756 13675 *puDst = uDstOut.u; 13757 RT_NOREF(pFpuState); 13758 } 13759 13760 13761 IEM_DECL_IMPL_DEF(void, iemAImpl_pabsb_u128_fallback,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 13676 } 13677 13678 13679 IEM_DECL_IMPL_DEF(void, iemAImpl_pabsb_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 13762 13680 { 13763 13681 puDst->au8[ 0] = RT_ABS(puSrc->ai8[ 0]); … … 13777 13695 puDst->au8[14] = RT_ABS(puSrc->ai8[14]); 13778 13696 puDst->au8[15] = RT_ABS(puSrc->ai8[15]); 13779 RT_NOREF(pFpuState); 13780 } 13781 13782 13783 IEM_DECL_IMPL_DEF(void, iemAImpl_pabsw_u64_fallback,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc)) 13697 } 13698 13699 13700 IEM_DECL_IMPL_DEF(void, iemAImpl_pabsw_u64_fallback,(uint64_t *puDst, uint64_t const *puSrc)) 13784 13701 { 13785 13702 RTUINT64U const uSrc = { *puSrc }; … … 13791 13708 uDstOut.au16[3] = RT_ABS(uSrc.ai16[3]); 13792 13709 *puDst = uDstOut.u; 13793 RT_NOREF(pFpuState); 13794 } 13795 13796 13797 IEM_DECL_IMPL_DEF(void, iemAImpl_pabsw_u128_fallback,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 13710 } 13711 13712 13713 IEM_DECL_IMPL_DEF(void, iemAImpl_pabsw_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 13798 13714 { 13799 13715 puDst->au16[ 0] = RT_ABS(puSrc->ai16[ 0]); … … 13805 13721 puDst->au16[ 6] = RT_ABS(puSrc->ai16[ 6]); 13806 13722 puDst->au16[ 7] = RT_ABS(puSrc->ai16[ 7]); 13807 RT_NOREF(pFpuState); 13808 } 13809 13810 13811 IEM_DECL_IMPL_DEF(void, iemAImpl_pabsd_u64_fallback,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc)) 13723 } 13724 13725 13726 IEM_DECL_IMPL_DEF(void, iemAImpl_pabsd_u64_fallback,(uint64_t *puDst, uint64_t const *puSrc)) 13812 13727 { 13813 13728 RTUINT64U const uSrc = { *puSrc }; … … 13817 13732 uDstOut.au32[1] = RT_ABS(uSrc.ai32[1]); 13818 13733 *puDst = uDstOut.u; 13819 RT_NOREF(pFpuState); 13820 } 13821 13822 13823 IEM_DECL_IMPL_DEF(void, iemAImpl_pabsd_u128_fallback,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 13734 } 13735 13736 13737 IEM_DECL_IMPL_DEF(void, iemAImpl_pabsd_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 13824 13738 { 13825 13739 puDst->au32[ 0] = RT_ABS(puSrc->ai32[ 0]); … … 13827 13741 puDst->au32[ 2] = RT_ABS(puSrc->ai32[ 2]); 13828 13742 puDst->au32[ 3] = RT_ABS(puSrc->ai32[ 3]); 13829 RT_NOREF(pFpuState);13830 13743 } 13831 13744 … … 13948 13861 * PSIGNB / VPSIGNB / PSIGNW / VPSIGNW / PSIGND / VPSIGND 13949 13862 */ 13950 IEM_DECL_IMPL_DEF(void, iemAImpl_psignb_u64_fallback,( PCX86FXSTATE pFpuState,uint64_t *puDst, uint64_t const *puSrc))13863 IEM_DECL_IMPL_DEF(void, iemAImpl_psignb_u64_fallback,(uint64_t *puDst, uint64_t const *puSrc)) 13951 13864 { 13952 13865 RTUINT64U uSrc1 = { *puDst }; … … 13965 13878 13966 13879 *puDst = uDst.u; 13967 RT_NOREF(pFpuState); 13968 } 13969 13970 13971 IEM_DECL_IMPL_DEF(void, iemAImpl_psignb_u128_fallback,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 13880 } 13881 13882 13883 IEM_DECL_IMPL_DEF(void, iemAImpl_psignb_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 13972 13884 { 13973 13885 RTUINT128U uSrc1 = *puDst; … … 13982 13894 puDst->ai8[i] = uSrc1.ai8[i]; 13983 13895 } 13984 13985 RT_NOREF(pFpuState); 13986 } 13987 13988 13989 IEM_DECL_IMPL_DEF(void, iemAImpl_psignw_u64_fallback,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc)) 13896 } 13897 13898 13899 IEM_DECL_IMPL_DEF(void, iemAImpl_psignw_u64_fallback,(uint64_t *puDst, uint64_t const *puSrc)) 13990 13900 { 13991 13901 RTUINT64U uSrc1 = { *puDst }; … … 14004 13914 14005 13915 *puDst = uDst.u; 14006 RT_NOREF(pFpuState); 14007 } 14008 14009 14010 IEM_DECL_IMPL_DEF(void, iemAImpl_psignw_u128_fallback,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 13916 } 13917 13918 13919 IEM_DECL_IMPL_DEF(void, iemAImpl_psignw_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 14011 13920 { 14012 13921 RTUINT128U uSrc1 = *puDst; … … 14021 13930 puDst->ai16[i] = uSrc1.ai16[i]; 14022 13931 } 14023 14024 RT_NOREF(pFpuState); 14025 } 14026 14027 14028 IEM_DECL_IMPL_DEF(void, iemAImpl_psignd_u64_fallback,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc)) 13932 } 13933 13934 13935 IEM_DECL_IMPL_DEF(void, iemAImpl_psignd_u64_fallback,(uint64_t *puDst, uint64_t const *puSrc)) 14029 13936 { 14030 13937 RTUINT64U uSrc1 = { *puDst }; … … 14043 13950 14044 13951 *puDst = uDst.u; 14045 RT_NOREF(pFpuState); 14046 } 14047 14048 14049 IEM_DECL_IMPL_DEF(void, iemAImpl_psignd_u128_fallback,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 13952 } 13953 13954 13955 IEM_DECL_IMPL_DEF(void, iemAImpl_psignd_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 14050 13956 { 14051 13957 RTUINT128U uSrc1 = *puDst; … … 14060 13966 puDst->ai32[i] = uSrc1.ai32[i]; 14061 13967 } 14062 14063 RT_NOREF(pFpuState);14064 13968 } 14065 13969 … … 14152 14056 * PHADDW / VPHADDW / PHADDD / VPHADDD 14153 14057 */ 14154 IEM_DECL_IMPL_DEF(void, iemAImpl_phaddw_u64_fallback,( PCX86FXSTATE pFpuState,uint64_t *puDst, uint64_t const *puSrc))14058 IEM_DECL_IMPL_DEF(void, iemAImpl_phaddw_u64_fallback,(uint64_t *puDst, uint64_t const *puSrc)) 14155 14059 { 14156 14060 RTUINT64U uSrc1 = { *puDst }; … … 14163 14067 uDst.ai16[3] = uSrc2.ai16[2] + uSrc2.ai16[3]; 14164 14068 *puDst = uDst.u; 14165 RT_NOREF(pFpuState); 14166 } 14167 14168 14169 IEM_DECL_IMPL_DEF(void, iemAImpl_phaddw_u128_fallback,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 14069 } 14070 14071 14072 IEM_DECL_IMPL_DEF(void, iemAImpl_phaddw_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 14170 14073 { 14171 14074 RTUINT128U uSrc1 = *puDst; … … 14180 14083 puDst->ai16[6] = puSrc->ai16[4] + puSrc->ai16[5]; 14181 14084 puDst->ai16[7] = puSrc->ai16[6] + puSrc->ai16[7]; 14182 RT_NOREF(pFpuState); 14183 } 14184 14185 14186 IEM_DECL_IMPL_DEF(void, iemAImpl_phaddd_u64_fallback,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc)) 14085 } 14086 14087 14088 IEM_DECL_IMPL_DEF(void, iemAImpl_phaddd_u64_fallback,(uint64_t *puDst, uint64_t const *puSrc)) 14187 14089 { 14188 14090 RTUINT64U uSrc1 = { *puDst }; … … 14193 14095 uDst.ai32[1] = uSrc2.ai32[0] + uSrc2.ai32[1]; 14194 14096 *puDst = uDst.u; 14195 RT_NOREF(pFpuState); 14196 } 14197 14198 14199 IEM_DECL_IMPL_DEF(void, iemAImpl_phaddd_u128_fallback,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 14097 } 14098 14099 14100 IEM_DECL_IMPL_DEF(void, iemAImpl_phaddd_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 14200 14101 { 14201 14102 RTUINT128U uSrc1 = *puDst; … … 14206 14107 puDst->ai32[2] = puSrc->ai32[0] + puSrc->ai32[1]; 14207 14108 puDst->ai32[3] = puSrc->ai32[2] + puSrc->ai32[3]; 14208 RT_NOREF(pFpuState);14209 14109 } 14210 14110 … … 14297 14197 * PHSUBW / VPHSUBW / PHSUBD / VPHSUBD 14298 14198 */ 14299 IEM_DECL_IMPL_DEF(void, iemAImpl_phsubw_u64_fallback,( PCX86FXSTATE pFpuState,uint64_t *puDst, uint64_t const *puSrc))14199 IEM_DECL_IMPL_DEF(void, iemAImpl_phsubw_u64_fallback,(uint64_t *puDst, uint64_t const *puSrc)) 14300 14200 { 14301 14201 RTUINT64U uSrc1 = { *puDst }; … … 14308 14208 uDst.ai16[3] = uSrc2.ai16[2] - uSrc2.ai16[3]; 14309 14209 *puDst = uDst.u; 14310 RT_NOREF(pFpuState); 14311 } 14312 14313 14314 IEM_DECL_IMPL_DEF(void, iemAImpl_phsubw_u128_fallback,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 14210 } 14211 14212 14213 IEM_DECL_IMPL_DEF(void, iemAImpl_phsubw_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 14315 14214 { 14316 14215 RTUINT128U uSrc1 = *puDst; … … 14325 14224 puDst->ai16[6] = puSrc->ai16[4] - puSrc->ai16[5]; 14326 14225 puDst->ai16[7] = puSrc->ai16[6] - puSrc->ai16[7]; 14327 RT_NOREF(pFpuState); 14328 } 14329 14330 14331 IEM_DECL_IMPL_DEF(void, iemAImpl_phsubd_u64_fallback,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc)) 14226 } 14227 14228 14229 IEM_DECL_IMPL_DEF(void, iemAImpl_phsubd_u64_fallback,(uint64_t *puDst, uint64_t const *puSrc)) 14332 14230 { 14333 14231 RTUINT64U uSrc1 = { *puDst }; … … 14338 14236 uDst.ai32[1] = uSrc2.ai32[0] - uSrc2.ai32[1]; 14339 14237 *puDst = uDst.u; 14340 RT_NOREF(pFpuState); 14341 } 14342 14343 14344 IEM_DECL_IMPL_DEF(void, iemAImpl_phsubd_u128_fallback,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 14238 } 14239 14240 14241 IEM_DECL_IMPL_DEF(void, iemAImpl_phsubd_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 14345 14242 { 14346 14243 RTUINT128U uSrc1 = *puDst; … … 14351 14248 puDst->ai32[2] = puSrc->ai32[0] - puSrc->ai32[1]; 14352 14249 puDst->ai32[3] = puSrc->ai32[2] - puSrc->ai32[3]; 14353 RT_NOREF(pFpuState);14354 14250 } 14355 14251 … … 14442 14338 * PHADDSW / VPHADDSW 14443 14339 */ 14444 IEM_DECL_IMPL_DEF(void, iemAImpl_phaddsw_u64_fallback,( PCX86FXSTATE pFpuState,uint64_t *puDst, uint64_t const *puSrc))14340 IEM_DECL_IMPL_DEF(void, iemAImpl_phaddsw_u64_fallback,(uint64_t *puDst, uint64_t const *puSrc)) 14445 14341 { 14446 14342 RTUINT64U uSrc1 = { *puDst }; … … 14453 14349 uDst.ai16[3] = SATURATED_SIGNED_DWORD_TO_SIGNED_WORD(uSrc2.ai16[2] + uSrc2.ai16[3]); 14454 14350 *puDst = uDst.u; 14455 RT_NOREF(pFpuState); 14456 } 14457 14458 14459 IEM_DECL_IMPL_DEF(void, iemAImpl_phaddsw_u128_fallback,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 14351 } 14352 14353 14354 IEM_DECL_IMPL_DEF(void, iemAImpl_phaddsw_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 14460 14355 { 14461 14356 RTUINT128U uSrc1 = *puDst; … … 14470 14365 puDst->ai16[6] = SATURATED_SIGNED_DWORD_TO_SIGNED_WORD(puSrc->ai16[4] + puSrc->ai16[5]); 14471 14366 puDst->ai16[7] = SATURATED_SIGNED_DWORD_TO_SIGNED_WORD(puSrc->ai16[6] + puSrc->ai16[7]); 14472 RT_NOREF(pFpuState);14473 14367 } 14474 14368 … … 14525 14419 * PHSUBSW / VPHSUBSW 14526 14420 */ 14527 IEM_DECL_IMPL_DEF(void, iemAImpl_phsubsw_u64_fallback,( PCX86FXSTATE pFpuState,uint64_t *puDst, uint64_t const *puSrc))14421 IEM_DECL_IMPL_DEF(void, iemAImpl_phsubsw_u64_fallback,(uint64_t *puDst, uint64_t const *puSrc)) 14528 14422 { 14529 14423 RTUINT64U uSrc1 = { *puDst }; … … 14536 14430 uDst.ai16[3] = SATURATED_SIGNED_DWORD_TO_SIGNED_WORD(uSrc2.ai16[2] - uSrc2.ai16[3]); 14537 14431 *puDst = uDst.u; 14538 RT_NOREF(pFpuState); 14539 } 14540 14541 14542 IEM_DECL_IMPL_DEF(void, iemAImpl_phsubsw_u128_fallback,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 14432 } 14433 14434 14435 IEM_DECL_IMPL_DEF(void, iemAImpl_phsubsw_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 14543 14436 { 14544 14437 RTUINT128U uSrc1 = *puDst; … … 14553 14446 puDst->ai16[6] = SATURATED_SIGNED_DWORD_TO_SIGNED_WORD(puSrc->ai16[4] - puSrc->ai16[5]); 14554 14447 puDst->ai16[7] = SATURATED_SIGNED_DWORD_TO_SIGNED_WORD(puSrc->ai16[6] - puSrc->ai16[7]); 14555 RT_NOREF(pFpuState);14556 14448 } 14557 14449 … … 14608 14500 * PMADDUBSW / VPMADDUBSW 14609 14501 */ 14610 IEM_DECL_IMPL_DEF(void, iemAImpl_pmaddubsw_u64_fallback,( PCX86FXSTATE pFpuState,uint64_t *puDst, uint64_t const *puSrc))14502 IEM_DECL_IMPL_DEF(void, iemAImpl_pmaddubsw_u64_fallback,(uint64_t *puDst, uint64_t const *puSrc)) 14611 14503 { 14612 14504 RTUINT64U uSrc1 = { *puDst }; … … 14619 14511 uDst.ai16[3] = SATURATED_SIGNED_DWORD_TO_SIGNED_WORD((uint16_t)uSrc1.au8[6] * uSrc2.ai8[6] + (uint16_t)uSrc1.au8[7] * uSrc2.ai8[7]); 14620 14512 *puDst = uDst.u; 14621 RT_NOREF(pFpuState); 14622 } 14623 14624 14625 IEM_DECL_IMPL_DEF(void, iemAImpl_pmaddubsw_u128_fallback,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 14513 } 14514 14515 14516 IEM_DECL_IMPL_DEF(void, iemAImpl_pmaddubsw_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 14626 14517 { 14627 14518 RTUINT128U uSrc1 = *puDst; … … 14635 14526 puDst->ai16[6] = SATURATED_SIGNED_DWORD_TO_SIGNED_WORD((uint16_t)uSrc1.au8[12] * puSrc->ai8[12] + (uint16_t)uSrc1.au8[13] * puSrc->ai8[13]); 14636 14527 puDst->ai16[7] = SATURATED_SIGNED_DWORD_TO_SIGNED_WORD((uint16_t)uSrc1.au8[14] * puSrc->ai8[14] + (uint16_t)uSrc1.au8[15] * puSrc->ai8[15]); 14637 RT_NOREF(pFpuState);14638 14528 } 14639 14529 … … 14691 14581 (uint16_t)(((((int32_t)(a_Src1) * (a_Src2)) >> 14 ) + 1) >> 1) 14692 14582 14693 IEM_DECL_IMPL_DEF(void, iemAImpl_pmulhrsw_u64_fallback,( PCX86FXSTATE pFpuState,uint64_t *puDst, uint64_t const *puSrc))14583 IEM_DECL_IMPL_DEF(void, iemAImpl_pmulhrsw_u64_fallback,(uint64_t *puDst, uint64_t const *puSrc)) 14694 14584 { 14695 14585 RTUINT64U uSrc1 = { *puDst }; … … 14702 14592 uDst.au16[3] = DO_PMULHRSW(uSrc1.ai16[3], uSrc2.ai16[3]); 14703 14593 *puDst = uDst.u; 14704 RT_NOREF(pFpuState); 14705 } 14706 14707 14708 IEM_DECL_IMPL_DEF(void, iemAImpl_pmulhrsw_u128_fallback,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 14594 } 14595 14596 14597 IEM_DECL_IMPL_DEF(void, iemAImpl_pmulhrsw_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 14709 14598 { 14710 14599 RTUINT128U uSrc1 = *puDst; … … 14718 14607 puDst->ai16[6] = DO_PMULHRSW(uSrc1.ai16[6], puSrc->ai16[6]); 14719 14608 puDst->ai16[7] = DO_PMULHRSW(uSrc1.ai16[7], puSrc->ai16[7]); 14720 RT_NOREF(pFpuState);14721 14609 } 14722 14610 … … 14941 14829 #ifdef IEM_WITHOUT_ASSEMBLY 14942 14830 14943 IEM_DECL_IMPL_DEF(void, iemAImpl_pmuludq_u64,( PCX86FXSTATE pFpuState,uint64_t *puDst, uint64_t const *puSrc))14831 IEM_DECL_IMPL_DEF(void, iemAImpl_pmuludq_u64,(uint64_t *puDst, uint64_t const *puSrc)) 14944 14832 { 14945 14833 RTUINT64U uSrc1 = { *puDst }; … … 14947 14835 ASMCompilerBarrier(); 14948 14836 *puDst = (uint64_t)uSrc1.au32[0] * uSrc2.au32[0]; 14949 RT_NOREF(pFpuState); 14950 } 14951 14952 14953 IEM_DECL_IMPL_DEF(void, iemAImpl_pmuludq_u128,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 14837 } 14838 14839 14840 IEM_DECL_IMPL_DEF(void, iemAImpl_pmuludq_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 14954 14841 { 14955 14842 RTUINT128U uSrc1 = *puDst; … … 14958 14845 puDst->au64[0] = (uint64_t)uSrc1.au32[0] * uSrc2.au32[0]; 14959 14846 puDst->au64[1] = (uint64_t)uSrc1.au32[2] * uSrc2.au32[2]; 14960 RT_NOREF(pFpuState);14961 14847 } 14962 14848 -
trunk/src/VBox/VMM/VMMAll/IEMAllInstThree0f38.cpp.h
r104018 r104103 38 38 * pxxx mm1, mm2/mem64 39 39 * that was introduced with SSE3. 40 * 41 * The @a pfnU64 worker function takes no FXSAVE state, just the operands. 40 42 */ 41 FNIEMOP_DEF_1(iemOpCommonMmx _FullFull_To_Full_Ssse3, PFNIEMAIMPLMEDIAF2U64, pfnU64)43 FNIEMOP_DEF_1(iemOpCommonMmxOpt_FullFull_To_Full_Ssse3, PFNIEMAIMPLMEDIAOPTF2U64, pfnU64) 42 44 { 43 45 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); … … 59 61 IEM_MC_REF_MREG_U64(pDst, IEM_GET_MODRM_REG_8(bRm)); 60 62 IEM_MC_REF_MREG_U64_CONST(pSrc, IEM_GET_MODRM_RM_8(bRm)); 61 IEM_MC_CALL_ MMX_AIMPL_2(pfnU64, pDst, pSrc);63 IEM_MC_CALL_VOID_AIMPL_2(pfnU64, pDst, pSrc); 62 64 IEM_MC_MODIFIED_MREG_BY_REF(pDst); 63 65 … … 85 87 86 88 IEM_MC_REF_MREG_U64(pDst, IEM_GET_MODRM_REG_8(bRm)); 87 IEM_MC_CALL_ MMX_AIMPL_2(pfnU64, pDst, pSrc);89 IEM_MC_CALL_VOID_AIMPL_2(pfnU64, pDst, pSrc); 88 90 IEM_MC_MODIFIED_MREG_BY_REF(pDst); 89 91 … … 101 103 * Exceptions type 4. SSSE3 cpuid checks. 102 104 * 103 * @sa iemOpCommonSse2_FullFull_To_Full 105 * The @a pfnU128 worker function takes no FXSAVE state, just the operands. 106 * 107 * @sa iemOpCommonSse2Opt_FullFull_To_Full 104 108 */ 105 FNIEMOP_DEF_1(iemOpCommonSsse3 _FullFull_To_Full, PFNIEMAIMPLMEDIAF2U128, pfnU128)109 FNIEMOP_DEF_1(iemOpCommonSsse3Opt_FullFull_To_Full, PFNIEMAIMPLMEDIAOPTF2U128, pfnU128) 106 110 { 107 111 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); … … 119 123 IEM_MC_REF_XREG_U128(puDst, IEM_GET_MODRM_REG(pVCpu, bRm)); 120 124 IEM_MC_REF_XREG_U128_CONST(puSrc, IEM_GET_MODRM_RM(pVCpu, bRm)); 121 IEM_MC_CALL_ SSE_AIMPL_2(pfnU128, puDst, puSrc);125 IEM_MC_CALL_VOID_AIMPL_2(pfnU128, puDst, puSrc); 122 126 IEM_MC_ADVANCE_RIP_AND_FINISH(); 123 127 IEM_MC_END(); … … 141 145 IEM_MC_PREPARE_SSE_USAGE(); 142 146 IEM_MC_REF_XREG_U128(puDst, IEM_GET_MODRM_REG(pVCpu, bRm)); 143 IEM_MC_CALL_ SSE_AIMPL_2(pfnU128, puDst, puSrc);147 IEM_MC_CALL_VOID_AIMPL_2(pfnU128, puDst, puSrc); 144 148 145 149 IEM_MC_ADVANCE_RIP_AND_FINISH(); … … 156 160 * Exceptions type 4. SSE4.1 cpuid checks. 157 161 * 158 * @sa iemOpCommonSse2_FullFull_To_Full, iemOpCommonSsse3_FullFull_To_Full, 159 * iemOpCommonSse42_FullFull_To_Full 160 */ 161 FNIEMOP_DEF_1(iemOpCommonSse41_FullFull_To_Full, PFNIEMAIMPLMEDIAF2U128, pfnU128) 162 { 163 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 164 if (IEM_IS_MODRM_REG_MODE(bRm)) 165 { 166 /* 167 * Register, register. 168 */ 169 IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0); 170 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse41); 171 IEM_MC_ARG(PRTUINT128U, puDst, 0); 172 IEM_MC_ARG(PCRTUINT128U, puSrc, 1); 173 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 174 IEM_MC_PREPARE_SSE_USAGE(); 175 IEM_MC_REF_XREG_U128(puDst, IEM_GET_MODRM_REG(pVCpu, bRm)); 176 IEM_MC_REF_XREG_U128_CONST(puSrc, IEM_GET_MODRM_RM(pVCpu, bRm)); 177 IEM_MC_CALL_SSE_AIMPL_2(pfnU128, puDst, puSrc); 178 IEM_MC_ADVANCE_RIP_AND_FINISH(); 179 IEM_MC_END(); 180 } 181 else 182 { 183 /* 184 * Register, memory. 185 */ 186 IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0); 187 IEM_MC_ARG(PRTUINT128U, puDst, 0); 188 IEM_MC_LOCAL(RTUINT128U, uSrc); 189 IEM_MC_ARG_LOCAL_REF(PCRTUINT128U, puSrc, uSrc, 1); 190 IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc); 191 192 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 193 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse41); 194 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 195 IEM_MC_FETCH_MEM_U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 196 197 IEM_MC_PREPARE_SSE_USAGE(); 198 IEM_MC_REF_XREG_U128(puDst, IEM_GET_MODRM_REG(pVCpu, bRm)); 199 IEM_MC_CALL_SSE_AIMPL_2(pfnU128, puDst, puSrc); 200 201 IEM_MC_ADVANCE_RIP_AND_FINISH(); 202 IEM_MC_END(); 203 } 204 } 205 206 207 /** 208 * Common worker for SSE4.1 instructions on the forms: 209 * pxxx xmm1, xmm2/mem128 162 * The @a pfnU128 worker function takes no FXSAVE state, just the operands. 210 163 * 211 * Proper alignment of the 128-bit operand is enforced. 212 * Exceptions type 4. SSE4.1 cpuid checks. 213 * 214 * Unlike iemOpCommonSse41_FullFull_To_Full, the @a pfnU128 worker function 215 * takes no FXSAVE state, just the operands. 216 * 217 * @sa iemOpCommonSse2_FullFull_To_Full, iemOpCommonSsse3_FullFull_To_Full, 218 * iemOpCommonSse41_FullFull_To_Full, iemOpCommonSse42_FullFull_To_Full 164 * @sa iemOpCommonSse2Opt_FullFull_To_Full, iemOpCommonSsse3Opt_FullFull_To_Full, 165 * iemOpCommonSse41Opt_FullFull_To_Full, iemOpCommonSse42Opt_FullFull_To_Full 219 166 */ 220 167 FNIEMOP_DEF_1(iemOpCommonSse41Opt_FullFull_To_Full, PFNIEMAIMPLMEDIAOPTF2U128, pfnU128) … … 271 218 * Exceptions type 4. SSE4.2 cpuid checks. 272 219 * 273 * @sa iemOpCommonSse2 _FullFull_To_Full, iemOpCommonSsse3_FullFull_To_Full,274 * iemOpCommonSse41 _FullFull_To_Full220 * @sa iemOpCommonSse2Opt_FullFull_To_Full, iemOpCommonSsse3Opt_FullFull_To_Full, 221 * iemOpCommonSse41Opt_FullFull_To_Full 275 222 */ 276 FNIEMOP_DEF_1(iemOpCommonSse42 _FullFull_To_Full, PFNIEMAIMPLMEDIAF2U128, pfnU128)223 FNIEMOP_DEF_1(iemOpCommonSse42Opt_FullFull_To_Full, PFNIEMAIMPLMEDIAOPTF2U128, pfnU128) 277 224 { 278 225 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); … … 290 237 IEM_MC_REF_XREG_U128(puDst, IEM_GET_MODRM_REG(pVCpu, bRm)); 291 238 IEM_MC_REF_XREG_U128_CONST(puSrc, IEM_GET_MODRM_RM(pVCpu, bRm)); 292 IEM_MC_CALL_ SSE_AIMPL_2(pfnU128, puDst, puSrc);239 IEM_MC_CALL_VOID_AIMPL_2(pfnU128, puDst, puSrc); 293 240 IEM_MC_ADVANCE_RIP_AND_FINISH(); 294 241 IEM_MC_END(); … … 312 259 IEM_MC_PREPARE_SSE_USAGE(); 313 260 IEM_MC_REF_XREG_U128(puDst, IEM_GET_MODRM_REG(pVCpu, bRm)); 314 IEM_MC_CALL_ SSE_AIMPL_2(pfnU128, puDst, puSrc);261 IEM_MC_CALL_VOID_AIMPL_2(pfnU128, puDst, puSrc); 315 262 316 263 IEM_MC_ADVANCE_RIP_AND_FINISH(); … … 331 278 * 332 279 * @sa iemOpCommonSse2_FullFull_To_Full, iemOpCommonSsse3_FullFull_To_Full, 333 * iemOpCommonSse41_FullFull_To_Full, iemOpCommonSse42_FullFull_To_Full, 334 * iemOpCommonSha_FullFull_To_Full 280 * iemOpCommonSse41_FullFull_To_Full, iemOpCommonSha_FullFull_To_Full 335 281 */ 336 282 FNIEMOP_DEF_1(iemOpCommonAesNi_FullFull_To_Full, PFNIEMAIMPLMEDIAOPTF2U128, pfnU128) … … 444 390 { 445 391 IEMOP_MNEMONIC2(RM, PSHUFB, pshufb, Pq, Qq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 446 return FNIEMOP_CALL_1(iemOpCommonMmx _FullFull_To_Full_Ssse3,392 return FNIEMOP_CALL_1(iemOpCommonMmxOpt_FullFull_To_Full_Ssse3, 447 393 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_pshufb_u64,&iemAImpl_pshufb_u64_fallback)); 448 394 } … … 453 399 { 454 400 IEMOP_MNEMONIC2(RM, PSHUFB, pshufb, Vx, Wx, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 455 return FNIEMOP_CALL_1(iemOpCommonSsse3 _FullFull_To_Full,401 return FNIEMOP_CALL_1(iemOpCommonSsse3Opt_FullFull_To_Full, 456 402 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_pshufb_u128, iemAImpl_pshufb_u128_fallback)); 457 403 … … 463 409 { 464 410 IEMOP_MNEMONIC2(RM, PHADDW, phaddw, Pq, Qq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 465 return FNIEMOP_CALL_1(iemOpCommonMmx _FullFull_To_Full_Ssse3,411 return FNIEMOP_CALL_1(iemOpCommonMmxOpt_FullFull_To_Full_Ssse3, 466 412 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_phaddw_u64,&iemAImpl_phaddw_u64_fallback)); 467 413 } … … 472 418 { 473 419 IEMOP_MNEMONIC2(RM, PHADDW, phaddw, Vx, Wx, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 474 return FNIEMOP_CALL_1(iemOpCommonSsse3 _FullFull_To_Full,420 return FNIEMOP_CALL_1(iemOpCommonSsse3Opt_FullFull_To_Full, 475 421 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_phaddw_u128, iemAImpl_phaddw_u128_fallback)); 476 422 … … 482 428 { 483 429 IEMOP_MNEMONIC2(RM, PHADDD, phaddd, Pq, Qq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 484 return FNIEMOP_CALL_1(iemOpCommonMmx _FullFull_To_Full_Ssse3,430 return FNIEMOP_CALL_1(iemOpCommonMmxOpt_FullFull_To_Full_Ssse3, 485 431 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_phaddd_u64,&iemAImpl_phaddd_u64_fallback)); 486 432 } … … 491 437 { 492 438 IEMOP_MNEMONIC2(RM, PHADDD, phaddd, Vx, Wx, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 493 return FNIEMOP_CALL_1(iemOpCommonSsse3 _FullFull_To_Full,439 return FNIEMOP_CALL_1(iemOpCommonSsse3Opt_FullFull_To_Full, 494 440 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_phaddd_u128, iemAImpl_phaddd_u128_fallback)); 495 441 … … 501 447 { 502 448 IEMOP_MNEMONIC2(RM, PHADDSW, phaddsw, Pq, Qq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 503 return FNIEMOP_CALL_1(iemOpCommonMmx _FullFull_To_Full_Ssse3,449 return FNIEMOP_CALL_1(iemOpCommonMmxOpt_FullFull_To_Full_Ssse3, 504 450 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_phaddsw_u64,&iemAImpl_phaddsw_u64_fallback)); 505 451 } … … 510 456 { 511 457 IEMOP_MNEMONIC2(RM, PHADDSW, phaddsw, Vx, Wx, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 512 return FNIEMOP_CALL_1(iemOpCommonSsse3 _FullFull_To_Full,458 return FNIEMOP_CALL_1(iemOpCommonSsse3Opt_FullFull_To_Full, 513 459 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_phaddsw_u128, iemAImpl_phaddsw_u128_fallback)); 514 460 … … 520 466 { 521 467 IEMOP_MNEMONIC2(RM, PMADDUBSW, pmaddubsw, Pq, Qq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 522 return FNIEMOP_CALL_1(iemOpCommonMmx _FullFull_To_Full_Ssse3,468 return FNIEMOP_CALL_1(iemOpCommonMmxOpt_FullFull_To_Full_Ssse3, 523 469 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_pmaddubsw_u64, &iemAImpl_pmaddubsw_u64_fallback)); 524 470 } … … 529 475 { 530 476 IEMOP_MNEMONIC2(RM, PMADDUBSW, pmaddubsw, Vx, Wx, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 531 return FNIEMOP_CALL_1(iemOpCommonSsse3 _FullFull_To_Full,477 return FNIEMOP_CALL_1(iemOpCommonSsse3Opt_FullFull_To_Full, 532 478 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_pmaddubsw_u128, iemAImpl_pmaddubsw_u128_fallback)); 533 479 … … 539 485 { 540 486 IEMOP_MNEMONIC2(RM, PHSUBW, phsubw, Pq, Qq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 541 return FNIEMOP_CALL_1(iemOpCommonMmx _FullFull_To_Full_Ssse3,487 return FNIEMOP_CALL_1(iemOpCommonMmxOpt_FullFull_To_Full_Ssse3, 542 488 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_phsubw_u64,&iemAImpl_phsubw_u64_fallback)); 543 489 } … … 548 494 { 549 495 IEMOP_MNEMONIC2(RM, PHSUBW, phsubw, Vx, Wx, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 550 return FNIEMOP_CALL_1(iemOpCommonSsse3 _FullFull_To_Full,496 return FNIEMOP_CALL_1(iemOpCommonSsse3Opt_FullFull_To_Full, 551 497 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_phsubw_u128, iemAImpl_phsubw_u128_fallback)); 552 498 … … 558 504 { 559 505 IEMOP_MNEMONIC2(RM, PHSUBD, phsubd, Pq, Qq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 560 return FNIEMOP_CALL_1(iemOpCommonMmx _FullFull_To_Full_Ssse3,506 return FNIEMOP_CALL_1(iemOpCommonMmxOpt_FullFull_To_Full_Ssse3, 561 507 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_phsubd_u64,&iemAImpl_phsubd_u64_fallback)); 562 508 } … … 568 514 { 569 515 IEMOP_MNEMONIC2(RM, PHSUBD, phsubd, Vx, Wx, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 570 return FNIEMOP_CALL_1(iemOpCommonSsse3 _FullFull_To_Full,516 return FNIEMOP_CALL_1(iemOpCommonSsse3Opt_FullFull_To_Full, 571 517 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_phsubd_u128, iemAImpl_phsubd_u128_fallback)); 572 518 … … 578 524 { 579 525 IEMOP_MNEMONIC2(RM, PHSUBSW, phsubsw, Pq, Qq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 580 return FNIEMOP_CALL_1(iemOpCommonMmx _FullFull_To_Full_Ssse3,526 return FNIEMOP_CALL_1(iemOpCommonMmxOpt_FullFull_To_Full_Ssse3, 581 527 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_phsubsw_u64,&iemAImpl_phsubsw_u64_fallback)); 582 528 } … … 587 533 { 588 534 IEMOP_MNEMONIC2(RM, PHSUBSW, phsubsw, Vx, Wx, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 589 return FNIEMOP_CALL_1(iemOpCommonSsse3 _FullFull_To_Full,535 return FNIEMOP_CALL_1(iemOpCommonSsse3Opt_FullFull_To_Full, 590 536 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_phsubsw_u128, iemAImpl_phsubsw_u128_fallback)); 591 537 … … 597 543 { 598 544 IEMOP_MNEMONIC2(RM, PSIGNB, psignb, Pq, Qq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 599 return FNIEMOP_CALL_1(iemOpCommonMmx _FullFull_To_Full_Ssse3,545 return FNIEMOP_CALL_1(iemOpCommonMmxOpt_FullFull_To_Full_Ssse3, 600 546 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_psignb_u64, &iemAImpl_psignb_u64_fallback)); 601 547 } … … 606 552 { 607 553 IEMOP_MNEMONIC2(RM, PSIGNB, psignb, Vx, Wx, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 608 return FNIEMOP_CALL_1(iemOpCommonSsse3 _FullFull_To_Full,554 return FNIEMOP_CALL_1(iemOpCommonSsse3Opt_FullFull_To_Full, 609 555 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_psignb_u128, iemAImpl_psignb_u128_fallback)); 610 556 … … 616 562 { 617 563 IEMOP_MNEMONIC2(RM, PSIGNW, psignw, Pq, Qq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 618 return FNIEMOP_CALL_1(iemOpCommonMmx _FullFull_To_Full_Ssse3,564 return FNIEMOP_CALL_1(iemOpCommonMmxOpt_FullFull_To_Full_Ssse3, 619 565 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_psignw_u64, &iemAImpl_psignw_u64_fallback)); 620 566 } … … 625 571 { 626 572 IEMOP_MNEMONIC2(RM, PSIGNW, psignw, Vx, Wx, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 627 return FNIEMOP_CALL_1(iemOpCommonSsse3 _FullFull_To_Full,573 return FNIEMOP_CALL_1(iemOpCommonSsse3Opt_FullFull_To_Full, 628 574 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_psignw_u128, iemAImpl_psignw_u128_fallback)); 629 575 … … 635 581 { 636 582 IEMOP_MNEMONIC2(RM, PSIGND, psignd, Pq, Qq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 637 return FNIEMOP_CALL_1(iemOpCommonMmx _FullFull_To_Full_Ssse3,583 return FNIEMOP_CALL_1(iemOpCommonMmxOpt_FullFull_To_Full_Ssse3, 638 584 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_psignd_u64, &iemAImpl_psignd_u64_fallback)); 639 585 } … … 644 590 { 645 591 IEMOP_MNEMONIC2(RM, PSIGND, psignd, Vx, Wx, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 646 return FNIEMOP_CALL_1(iemOpCommonSsse3 _FullFull_To_Full,592 return FNIEMOP_CALL_1(iemOpCommonSsse3Opt_FullFull_To_Full, 647 593 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_psignd_u128, iemAImpl_psignd_u128_fallback)); 648 594 … … 654 600 { 655 601 IEMOP_MNEMONIC2(RM, PMULHRSW, pmulhrsw, Pq, Qq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 656 return FNIEMOP_CALL_1(iemOpCommonMmx _FullFull_To_Full_Ssse3,602 return FNIEMOP_CALL_1(iemOpCommonMmxOpt_FullFull_To_Full_Ssse3, 657 603 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_pmulhrsw_u64, &iemAImpl_pmulhrsw_u64_fallback)); 658 604 } … … 663 609 { 664 610 IEMOP_MNEMONIC2(RM, PMULHRSW, pmulhrsw, Vx, Wx, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 665 return FNIEMOP_CALL_1(iemOpCommonSsse3 _FullFull_To_Full,611 return FNIEMOP_CALL_1(iemOpCommonSsse3Opt_FullFull_To_Full, 666 612 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_pmulhrsw_u128, iemAImpl_pmulhrsw_u128_fallback)); 667 613 … … 849 795 { 850 796 IEMOP_MNEMONIC2(RM, PABSB, pabsb, Pq, Qq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 851 return FNIEMOP_CALL_1(iemOpCommonMmx _FullFull_To_Full_Ssse3,797 return FNIEMOP_CALL_1(iemOpCommonMmxOpt_FullFull_To_Full_Ssse3, 852 798 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_pabsb_u64, &iemAImpl_pabsb_u64_fallback)); 853 799 } … … 858 804 { 859 805 IEMOP_MNEMONIC2(RM, PABSB, pabsb, Vx, Wx, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 860 return FNIEMOP_CALL_1(iemOpCommonSsse3 _FullFull_To_Full,806 return FNIEMOP_CALL_1(iemOpCommonSsse3Opt_FullFull_To_Full, 861 807 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_pabsb_u128, iemAImpl_pabsb_u128_fallback)); 862 808 … … 868 814 { 869 815 IEMOP_MNEMONIC2(RM, PABSW, pabsw, Pq, Qq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 870 return FNIEMOP_CALL_1(iemOpCommonMmx _FullFull_To_Full_Ssse3,816 return FNIEMOP_CALL_1(iemOpCommonMmxOpt_FullFull_To_Full_Ssse3, 871 817 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_pabsw_u64, &iemAImpl_pabsw_u64_fallback)); 872 818 } … … 877 823 { 878 824 IEMOP_MNEMONIC2(RM, PABSW, pabsw, Vx, Wx, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 879 return FNIEMOP_CALL_1(iemOpCommonSsse3 _FullFull_To_Full,825 return FNIEMOP_CALL_1(iemOpCommonSsse3Opt_FullFull_To_Full, 880 826 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_pabsw_u128, iemAImpl_pabsw_u128_fallback)); 881 827 … … 887 833 { 888 834 IEMOP_MNEMONIC2(RM, PABSD, pabsd, Pq, Qq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 889 return FNIEMOP_CALL_1(iemOpCommonMmx _FullFull_To_Full_Ssse3,835 return FNIEMOP_CALL_1(iemOpCommonMmxOpt_FullFull_To_Full_Ssse3, 890 836 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_pabsd_u64, &iemAImpl_pabsd_u64_fallback)); 891 837 } … … 896 842 { 897 843 IEMOP_MNEMONIC2(RM, PABSD, pabsd, Vx, Wx, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 898 return FNIEMOP_CALL_1(iemOpCommonSsse3 _FullFull_To_Full,844 return FNIEMOP_CALL_1(iemOpCommonSsse3Opt_FullFull_To_Full, 899 845 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_pabsd_u128, iemAImpl_pabsd_u128_fallback)); 900 846 … … 1025 971 { 1026 972 IEMOP_MNEMONIC2(RM, PCMPEQQ, pcmpeqq, Vx, Wx, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 1027 return FNIEMOP_CALL_1(iemOpCommonSse41 _FullFull_To_Full,973 return FNIEMOP_CALL_1(iemOpCommonSse41Opt_FullFull_To_Full, 1028 974 IEM_SELECT_HOST_OR_FALLBACK(fSse41, iemAImpl_pcmpeqq_u128, iemAImpl_pcmpeqq_u128_fallback)); 1029 975 } … … 1152 1098 { 1153 1099 IEMOP_MNEMONIC2(RM, PCMPGTQ, pcmpgtq, Vx, Wx, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 1154 return FNIEMOP_CALL_1(iemOpCommonSse42 _FullFull_To_Full,1100 return FNIEMOP_CALL_1(iemOpCommonSse42Opt_FullFull_To_Full, 1155 1101 IEM_SELECT_HOST_OR_FALLBACK(fSse42, iemAImpl_pcmpgtq_u128, iemAImpl_pcmpgtq_u128_fallback)); 1156 1102 } … … 1161 1107 { 1162 1108 IEMOP_MNEMONIC2(RM, PMINSB, pminsb, Vx, Wx, DISOPTYPE_HARMLESS | DISOPTYPE_X86_SSE, IEMOPHINT_IGNORES_OP_SIZES); 1163 return FNIEMOP_CALL_1(iemOpCommonSse41 _FullFull_To_Full,1109 return FNIEMOP_CALL_1(iemOpCommonSse41Opt_FullFull_To_Full, 1164 1110 IEM_SELECT_HOST_OR_FALLBACK(fSse41, iemAImpl_pminsb_u128, iemAImpl_pminsb_u128_fallback)); 1165 1111 } … … 1170 1116 { 1171 1117 IEMOP_MNEMONIC2(RM, PMINSD, pminsd, Vx, Wx, DISOPTYPE_HARMLESS | DISOPTYPE_X86_SSE, IEMOPHINT_IGNORES_OP_SIZES); 1172 return FNIEMOP_CALL_1(iemOpCommonSse41 _FullFull_To_Full,1118 return FNIEMOP_CALL_1(iemOpCommonSse41Opt_FullFull_To_Full, 1173 1119 IEM_SELECT_HOST_OR_FALLBACK(fSse41, iemAImpl_pminsd_u128, iemAImpl_pminsd_u128_fallback)); 1174 1120 } … … 1179 1125 { 1180 1126 IEMOP_MNEMONIC2(RM, PMINUW, pminuw, Vx, Wx, DISOPTYPE_HARMLESS | DISOPTYPE_X86_SSE, IEMOPHINT_IGNORES_OP_SIZES); 1181 return FNIEMOP_CALL_1(iemOpCommonSse41 _FullFull_To_Full,1127 return FNIEMOP_CALL_1(iemOpCommonSse41Opt_FullFull_To_Full, 1182 1128 IEM_SELECT_HOST_OR_FALLBACK(fSse41, iemAImpl_pminuw_u128, iemAImpl_pminuw_u128_fallback)); 1183 1129 } … … 1188 1134 { 1189 1135 IEMOP_MNEMONIC2(RM, PMINUD, pminud, Vx, Wx, DISOPTYPE_HARMLESS | DISOPTYPE_X86_SSE, IEMOPHINT_IGNORES_OP_SIZES); 1190 return FNIEMOP_CALL_1(iemOpCommonSse41 _FullFull_To_Full,1136 return FNIEMOP_CALL_1(iemOpCommonSse41Opt_FullFull_To_Full, 1191 1137 IEM_SELECT_HOST_OR_FALLBACK(fSse41, iemAImpl_pminud_u128, iemAImpl_pminud_u128_fallback)); 1192 1138 } … … 1197 1143 { 1198 1144 IEMOP_MNEMONIC2(RM, PMAXSB, pmaxsb, Vx, Wx, DISOPTYPE_HARMLESS | DISOPTYPE_X86_SSE, IEMOPHINT_IGNORES_OP_SIZES); 1199 return FNIEMOP_CALL_1(iemOpCommonSse41 _FullFull_To_Full,1145 return FNIEMOP_CALL_1(iemOpCommonSse41Opt_FullFull_To_Full, 1200 1146 IEM_SELECT_HOST_OR_FALLBACK(fSse41, iemAImpl_pmaxsb_u128, iemAImpl_pmaxsb_u128_fallback)); 1201 1147 } … … 1206 1152 { 1207 1153 IEMOP_MNEMONIC2(RM, PMAXSD, pmaxsd, Vx, Wx, DISOPTYPE_HARMLESS | DISOPTYPE_X86_SSE, IEMOPHINT_IGNORES_OP_SIZES); 1208 return FNIEMOP_CALL_1(iemOpCommonSse41 _FullFull_To_Full,1154 return FNIEMOP_CALL_1(iemOpCommonSse41Opt_FullFull_To_Full, 1209 1155 IEM_SELECT_HOST_OR_FALLBACK(fSse41, iemAImpl_pmaxsd_u128, iemAImpl_pmaxsd_u128_fallback)); 1210 1156 } … … 1215 1161 { 1216 1162 IEMOP_MNEMONIC2(RM, PMAXUW, pmaxuw, Vx, Wx, DISOPTYPE_HARMLESS | DISOPTYPE_X86_SSE, IEMOPHINT_IGNORES_OP_SIZES); 1217 return FNIEMOP_CALL_1(iemOpCommonSse41 _FullFull_To_Full,1163 return FNIEMOP_CALL_1(iemOpCommonSse41Opt_FullFull_To_Full, 1218 1164 IEM_SELECT_HOST_OR_FALLBACK(fSse41, iemAImpl_pmaxuw_u128, iemAImpl_pmaxuw_u128_fallback)); 1219 1165 } … … 1224 1170 { 1225 1171 IEMOP_MNEMONIC2(RM, PMAXUD, pmaxud, Vx, Wx, DISOPTYPE_HARMLESS | DISOPTYPE_X86_SSE, IEMOPHINT_IGNORES_OP_SIZES); 1226 return FNIEMOP_CALL_1(iemOpCommonSse41 _FullFull_To_Full,1172 return FNIEMOP_CALL_1(iemOpCommonSse41Opt_FullFull_To_Full, 1227 1173 IEM_SELECT_HOST_OR_FALLBACK(fSse41, iemAImpl_pmaxud_u128, iemAImpl_pmaxud_u128_fallback)); 1228 1174 } … … 1233 1179 { 1234 1180 IEMOP_MNEMONIC2(RM, PMULLD, pmulld, Vx, Wx, DISOPTYPE_HARMLESS | DISOPTYPE_X86_SSE, IEMOPHINT_IGNORES_OP_SIZES); 1235 return FNIEMOP_CALL_1(iemOpCommonSse41 _FullFull_To_Full,1181 return FNIEMOP_CALL_1(iemOpCommonSse41Opt_FullFull_To_Full, 1236 1182 IEM_SELECT_HOST_OR_FALLBACK(fSse41, iemAImpl_pmulld_u128, iemAImpl_pmulld_u128_fallback)); 1237 1183 } -
trunk/src/VBox/VMM/VMMAll/IEMAllInstTwoByte0f.cpp.h
r104076 r104103 39 39 * Common worker for MMX instructions on the form: 40 40 * pxxx mm1, mm2/mem64 41 */ 42 FNIEMOP_DEF_1(iemOpCommonMmx_FullFull_To_Full, PFNIEMAIMPLMEDIAF2U64, pfnU64) 41 * 42 * The @a pfnU64 worker function takes no FXSAVE state, just the operands. 43 */ 44 FNIEMOP_DEF_1(iemOpCommonMmxOpt_FullFull_To_Full, PFNIEMAIMPLMEDIAOPTF2U64, pfnU64) 43 45 { 44 46 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); … … 60 62 IEM_MC_REF_MREG_U64(pDst, IEM_GET_MODRM_REG_8(bRm)); 61 63 IEM_MC_REF_MREG_U64_CONST(pSrc, IEM_GET_MODRM_RM_8(bRm)); 62 IEM_MC_CALL_ MMX_AIMPL_2(pfnU64, pDst, pSrc);64 IEM_MC_CALL_VOID_AIMPL_2(pfnU64, pDst, pSrc); 63 65 IEM_MC_MODIFIED_MREG_BY_REF(pDst); 64 66 … … 86 88 87 89 IEM_MC_REF_MREG_U64(pDst, IEM_GET_MODRM_REG_8(bRm)); 88 IEM_MC_CALL_MMX_AIMPL_2(pfnU64, pDst, pSrc);89 IEM_MC_MODIFIED_MREG_BY_REF(pDst);90 91 IEM_MC_ADVANCE_RIP_AND_FINISH();92 IEM_MC_END();93 }94 }95 96 97 /**98 * Common worker for MMX instructions on the form:99 * pxxx mm1, mm2/mem64100 *101 * Unlike iemOpCommonMmx_FullFull_To_Full, the @a pfnU64 worker function takes102 * no FXSAVE state, just the operands.103 */104 FNIEMOP_DEF_1(iemOpCommonMmxOpt_FullFull_To_Full, PFNIEMAIMPLMEDIAOPTF2U64, pfnU64)105 {106 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);107 if (IEM_IS_MODRM_REG_MODE(bRm))108 {109 /*110 * MMX, MMX.111 */112 /** @todo testcase: REX.B / REX.R and MMX register indexing. Ignored? */113 /** @todo testcase: REX.B / REX.R and segment register indexing. Ignored? */114 IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);115 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fMmx);116 IEM_MC_ARG(uint64_t *, pDst, 0);117 IEM_MC_ARG(uint64_t const *, pSrc, 1);118 IEM_MC_MAYBE_RAISE_MMX_RELATED_XCPT();119 IEM_MC_PREPARE_FPU_USAGE();120 IEM_MC_FPU_TO_MMX_MODE();121 122 IEM_MC_REF_MREG_U64(pDst, IEM_GET_MODRM_REG_8(bRm));123 IEM_MC_REF_MREG_U64_CONST(pSrc, IEM_GET_MODRM_RM_8(bRm));124 IEM_MC_CALL_VOID_AIMPL_2(pfnU64, pDst, pSrc);125 IEM_MC_MODIFIED_MREG_BY_REF(pDst);126 127 IEM_MC_ADVANCE_RIP_AND_FINISH();128 IEM_MC_END();129 }130 else131 {132 /*133 * MMX, [mem64].134 */135 IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);136 IEM_MC_ARG(uint64_t *, pDst, 0);137 IEM_MC_LOCAL(uint64_t, uSrc);138 IEM_MC_ARG_LOCAL_REF(uint64_t const *, pSrc, uSrc, 1);139 IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc);140 141 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);142 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fMmx);143 IEM_MC_MAYBE_RAISE_MMX_RELATED_XCPT();144 IEM_MC_FETCH_MEM_U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);145 146 IEM_MC_PREPARE_FPU_USAGE();147 IEM_MC_FPU_TO_MMX_MODE();148 149 IEM_MC_REF_MREG_U64(pDst, IEM_GET_MODRM_REG_8(bRm));150 90 IEM_MC_CALL_VOID_AIMPL_2(pfnU64, pDst, pSrc); 151 91 IEM_MC_MODIFIED_MREG_BY_REF(pDst); … … 161 101 * pxxx mm1, mm2/mem64 162 102 * for instructions introduced with SSE. 163 */ 164 FNIEMOP_DEF_1(iemOpCommonMmxSse_FullFull_To_Full, PFNIEMAIMPLMEDIAF2U64, pfnU64) 103 * 104 * The @a pfnU64 worker function takes no FXSAVE state, just the operands. 105 */ 106 FNIEMOP_DEF_1(iemOpCommonMmxSseOpt_FullFull_To_Full, PFNIEMAIMPLMEDIAOPTF2U64, pfnU64) 165 107 { 166 108 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); … … 182 124 IEM_MC_REF_MREG_U64(pDst, IEM_GET_MODRM_REG_8(bRm)); 183 125 IEM_MC_REF_MREG_U64_CONST(pSrc, IEM_GET_MODRM_RM_8(bRm)); 184 IEM_MC_CALL_ MMX_AIMPL_2(pfnU64, pDst, pSrc);126 IEM_MC_CALL_VOID_AIMPL_2(pfnU64, pDst, pSrc); 185 127 IEM_MC_MODIFIED_MREG_BY_REF(pDst); 186 128 … … 208 150 209 151 IEM_MC_REF_MREG_U64(pDst, IEM_GET_MODRM_REG_8(bRm)); 210 IEM_MC_CALL_MMX_AIMPL_2(pfnU64, pDst, pSrc);211 IEM_MC_MODIFIED_MREG_BY_REF(pDst);212 213 IEM_MC_ADVANCE_RIP_AND_FINISH();214 IEM_MC_END();215 }216 }217 218 219 /**220 * Common worker for MMX instructions on the form:221 * pxxx mm1, mm2/mem64222 * for instructions introduced with SSE.223 *224 * Unlike iemOpCommonMmxSse_FullFull_To_Full, the @a pfnU64 worker function takes225 * no FXSAVE state, just the operands.226 */227 FNIEMOP_DEF_1(iemOpCommonMmxSseOpt_FullFull_To_Full, PFNIEMAIMPLMEDIAOPTF2U64, pfnU64)228 {229 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);230 if (IEM_IS_MODRM_REG_MODE(bRm))231 {232 /*233 * MMX, MMX.234 */235 /** @todo testcase: REX.B / REX.R and MMX register indexing. Ignored? */236 /** @todo testcase: REX.B / REX.R and segment register indexing. Ignored? */237 IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);238 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX_2_OR(fSse, fAmdMmxExts);239 IEM_MC_ARG(uint64_t *, pDst, 0);240 IEM_MC_ARG(uint64_t const *, pSrc, 1);241 IEM_MC_MAYBE_RAISE_MMX_RELATED_XCPT();242 IEM_MC_PREPARE_FPU_USAGE();243 IEM_MC_FPU_TO_MMX_MODE();244 245 IEM_MC_REF_MREG_U64(pDst, IEM_GET_MODRM_REG_8(bRm));246 IEM_MC_REF_MREG_U64_CONST(pSrc, IEM_GET_MODRM_RM_8(bRm));247 IEM_MC_CALL_VOID_AIMPL_2(pfnU64, pDst, pSrc);248 IEM_MC_MODIFIED_MREG_BY_REF(pDst);249 250 IEM_MC_ADVANCE_RIP_AND_FINISH();251 IEM_MC_END();252 }253 else254 {255 /*256 * MMX, [mem64].257 */258 IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0);259 IEM_MC_ARG(uint64_t *, pDst, 0);260 IEM_MC_LOCAL(uint64_t, uSrc);261 IEM_MC_ARG_LOCAL_REF(uint64_t const *, pSrc, uSrc, 1);262 IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc);263 264 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);265 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX_2_OR(fSse, fAmdMmxExts);266 IEM_MC_MAYBE_RAISE_MMX_RELATED_XCPT();267 IEM_MC_FETCH_MEM_U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);268 269 IEM_MC_PREPARE_FPU_USAGE();270 IEM_MC_FPU_TO_MMX_MODE();271 272 IEM_MC_REF_MREG_U64(pDst, IEM_GET_MODRM_REG_8(bRm));273 152 IEM_MC_CALL_VOID_AIMPL_2(pfnU64, pDst, pSrc); 274 153 IEM_MC_MODIFIED_MREG_BY_REF(pDst); … … 285 164 * that was introduced with SSE2. 286 165 */ 287 FNIEMOP_DEF_1(iemOpCommonMmx _FullFull_To_Full_Sse2, PFNIEMAIMPLMEDIAF2U64, pfnU64)166 FNIEMOP_DEF_1(iemOpCommonMmxOpt_FullFull_To_Full_Sse2, PFNIEMAIMPLMEDIAOPTF2U64, pfnU64) 288 167 { 289 168 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); … … 305 184 IEM_MC_REF_MREG_U64(pDst, IEM_GET_MODRM_REG_8(bRm)); 306 185 IEM_MC_REF_MREG_U64_CONST(pSrc, IEM_GET_MODRM_RM_8(bRm)); 307 IEM_MC_CALL_ MMX_AIMPL_2(pfnU64, pDst, pSrc);186 IEM_MC_CALL_VOID_AIMPL_2(pfnU64, pDst, pSrc); 308 187 IEM_MC_MODIFIED_MREG_BY_REF(pDst); 309 188 … … 331 210 332 211 IEM_MC_REF_MREG_U64(pDst, IEM_GET_MODRM_REG_8(bRm)); 333 IEM_MC_CALL_ MMX_AIMPL_2(pfnU64, pDst, pSrc);212 IEM_MC_CALL_VOID_AIMPL_2(pfnU64, pDst, pSrc); 334 213 IEM_MC_MODIFIED_MREG_BY_REF(pDst); 335 214 … … 347 226 * SSE cpuid checks. No SIMD FP exceptions. 348 227 * 228 * The @a pfnU128 worker function takes no FXSAVE state, just the operands. 229 * 349 230 * @sa iemOpCommonSse2_FullFull_To_Full 350 231 */ 351 FNIEMOP_DEF_1(iemOpCommonSse _FullFull_To_Full, PFNIEMAIMPLMEDIAF2U128, pfnU128)232 FNIEMOP_DEF_1(iemOpCommonSseOpt_FullFull_To_Full, PFNIEMAIMPLMEDIAOPTF2U128, pfnU128) 352 233 { 353 234 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); … … 365 246 IEM_MC_REF_XREG_U128(pDst, IEM_GET_MODRM_REG(pVCpu, bRm)); 366 247 IEM_MC_REF_XREG_U128_CONST(pSrc, IEM_GET_MODRM_RM(pVCpu, bRm)); 367 IEM_MC_CALL_ SSE_AIMPL_2(pfnU128, pDst, pSrc);248 IEM_MC_CALL_VOID_AIMPL_2(pfnU128, pDst, pSrc); 368 249 IEM_MC_ADVANCE_RIP_AND_FINISH(); 369 250 IEM_MC_END(); … … 387 268 IEM_MC_PREPARE_SSE_USAGE(); 388 269 IEM_MC_REF_XREG_U128(pDst, IEM_GET_MODRM_REG(pVCpu, bRm)); 389 IEM_MC_CALL_ SSE_AIMPL_2(pfnU128, pDst, pSrc);270 IEM_MC_CALL_VOID_AIMPL_2(pfnU128, pDst, pSrc); 390 271 391 272 IEM_MC_ADVANCE_RIP_AND_FINISH(); … … 402 283 * Exceptions type 4. SSE2 cpuid checks. 403 284 * 404 * @sa iemOpCommonSse41_FullFull_To_Full, iemOpCommonSse2_FullFull_To_Full 405 */ 406 FNIEMOP_DEF_1(iemOpCommonSse2_FullFull_To_Full, PFNIEMAIMPLMEDIAF2U128, pfnU128) 407 { 408 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 409 if (IEM_IS_MODRM_REG_MODE(bRm)) 410 { 411 /* 412 * XMM, XMM. 413 */ 414 IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0); 415 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2); 416 IEM_MC_ARG(PRTUINT128U, pDst, 0); 417 IEM_MC_ARG(PCRTUINT128U, pSrc, 1); 418 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 419 IEM_MC_PREPARE_SSE_USAGE(); 420 IEM_MC_REF_XREG_U128(pDst, IEM_GET_MODRM_REG(pVCpu, bRm)); 421 IEM_MC_REF_XREG_U128_CONST(pSrc, IEM_GET_MODRM_RM(pVCpu, bRm)); 422 IEM_MC_CALL_SSE_AIMPL_2(pfnU128, pDst, pSrc); 423 IEM_MC_ADVANCE_RIP_AND_FINISH(); 424 IEM_MC_END(); 425 } 426 else 427 { 428 /* 429 * XMM, [mem128]. 430 */ 431 IEM_MC_BEGIN(IEM_MC_F_NOT_286_OR_OLDER, 0); 432 IEM_MC_ARG(PRTUINT128U, pDst, 0); 433 IEM_MC_LOCAL(RTUINT128U, uSrc); 434 IEM_MC_ARG_LOCAL_REF(PCRTUINT128U, pSrc, uSrc, 1); 435 IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc); 436 437 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 438 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2); 439 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 440 IEM_MC_FETCH_MEM_U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 441 442 IEM_MC_PREPARE_SSE_USAGE(); 443 IEM_MC_REF_XREG_U128(pDst, IEM_GET_MODRM_REG(pVCpu, bRm)); 444 IEM_MC_CALL_SSE_AIMPL_2(pfnU128, pDst, pSrc); 445 446 IEM_MC_ADVANCE_RIP_AND_FINISH(); 447 IEM_MC_END(); 448 } 449 } 450 451 452 /** 453 * Common worker for SSE2 instructions on the forms: 454 * pxxx xmm1, xmm2/mem128 455 * 456 * Proper alignment of the 128-bit operand is enforced. 457 * Exceptions type 4. SSE2 cpuid checks. 458 * 459 * Unlike iemOpCommonSse2_FullFull_To_Full, the @a pfnU128 worker function takes 460 * no FXSAVE state, just the operands. 285 * The @a pfnU128 worker function takes no FXSAVE state, just the operands. 461 286 * 462 287 * @sa iemOpCommonSse41_FullFull_To_Full, iemOpCommonSse2_FullFull_To_Full … … 5709 5534 { 5710 5535 IEMOP_MNEMONIC2(RM, ANDPS, andps, Vps, Wps, DISOPTYPE_HARMLESS, 0); 5711 return FNIEMOP_CALL_1(iemOpCommonSse _FullFull_To_Full, iemAImpl_pand_u128);5536 return FNIEMOP_CALL_1(iemOpCommonSseOpt_FullFull_To_Full, iemAImpl_pand_u128); 5712 5537 } 5713 5538 … … 5717 5542 { 5718 5543 IEMOP_MNEMONIC2(RM, ANDPD, andpd, Vpd, Wpd, DISOPTYPE_HARMLESS, 0); 5719 return FNIEMOP_CALL_1(iemOpCommonSse2 _FullFull_To_Full, iemAImpl_pand_u128);5544 return FNIEMOP_CALL_1(iemOpCommonSse2Opt_FullFull_To_Full, iemAImpl_pand_u128); 5720 5545 } 5721 5546 … … 5729 5554 { 5730 5555 IEMOP_MNEMONIC2(RM, ANDNPS, andnps, Vps, Wps, DISOPTYPE_HARMLESS, 0); 5731 return FNIEMOP_CALL_1(iemOpCommonSse _FullFull_To_Full, iemAImpl_pandn_u128);5556 return FNIEMOP_CALL_1(iemOpCommonSseOpt_FullFull_To_Full, iemAImpl_pandn_u128); 5732 5557 } 5733 5558 … … 5737 5562 { 5738 5563 IEMOP_MNEMONIC2(RM, ANDNPD, andnpd, Vpd, Wpd, DISOPTYPE_HARMLESS, 0); 5739 return FNIEMOP_CALL_1(iemOpCommonSse2 _FullFull_To_Full, iemAImpl_pandn_u128);5564 return FNIEMOP_CALL_1(iemOpCommonSse2Opt_FullFull_To_Full, iemAImpl_pandn_u128); 5740 5565 } 5741 5566 … … 5749 5574 { 5750 5575 IEMOP_MNEMONIC2(RM, ORPS, orps, Vps, Wps, DISOPTYPE_HARMLESS, 0); 5751 return FNIEMOP_CALL_1(iemOpCommonSse _FullFull_To_Full, iemAImpl_por_u128);5576 return FNIEMOP_CALL_1(iemOpCommonSseOpt_FullFull_To_Full, iemAImpl_por_u128); 5752 5577 } 5753 5578 … … 5757 5582 { 5758 5583 IEMOP_MNEMONIC2(RM, ORPD, orpd, Vpd, Wpd, DISOPTYPE_HARMLESS, 0); 5759 return FNIEMOP_CALL_1(iemOpCommonSse2 _FullFull_To_Full, iemAImpl_por_u128);5584 return FNIEMOP_CALL_1(iemOpCommonSse2Opt_FullFull_To_Full, iemAImpl_por_u128); 5760 5585 } 5761 5586 … … 5769 5594 { 5770 5595 IEMOP_MNEMONIC2(RM, XORPS, xorps, Vps, Wps, DISOPTYPE_HARMLESS, 0); 5771 return FNIEMOP_CALL_1(iemOpCommonSse _FullFull_To_Full, iemAImpl_pxor_u128);5596 return FNIEMOP_CALL_1(iemOpCommonSseOpt_FullFull_To_Full, iemAImpl_pxor_u128); 5772 5597 } 5773 5598 … … 5777 5602 { 5778 5603 IEMOP_MNEMONIC2(RM, XORPD, xorpd, Vpd, Wpd, DISOPTYPE_HARMLESS, 0); 5779 return FNIEMOP_CALL_1(iemOpCommonSse2 _FullFull_To_Full, iemAImpl_pxor_u128);5604 return FNIEMOP_CALL_1(iemOpCommonSse2Opt_FullFull_To_Full, iemAImpl_pxor_u128); 5780 5605 } 5781 5606 … … 6117 5942 { 6118 5943 IEMOP_MNEMONIC2(RM, PCMPGTB, pcmpgtb, Pq, Qq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 6119 return FNIEMOP_CALL_1(iemOpCommonMmx _FullFull_To_Full, iemAImpl_pcmpgtb_u64);5944 return FNIEMOP_CALL_1(iemOpCommonMmxOpt_FullFull_To_Full, iemAImpl_pcmpgtb_u64); 6120 5945 } 6121 5946 … … 6125 5950 { 6126 5951 IEMOP_MNEMONIC2(RM, PCMPGTB, pcmpgtb, Vx, Wx, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 6127 return FNIEMOP_CALL_1(iemOpCommonSse2 _FullFull_To_Full, iemAImpl_pcmpgtb_u128);5952 return FNIEMOP_CALL_1(iemOpCommonSse2Opt_FullFull_To_Full, iemAImpl_pcmpgtb_u128); 6128 5953 } 6129 5954 … … 6136 5961 { 6137 5962 IEMOP_MNEMONIC2(RM, PCMPGTW, pcmpgtw, Pq, Qq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 6138 return FNIEMOP_CALL_1(iemOpCommonMmx _FullFull_To_Full, iemAImpl_pcmpgtw_u64);5963 return FNIEMOP_CALL_1(iemOpCommonMmxOpt_FullFull_To_Full, iemAImpl_pcmpgtw_u64); 6139 5964 } 6140 5965 … … 6144 5969 { 6145 5970 IEMOP_MNEMONIC2(RM, PCMPGTW, pcmpgtw, Vx, Wx, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 6146 return FNIEMOP_CALL_1(iemOpCommonSse2 _FullFull_To_Full, iemAImpl_pcmpgtw_u128);5971 return FNIEMOP_CALL_1(iemOpCommonSse2Opt_FullFull_To_Full, iemAImpl_pcmpgtw_u128); 6147 5972 } 6148 5973 … … 6155 5980 { 6156 5981 IEMOP_MNEMONIC2(RM, PCMPGTD, pcmpgtd, Pq, Qq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 6157 return FNIEMOP_CALL_1(iemOpCommonMmx _FullFull_To_Full, iemAImpl_pcmpgtd_u64);5982 return FNIEMOP_CALL_1(iemOpCommonMmxOpt_FullFull_To_Full, iemAImpl_pcmpgtd_u64); 6158 5983 } 6159 5984 … … 6163 5988 { 6164 5989 IEMOP_MNEMONIC2(RM, PCMPGTD, pcmpgtd, Vx, Wx, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 6165 return FNIEMOP_CALL_1(iemOpCommonSse2 _FullFull_To_Full, iemAImpl_pcmpgtd_u128);5990 return FNIEMOP_CALL_1(iemOpCommonSse2Opt_FullFull_To_Full, iemAImpl_pcmpgtd_u128); 6166 5991 } 6167 5992 … … 7135 6960 { 7136 6961 IEMOP_MNEMONIC2(RM, PCMPEQB, pcmpeqb, Pq, Qq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 7137 return FNIEMOP_CALL_1(iemOpCommonMmx _FullFull_To_Full, iemAImpl_pcmpeqb_u64);6962 return FNIEMOP_CALL_1(iemOpCommonMmxOpt_FullFull_To_Full, iemAImpl_pcmpeqb_u64); 7138 6963 } 7139 6964 … … 7143 6968 { 7144 6969 IEMOP_MNEMONIC2(RM, PCMPEQB, pcmpeqb, Vx, Wx, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 7145 return FNIEMOP_CALL_1(iemOpCommonSse2 _FullFull_To_Full, iemAImpl_pcmpeqb_u128);6970 return FNIEMOP_CALL_1(iemOpCommonSse2Opt_FullFull_To_Full, iemAImpl_pcmpeqb_u128); 7146 6971 } 7147 6972 … … 7155 6980 { 7156 6981 IEMOP_MNEMONIC2(RM, PCMPEQW, pcmpeqw, Pq, Qq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 7157 return FNIEMOP_CALL_1(iemOpCommonMmx _FullFull_To_Full, iemAImpl_pcmpeqw_u64);6982 return FNIEMOP_CALL_1(iemOpCommonMmxOpt_FullFull_To_Full, iemAImpl_pcmpeqw_u64); 7158 6983 } 7159 6984 … … 7163 6988 { 7164 6989 IEMOP_MNEMONIC2(RM, PCMPEQW, pcmpeqw, Vx, Wx, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 7165 return FNIEMOP_CALL_1(iemOpCommonSse2 _FullFull_To_Full, iemAImpl_pcmpeqw_u128);6990 return FNIEMOP_CALL_1(iemOpCommonSse2Opt_FullFull_To_Full, iemAImpl_pcmpeqw_u128); 7166 6991 } 7167 6992 … … 7175 7000 { 7176 7001 IEMOP_MNEMONIC2(RM, PCMPEQD, pcmpeqd, Pq, Qq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 7177 return FNIEMOP_CALL_1(iemOpCommonMmx _FullFull_To_Full, iemAImpl_pcmpeqd_u64);7002 return FNIEMOP_CALL_1(iemOpCommonMmxOpt_FullFull_To_Full, iemAImpl_pcmpeqd_u64); 7178 7003 } 7179 7004 … … 7183 7008 { 7184 7009 IEMOP_MNEMONIC2(RM, PCMPEQD, pcmpeqd, Vx, Wx, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 7185 return FNIEMOP_CALL_1(iemOpCommonSse2 _FullFull_To_Full, iemAImpl_pcmpeqd_u128);7010 return FNIEMOP_CALL_1(iemOpCommonSse2Opt_FullFull_To_Full, iemAImpl_pcmpeqd_u128); 7186 7011 } 7187 7012 … … 13219 13044 { 13220 13045 IEMOP_MNEMONIC2(RM, PADDQ, paddq, Pq, Qq, DISOPTYPE_HARMLESS | DISOPTYPE_X86_MMX, IEMOPHINT_IGNORES_OP_SIZES); 13221 return FNIEMOP_CALL_1(iemOpCommonMmx _FullFull_To_Full_Sse2, iemAImpl_paddq_u64);13046 return FNIEMOP_CALL_1(iemOpCommonMmxOpt_FullFull_To_Full_Sse2, iemAImpl_paddq_u64); 13222 13047 } 13223 13048 … … 13227 13052 { 13228 13053 IEMOP_MNEMONIC2(RM, PADDQ, paddq, Vx, Wx, DISOPTYPE_HARMLESS | DISOPTYPE_X86_SSE, IEMOPHINT_IGNORES_OP_SIZES); 13229 return FNIEMOP_CALL_1(iemOpCommonSse2 _FullFull_To_Full, iemAImpl_paddq_u128);13054 return FNIEMOP_CALL_1(iemOpCommonSse2Opt_FullFull_To_Full, iemAImpl_paddq_u128); 13230 13055 } 13231 13056 … … 13238 13063 { 13239 13064 IEMOP_MNEMONIC2(RM, PMULLW, pmullw, Pq, Qq, DISOPTYPE_HARMLESS | DISOPTYPE_X86_MMX, IEMOPHINT_IGNORES_OP_SIZES); 13240 return FNIEMOP_CALL_1(iemOpCommonMmx _FullFull_To_Full, iemAImpl_pmullw_u64);13065 return FNIEMOP_CALL_1(iemOpCommonMmxOpt_FullFull_To_Full, iemAImpl_pmullw_u64); 13241 13066 } 13242 13067 … … 13245 13070 { 13246 13071 IEMOP_MNEMONIC2(RM, PMULLW, pmullw, Vx, Wx, DISOPTYPE_HARMLESS | DISOPTYPE_X86_SSE, IEMOPHINT_IGNORES_OP_SIZES); 13247 return FNIEMOP_CALL_1(iemOpCommonSse2 _FullFull_To_Full, iemAImpl_pmullw_u128);13072 return FNIEMOP_CALL_1(iemOpCommonSse2Opt_FullFull_To_Full, iemAImpl_pmullw_u128); 13248 13073 } 13249 13074 … … 13471 13296 { 13472 13297 IEMOP_MNEMONIC2(RM, PSUBUSB, psubusb, Pq, Qq, DISOPTYPE_HARMLESS | DISOPTYPE_X86_MMX, IEMOPHINT_IGNORES_OP_SIZES); 13473 return FNIEMOP_CALL_1(iemOpCommonMmx _FullFull_To_Full, iemAImpl_psubusb_u64);13298 return FNIEMOP_CALL_1(iemOpCommonMmxOpt_FullFull_To_Full, iemAImpl_psubusb_u64); 13474 13299 } 13475 13300 … … 13479 13304 { 13480 13305 IEMOP_MNEMONIC2(RM, PSUBUSB, psubusb, Vx, Wx, DISOPTYPE_HARMLESS | DISOPTYPE_X86_SSE, IEMOPHINT_IGNORES_OP_SIZES); 13481 return FNIEMOP_CALL_1(iemOpCommonSse2 _FullFull_To_Full, iemAImpl_psubusb_u128);13306 return FNIEMOP_CALL_1(iemOpCommonSse2Opt_FullFull_To_Full, iemAImpl_psubusb_u128); 13482 13307 } 13483 13308 … … 13490 13315 { 13491 13316 IEMOP_MNEMONIC2(RM, PSUBUSW, psubusw, Pq, Qq, DISOPTYPE_HARMLESS | DISOPTYPE_X86_MMX, IEMOPHINT_IGNORES_OP_SIZES); 13492 return FNIEMOP_CALL_1(iemOpCommonMmx _FullFull_To_Full, iemAImpl_psubusw_u64);13317 return FNIEMOP_CALL_1(iemOpCommonMmxOpt_FullFull_To_Full, iemAImpl_psubusw_u64); 13493 13318 } 13494 13319 … … 13498 13323 { 13499 13324 IEMOP_MNEMONIC2(RM, PSUBUSW, psubusw, Vx, Wx, DISOPTYPE_HARMLESS | DISOPTYPE_X86_SSE, IEMOPHINT_IGNORES_OP_SIZES); 13500 return FNIEMOP_CALL_1(iemOpCommonSse2 _FullFull_To_Full, iemAImpl_psubusw_u128);13325 return FNIEMOP_CALL_1(iemOpCommonSse2Opt_FullFull_To_Full, iemAImpl_psubusw_u128); 13501 13326 } 13502 13327 … … 13509 13334 { 13510 13335 IEMOP_MNEMONIC2(RM, PMINUB, pminub, Pq, Qq, DISOPTYPE_HARMLESS | DISOPTYPE_X86_MMX, IEMOPHINT_IGNORES_OP_SIZES); 13511 return FNIEMOP_CALL_1(iemOpCommonMmxSse _FullFull_To_Full, iemAImpl_pminub_u64);13336 return FNIEMOP_CALL_1(iemOpCommonMmxSseOpt_FullFull_To_Full, iemAImpl_pminub_u64); 13512 13337 } 13513 13338 … … 13517 13342 { 13518 13343 IEMOP_MNEMONIC2(RM, PMINUB, pminub, Vx, Wx, DISOPTYPE_HARMLESS | DISOPTYPE_X86_SSE, IEMOPHINT_IGNORES_OP_SIZES); 13519 return FNIEMOP_CALL_1(iemOpCommonSse2 _FullFull_To_Full, iemAImpl_pminub_u128);13344 return FNIEMOP_CALL_1(iemOpCommonSse2Opt_FullFull_To_Full, iemAImpl_pminub_u128); 13520 13345 } 13521 13346 … … 13527 13352 { 13528 13353 IEMOP_MNEMONIC2(RM, PAND, pand, Pq, Qq, DISOPTYPE_HARMLESS | DISOPTYPE_X86_MMX, IEMOPHINT_IGNORES_OP_SIZES); 13529 return FNIEMOP_CALL_1(iemOpCommonMmx _FullFull_To_Full, iemAImpl_pand_u64);13354 return FNIEMOP_CALL_1(iemOpCommonMmxOpt_FullFull_To_Full, iemAImpl_pand_u64); 13530 13355 } 13531 13356 … … 13535 13360 { 13536 13361 IEMOP_MNEMONIC2(RM, PAND, pand, Vx, Wx, DISOPTYPE_HARMLESS | DISOPTYPE_X86_SSE, IEMOPHINT_IGNORES_OP_SIZES); 13537 return FNIEMOP_CALL_1(iemOpCommonSse2 _FullFull_To_Full, iemAImpl_pand_u128);13362 return FNIEMOP_CALL_1(iemOpCommonSse2Opt_FullFull_To_Full, iemAImpl_pand_u128); 13538 13363 } 13539 13364 … … 13546 13371 { 13547 13372 IEMOP_MNEMONIC2(RM, PADDUSB, paddusb, Pq, Qq, DISOPTYPE_HARMLESS | DISOPTYPE_X86_MMX, IEMOPHINT_IGNORES_OP_SIZES); 13548 return FNIEMOP_CALL_1(iemOpCommonMmx _FullFull_To_Full, iemAImpl_paddusb_u64);13373 return FNIEMOP_CALL_1(iemOpCommonMmxOpt_FullFull_To_Full, iemAImpl_paddusb_u64); 13549 13374 } 13550 13375 … … 13554 13379 { 13555 13380 IEMOP_MNEMONIC2(RM, PADDUSB, paddusb, Vx, Wx, DISOPTYPE_HARMLESS | DISOPTYPE_X86_SSE, IEMOPHINT_IGNORES_OP_SIZES); 13556 return FNIEMOP_CALL_1(iemOpCommonSse2 _FullFull_To_Full, iemAImpl_paddusb_u128);13381 return FNIEMOP_CALL_1(iemOpCommonSse2Opt_FullFull_To_Full, iemAImpl_paddusb_u128); 13557 13382 } 13558 13383 … … 13565 13390 { 13566 13391 IEMOP_MNEMONIC2(RM, PADDUSW, paddusw, Pq, Qq, DISOPTYPE_HARMLESS | DISOPTYPE_X86_MMX, IEMOPHINT_IGNORES_OP_SIZES); 13567 return FNIEMOP_CALL_1(iemOpCommonMmx _FullFull_To_Full, iemAImpl_paddusw_u64);13392 return FNIEMOP_CALL_1(iemOpCommonMmxOpt_FullFull_To_Full, iemAImpl_paddusw_u64); 13568 13393 } 13569 13394 … … 13573 13398 { 13574 13399 IEMOP_MNEMONIC2(RM, PADDUSW, paddusw, Vx, Wx, DISOPTYPE_HARMLESS | DISOPTYPE_X86_SSE, IEMOPHINT_IGNORES_OP_SIZES); 13575 return FNIEMOP_CALL_1(iemOpCommonSse2 _FullFull_To_Full, iemAImpl_paddusw_u128);13400 return FNIEMOP_CALL_1(iemOpCommonSse2Opt_FullFull_To_Full, iemAImpl_paddusw_u128); 13576 13401 } 13577 13402 … … 13584 13409 { 13585 13410 IEMOP_MNEMONIC2(RM, PMAXUB, pmaxub, Pq, Qq, DISOPTYPE_HARMLESS | DISOPTYPE_X86_MMX, IEMOPHINT_IGNORES_OP_SIZES); 13586 return FNIEMOP_CALL_1(iemOpCommonMmxSse _FullFull_To_Full, iemAImpl_pmaxub_u64);13411 return FNIEMOP_CALL_1(iemOpCommonMmxSseOpt_FullFull_To_Full, iemAImpl_pmaxub_u64); 13587 13412 } 13588 13413 … … 13592 13417 { 13593 13418 IEMOP_MNEMONIC2(RM, PMAXUB, pmaxub, Vx, Wx, DISOPTYPE_HARMLESS | DISOPTYPE_X86_SSE, IEMOPHINT_IGNORES_OP_SIZES); 13594 return FNIEMOP_CALL_1(iemOpCommonSse2 _FullFull_To_Full, iemAImpl_pmaxub_u128);13419 return FNIEMOP_CALL_1(iemOpCommonSse2Opt_FullFull_To_Full, iemAImpl_pmaxub_u128); 13595 13420 } 13596 13421 … … 13603 13428 { 13604 13429 IEMOP_MNEMONIC2(RM, PANDN, pandn, Pq, Qq, DISOPTYPE_HARMLESS | DISOPTYPE_X86_MMX, IEMOPHINT_IGNORES_OP_SIZES); 13605 return FNIEMOP_CALL_1(iemOpCommonMmx _FullFull_To_Full, iemAImpl_pandn_u64);13430 return FNIEMOP_CALL_1(iemOpCommonMmxOpt_FullFull_To_Full, iemAImpl_pandn_u64); 13606 13431 } 13607 13432 … … 13611 13436 { 13612 13437 IEMOP_MNEMONIC2(RM, PANDN, pandn, Vx, Wx, DISOPTYPE_HARMLESS | DISOPTYPE_X86_SSE, IEMOPHINT_IGNORES_OP_SIZES); 13613 return FNIEMOP_CALL_1(iemOpCommonSse2 _FullFull_To_Full, iemAImpl_pandn_u128);13438 return FNIEMOP_CALL_1(iemOpCommonSse2Opt_FullFull_To_Full, iemAImpl_pandn_u128); 13614 13439 } 13615 13440 … … 13717 13542 { 13718 13543 IEMOP_MNEMONIC2(RM, PMULHW, pmulhw, Pq, Qq, DISOPTYPE_HARMLESS | DISOPTYPE_X86_MMX, IEMOPHINT_IGNORES_OP_SIZES); 13719 return FNIEMOP_CALL_1(iemOpCommonMmx _FullFull_To_Full, iemAImpl_pmulhw_u64);13544 return FNIEMOP_CALL_1(iemOpCommonMmxOpt_FullFull_To_Full, iemAImpl_pmulhw_u64); 13720 13545 } 13721 13546 … … 13725 13550 { 13726 13551 IEMOP_MNEMONIC2(RM, PMULHW, pmulhw, Vx, Wx, DISOPTYPE_HARMLESS | DISOPTYPE_X86_SSE, IEMOPHINT_IGNORES_OP_SIZES); 13727 return FNIEMOP_CALL_1(iemOpCommonSse2 _FullFull_To_Full, iemAImpl_pmulhw_u128);13552 return FNIEMOP_CALL_1(iemOpCommonSse2Opt_FullFull_To_Full, iemAImpl_pmulhw_u128); 13728 13553 } 13729 13554 … … 13860 13685 { 13861 13686 IEMOP_MNEMONIC2(RM, PSUBSB, psubsb, Pq, Qq, DISOPTYPE_HARMLESS | DISOPTYPE_X86_MMX, IEMOPHINT_IGNORES_OP_SIZES); 13862 return FNIEMOP_CALL_1(iemOpCommonMmx _FullFull_To_Full, iemAImpl_psubsb_u64);13687 return FNIEMOP_CALL_1(iemOpCommonMmxOpt_FullFull_To_Full, iemAImpl_psubsb_u64); 13863 13688 } 13864 13689 … … 13868 13693 { 13869 13694 IEMOP_MNEMONIC2(RM, PSUBSB, psubsb, Vx, Wx, DISOPTYPE_HARMLESS | DISOPTYPE_X86_SSE, IEMOPHINT_IGNORES_OP_SIZES); 13870 return FNIEMOP_CALL_1(iemOpCommonSse2 _FullFull_To_Full, iemAImpl_psubsb_u128);13695 return FNIEMOP_CALL_1(iemOpCommonSse2Opt_FullFull_To_Full, iemAImpl_psubsb_u128); 13871 13696 } 13872 13697 … … 13879 13704 { 13880 13705 IEMOP_MNEMONIC2(RM, PSUBSW, psubsw, Pq, Qq, DISOPTYPE_HARMLESS | DISOPTYPE_X86_MMX, IEMOPHINT_IGNORES_OP_SIZES); 13881 return FNIEMOP_CALL_1(iemOpCommonMmx _FullFull_To_Full, iemAImpl_psubsw_u64);13706 return FNIEMOP_CALL_1(iemOpCommonMmxOpt_FullFull_To_Full, iemAImpl_psubsw_u64); 13882 13707 } 13883 13708 … … 13887 13712 { 13888 13713 IEMOP_MNEMONIC2(RM, PSUBSW, psubsw, Vx, Wx, DISOPTYPE_HARMLESS | DISOPTYPE_X86_SSE, IEMOPHINT_IGNORES_OP_SIZES); 13889 return FNIEMOP_CALL_1(iemOpCommonSse2 _FullFull_To_Full, iemAImpl_psubsw_u128);13714 return FNIEMOP_CALL_1(iemOpCommonSse2Opt_FullFull_To_Full, iemAImpl_psubsw_u128); 13890 13715 } 13891 13716 … … 13899 13724 { 13900 13725 IEMOP_MNEMONIC2(RM, PMINSW, pminsw, Pq, Qq, DISOPTYPE_HARMLESS | DISOPTYPE_X86_MMX, IEMOPHINT_IGNORES_OP_SIZES); 13901 return FNIEMOP_CALL_1(iemOpCommonMmxSse _FullFull_To_Full, iemAImpl_pminsw_u64);13726 return FNIEMOP_CALL_1(iemOpCommonMmxSseOpt_FullFull_To_Full, iemAImpl_pminsw_u64); 13902 13727 } 13903 13728 … … 13907 13732 { 13908 13733 IEMOP_MNEMONIC2(RM, PMINSW, pminsw, Vx, Wx, DISOPTYPE_HARMLESS | DISOPTYPE_X86_SSE, IEMOPHINT_IGNORES_OP_SIZES); 13909 return FNIEMOP_CALL_1(iemOpCommonSse2 _FullFull_To_Full, iemAImpl_pminsw_u128);13734 return FNIEMOP_CALL_1(iemOpCommonSse2Opt_FullFull_To_Full, iemAImpl_pminsw_u128); 13910 13735 } 13911 13736 … … 13919 13744 { 13920 13745 IEMOP_MNEMONIC2(RM, POR, por, Pq, Qq, DISOPTYPE_HARMLESS | DISOPTYPE_X86_MMX, IEMOPHINT_IGNORES_OP_SIZES); 13921 return FNIEMOP_CALL_1(iemOpCommonMmx _FullFull_To_Full, iemAImpl_por_u64);13746 return FNIEMOP_CALL_1(iemOpCommonMmxOpt_FullFull_To_Full, iemAImpl_por_u64); 13922 13747 } 13923 13748 … … 13927 13752 { 13928 13753 IEMOP_MNEMONIC2(RM, POR, por, Vx, Wx, DISOPTYPE_HARMLESS | DISOPTYPE_X86_SSE, IEMOPHINT_IGNORES_OP_SIZES); 13929 return FNIEMOP_CALL_1(iemOpCommonSse2 _FullFull_To_Full, iemAImpl_por_u128);13754 return FNIEMOP_CALL_1(iemOpCommonSse2Opt_FullFull_To_Full, iemAImpl_por_u128); 13930 13755 } 13931 13756 … … 13938 13763 { 13939 13764 IEMOP_MNEMONIC2(RM, PADDSB, paddsb, Pq, Qq, DISOPTYPE_HARMLESS | DISOPTYPE_X86_MMX, IEMOPHINT_IGNORES_OP_SIZES); 13940 return FNIEMOP_CALL_1(iemOpCommonMmx _FullFull_To_Full, iemAImpl_paddsb_u64);13765 return FNIEMOP_CALL_1(iemOpCommonMmxOpt_FullFull_To_Full, iemAImpl_paddsb_u64); 13941 13766 } 13942 13767 … … 13946 13771 { 13947 13772 IEMOP_MNEMONIC2(RM, PADDSB, paddsb, Vx, Wx, DISOPTYPE_HARMLESS | DISOPTYPE_X86_SSE, IEMOPHINT_IGNORES_OP_SIZES); 13948 return FNIEMOP_CALL_1(iemOpCommonSse2 _FullFull_To_Full, iemAImpl_paddsb_u128);13773 return FNIEMOP_CALL_1(iemOpCommonSse2Opt_FullFull_To_Full, iemAImpl_paddsb_u128); 13949 13774 } 13950 13775 … … 13957 13782 { 13958 13783 IEMOP_MNEMONIC2(RM, PADDSW, paddsw, Pq, Qq, DISOPTYPE_HARMLESS | DISOPTYPE_X86_MMX, IEMOPHINT_IGNORES_OP_SIZES); 13959 return FNIEMOP_CALL_1(iemOpCommonMmx _FullFull_To_Full, iemAImpl_paddsw_u64);13784 return FNIEMOP_CALL_1(iemOpCommonMmxOpt_FullFull_To_Full, iemAImpl_paddsw_u64); 13960 13785 } 13961 13786 … … 13965 13790 { 13966 13791 IEMOP_MNEMONIC2(RM, PADDSW, paddsw, Vx, Wx, DISOPTYPE_HARMLESS | DISOPTYPE_X86_SSE, IEMOPHINT_IGNORES_OP_SIZES); 13967 return FNIEMOP_CALL_1(iemOpCommonSse2 _FullFull_To_Full, iemAImpl_paddsw_u128);13792 return FNIEMOP_CALL_1(iemOpCommonSse2Opt_FullFull_To_Full, iemAImpl_paddsw_u128); 13968 13793 } 13969 13794 … … 13977 13802 { 13978 13803 IEMOP_MNEMONIC2(RM, PMAXSW, pmaxsw, Pq, Qq, DISOPTYPE_HARMLESS | DISOPTYPE_X86_MMX, IEMOPHINT_IGNORES_OP_SIZES); 13979 return FNIEMOP_CALL_1(iemOpCommonMmxSse _FullFull_To_Full, iemAImpl_pmaxsw_u64);13804 return FNIEMOP_CALL_1(iemOpCommonMmxSseOpt_FullFull_To_Full, iemAImpl_pmaxsw_u64); 13980 13805 } 13981 13806 … … 13985 13810 { 13986 13811 IEMOP_MNEMONIC2(RM, PMAXSW, pmaxsw, Vx, Wx, DISOPTYPE_HARMLESS | DISOPTYPE_X86_SSE, IEMOPHINT_IGNORES_OP_SIZES); 13987 return FNIEMOP_CALL_1(iemOpCommonSse2 _FullFull_To_Full, iemAImpl_pmaxsw_u128);13812 return FNIEMOP_CALL_1(iemOpCommonSse2Opt_FullFull_To_Full, iemAImpl_pmaxsw_u128); 13988 13813 } 13989 13814 … … 13997 13822 { 13998 13823 IEMOP_MNEMONIC2(RM, PXOR, pxor, Pq, Qq, DISOPTYPE_HARMLESS | DISOPTYPE_X86_MMX, IEMOPHINT_IGNORES_OP_SIZES); 13999 return FNIEMOP_CALL_1(iemOpCommonMmx _FullFull_To_Full, iemAImpl_pxor_u64);13824 return FNIEMOP_CALL_1(iemOpCommonMmxOpt_FullFull_To_Full, iemAImpl_pxor_u64); 14000 13825 } 14001 13826 … … 14005 13830 { 14006 13831 IEMOP_MNEMONIC2(RM, PXOR, pxor, Vx, Wx, DISOPTYPE_HARMLESS | DISOPTYPE_X86_SSE, IEMOPHINT_IGNORES_OP_SIZES); 14007 return FNIEMOP_CALL_1(iemOpCommonSse2 _FullFull_To_Full, iemAImpl_pxor_u128);13832 return FNIEMOP_CALL_1(iemOpCommonSse2Opt_FullFull_To_Full, iemAImpl_pxor_u128); 14008 13833 } 14009 13834 … … 14107 13932 { 14108 13933 IEMOP_MNEMONIC2(RM, PMULUDQ, pmuludq, Pq, Qq, DISOPTYPE_HARMLESS | DISOPTYPE_X86_SSE, 0); 14109 return FNIEMOP_CALL_1(iemOpCommonMmx _FullFull_To_Full, iemAImpl_pmuludq_u64);13934 return FNIEMOP_CALL_1(iemOpCommonMmxOpt_FullFull_To_Full, iemAImpl_pmuludq_u64); 14110 13935 } 14111 13936 … … 14115 13940 { 14116 13941 IEMOP_MNEMONIC2(RM, PMULUDQ, pmuludq, Vx, Wx, DISOPTYPE_HARMLESS | DISOPTYPE_X86_SSE, 0); 14117 return FNIEMOP_CALL_1(iemOpCommonSse2 _FullFull_To_Full, iemAImpl_pmuludq_u128);13942 return FNIEMOP_CALL_1(iemOpCommonSse2Opt_FullFull_To_Full, iemAImpl_pmuludq_u128); 14118 13943 } 14119 13944 … … 14125 13950 { 14126 13951 IEMOP_MNEMONIC2(RM, PMADDWD, pmaddwd, Pq, Qq, DISOPTYPE_HARMLESS | DISOPTYPE_X86_MMX, 0); 14127 return FNIEMOP_CALL_1(iemOpCommonMmx _FullFull_To_Full, iemAImpl_pmaddwd_u64);13952 return FNIEMOP_CALL_1(iemOpCommonMmxOpt_FullFull_To_Full, iemAImpl_pmaddwd_u64); 14128 13953 } 14129 13954 … … 14133 13958 { 14134 13959 IEMOP_MNEMONIC2(RM, PMADDWD, pmaddwd, Vx, Wx, DISOPTYPE_HARMLESS | DISOPTYPE_X86_SSE, 0); 14135 return FNIEMOP_CALL_1(iemOpCommonSse2 _FullFull_To_Full, iemAImpl_pmaddwd_u128);13960 return FNIEMOP_CALL_1(iemOpCommonSse2Opt_FullFull_To_Full, iemAImpl_pmaddwd_u128); 14136 13961 } 14137 13962 … … 14167 13992 { 14168 13993 IEMOP_MNEMONIC2(RM, PSUBB, psubb, Pq, Qq, DISOPTYPE_HARMLESS | DISOPTYPE_X86_MMX, IEMOPHINT_IGNORES_OP_SIZES); 14169 return FNIEMOP_CALL_1(iemOpCommonMmx _FullFull_To_Full, iemAImpl_psubb_u64);13994 return FNIEMOP_CALL_1(iemOpCommonMmxOpt_FullFull_To_Full, iemAImpl_psubb_u64); 14170 13995 } 14171 13996 … … 14175 14000 { 14176 14001 IEMOP_MNEMONIC2(RM, PSUBB, psubb, Vx, Wx, DISOPTYPE_HARMLESS | DISOPTYPE_X86_SSE, IEMOPHINT_IGNORES_OP_SIZES); 14177 return FNIEMOP_CALL_1(iemOpCommonSse2 _FullFull_To_Full, iemAImpl_psubb_u128);14002 return FNIEMOP_CALL_1(iemOpCommonSse2Opt_FullFull_To_Full, iemAImpl_psubb_u128); 14178 14003 } 14179 14004 … … 14186 14011 { 14187 14012 IEMOP_MNEMONIC2(RM, PSUBW, psubw, Pq, Qq, DISOPTYPE_HARMLESS | DISOPTYPE_X86_MMX, IEMOPHINT_IGNORES_OP_SIZES); 14188 return FNIEMOP_CALL_1(iemOpCommonMmx _FullFull_To_Full, iemAImpl_psubw_u64);14013 return FNIEMOP_CALL_1(iemOpCommonMmxOpt_FullFull_To_Full, iemAImpl_psubw_u64); 14189 14014 } 14190 14015 … … 14194 14019 { 14195 14020 IEMOP_MNEMONIC2(RM, PSUBW, psubw, Vx, Wx, DISOPTYPE_HARMLESS | DISOPTYPE_X86_SSE, IEMOPHINT_IGNORES_OP_SIZES); 14196 return FNIEMOP_CALL_1(iemOpCommonSse2 _FullFull_To_Full, iemAImpl_psubw_u128);14021 return FNIEMOP_CALL_1(iemOpCommonSse2Opt_FullFull_To_Full, iemAImpl_psubw_u128); 14197 14022 } 14198 14023 … … 14205 14030 { 14206 14031 IEMOP_MNEMONIC2(RM, PSUBD, psubd, Pq, Qq, DISOPTYPE_HARMLESS | DISOPTYPE_X86_MMX, IEMOPHINT_IGNORES_OP_SIZES); 14207 return FNIEMOP_CALL_1(iemOpCommonMmx _FullFull_To_Full, iemAImpl_psubd_u64);14032 return FNIEMOP_CALL_1(iemOpCommonMmxOpt_FullFull_To_Full, iemAImpl_psubd_u64); 14208 14033 } 14209 14034 … … 14213 14038 { 14214 14039 IEMOP_MNEMONIC2(RM, PSUBD, psubd, Vx, Wx, DISOPTYPE_HARMLESS | DISOPTYPE_X86_SSE, IEMOPHINT_IGNORES_OP_SIZES); 14215 return FNIEMOP_CALL_1(iemOpCommonSse2 _FullFull_To_Full, iemAImpl_psubd_u128);14040 return FNIEMOP_CALL_1(iemOpCommonSse2Opt_FullFull_To_Full, iemAImpl_psubd_u128); 14216 14041 } 14217 14042 … … 14224 14049 { 14225 14050 IEMOP_MNEMONIC2(RM, PSUBQ, psubq, Pq, Qq, DISOPTYPE_HARMLESS | DISOPTYPE_X86_MMX, IEMOPHINT_IGNORES_OP_SIZES); 14226 return FNIEMOP_CALL_1(iemOpCommonMmx _FullFull_To_Full_Sse2, iemAImpl_psubq_u64);14051 return FNIEMOP_CALL_1(iemOpCommonMmxOpt_FullFull_To_Full_Sse2, iemAImpl_psubq_u64); 14227 14052 } 14228 14053 … … 14232 14057 { 14233 14058 IEMOP_MNEMONIC2(RM, PSUBQ, psubq, Vx, Wx, DISOPTYPE_HARMLESS | DISOPTYPE_X86_SSE, IEMOPHINT_IGNORES_OP_SIZES); 14234 return FNIEMOP_CALL_1(iemOpCommonSse2 _FullFull_To_Full, iemAImpl_psubq_u128);14059 return FNIEMOP_CALL_1(iemOpCommonSse2Opt_FullFull_To_Full, iemAImpl_psubq_u128); 14235 14060 } 14236 14061 … … 14243 14068 { 14244 14069 IEMOP_MNEMONIC2(RM, PADDB, paddb, Pq, Qq, DISOPTYPE_HARMLESS | DISOPTYPE_X86_MMX, IEMOPHINT_IGNORES_OP_SIZES); 14245 return FNIEMOP_CALL_1(iemOpCommonMmx _FullFull_To_Full, iemAImpl_paddb_u64);14070 return FNIEMOP_CALL_1(iemOpCommonMmxOpt_FullFull_To_Full, iemAImpl_paddb_u64); 14246 14071 } 14247 14072 … … 14251 14076 { 14252 14077 IEMOP_MNEMONIC2(RM, PADDB, paddb, Vx, Wx, DISOPTYPE_HARMLESS | DISOPTYPE_X86_SSE, IEMOPHINT_IGNORES_OP_SIZES); 14253 return FNIEMOP_CALL_1(iemOpCommonSse2 _FullFull_To_Full, iemAImpl_paddb_u128);14078 return FNIEMOP_CALL_1(iemOpCommonSse2Opt_FullFull_To_Full, iemAImpl_paddb_u128); 14254 14079 } 14255 14080 … … 14262 14087 { 14263 14088 IEMOP_MNEMONIC2(RM, PADDW, paddw, Pq, Qq, DISOPTYPE_HARMLESS | DISOPTYPE_X86_MMX, IEMOPHINT_IGNORES_OP_SIZES); 14264 return FNIEMOP_CALL_1(iemOpCommonMmx _FullFull_To_Full, iemAImpl_paddw_u64);14089 return FNIEMOP_CALL_1(iemOpCommonMmxOpt_FullFull_To_Full, iemAImpl_paddw_u64); 14265 14090 } 14266 14091 … … 14270 14095 { 14271 14096 IEMOP_MNEMONIC2(RM, PADDW, paddw, Vx, Wx, DISOPTYPE_HARMLESS | DISOPTYPE_X86_SSE, IEMOPHINT_IGNORES_OP_SIZES); 14272 return FNIEMOP_CALL_1(iemOpCommonSse2 _FullFull_To_Full, iemAImpl_paddw_u128);14097 return FNIEMOP_CALL_1(iemOpCommonSse2Opt_FullFull_To_Full, iemAImpl_paddw_u128); 14273 14098 } 14274 14099 … … 14281 14106 { 14282 14107 IEMOP_MNEMONIC2(RM, PADDD, paddd, Pq, Qq, DISOPTYPE_HARMLESS | DISOPTYPE_X86_MMX, IEMOPHINT_IGNORES_OP_SIZES); 14283 return FNIEMOP_CALL_1(iemOpCommonMmx _FullFull_To_Full, iemAImpl_paddd_u64);14108 return FNIEMOP_CALL_1(iemOpCommonMmxOpt_FullFull_To_Full, iemAImpl_paddd_u64); 14284 14109 } 14285 14110 … … 14289 14114 { 14290 14115 IEMOP_MNEMONIC2(RM, PADDD, paddd, Vx, Wx, DISOPTYPE_HARMLESS | DISOPTYPE_X86_SSE, IEMOPHINT_IGNORES_OP_SIZES); 14291 return FNIEMOP_CALL_1(iemOpCommonSse2 _FullFull_To_Full, iemAImpl_paddd_u128);14116 return FNIEMOP_CALL_1(iemOpCommonSse2Opt_FullFull_To_Full, iemAImpl_paddd_u128); 14292 14117 } 14293 14118 -
trunk/src/VBox/VMM/include/IEMInternal.h
r104100 r104103 3220 3220 typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAOPTF2U256,(PRTUINT256U puDst, PCRTUINT256U puSrc)); 3221 3221 typedef FNIEMAIMPLMEDIAOPTF2U256 *PFNIEMAIMPLMEDIAOPTF2U256; 3222 FNIEMAIMPLMEDIA F2U64iemAImpl_pshufb_u64, iemAImpl_pshufb_u64_fallback;3223 FNIEMAIMPLMEDIA F2U64iemAImpl_pand_u64, iemAImpl_pandn_u64, iemAImpl_por_u64, iemAImpl_pxor_u64;3224 FNIEMAIMPLMEDIA F2U64iemAImpl_pcmpeqb_u64, iemAImpl_pcmpeqw_u64, iemAImpl_pcmpeqd_u64;3225 FNIEMAIMPLMEDIA F2U64iemAImpl_pcmpgtb_u64, iemAImpl_pcmpgtw_u64, iemAImpl_pcmpgtd_u64;3226 FNIEMAIMPLMEDIA F2U64iemAImpl_paddb_u64, iemAImpl_paddsb_u64, iemAImpl_paddusb_u64;3227 FNIEMAIMPLMEDIA F2U64iemAImpl_paddw_u64, iemAImpl_paddsw_u64, iemAImpl_paddusw_u64;3228 FNIEMAIMPLMEDIA F2U64iemAImpl_paddd_u64;3229 FNIEMAIMPLMEDIA F2U64iemAImpl_paddq_u64;3230 FNIEMAIMPLMEDIA F2U64iemAImpl_psubb_u64, iemAImpl_psubsb_u64, iemAImpl_psubusb_u64;3231 FNIEMAIMPLMEDIA F2U64iemAImpl_psubw_u64, iemAImpl_psubsw_u64, iemAImpl_psubusw_u64;3232 FNIEMAIMPLMEDIA F2U64iemAImpl_psubd_u64;3233 FNIEMAIMPLMEDIA F2U64iemAImpl_psubq_u64;3234 FNIEMAIMPLMEDIA F2U64iemAImpl_pmaddwd_u64, iemAImpl_pmaddwd_u64_fallback;3235 FNIEMAIMPLMEDIA F2U64iemAImpl_pmullw_u64, iemAImpl_pmulhw_u64;3236 FNIEMAIMPLMEDIA F2U64iemAImpl_pminub_u64, iemAImpl_pmaxub_u64;3237 FNIEMAIMPLMEDIA F2U64iemAImpl_pminsw_u64, iemAImpl_pmaxsw_u64;3238 FNIEMAIMPLMEDIA F2U64iemAImpl_pabsb_u64, iemAImpl_pabsb_u64_fallback;3239 FNIEMAIMPLMEDIA F2U64iemAImpl_pabsw_u64, iemAImpl_pabsw_u64_fallback;3240 FNIEMAIMPLMEDIA F2U64iemAImpl_pabsd_u64, iemAImpl_pabsd_u64_fallback;3241 FNIEMAIMPLMEDIA F2U64iemAImpl_psignb_u64, iemAImpl_psignb_u64_fallback;3242 FNIEMAIMPLMEDIA F2U64iemAImpl_psignw_u64, iemAImpl_psignw_u64_fallback;3243 FNIEMAIMPLMEDIA F2U64iemAImpl_psignd_u64, iemAImpl_psignd_u64_fallback;3244 FNIEMAIMPLMEDIA F2U64iemAImpl_phaddw_u64, iemAImpl_phaddw_u64_fallback;3245 FNIEMAIMPLMEDIA F2U64iemAImpl_phaddd_u64, iemAImpl_phaddd_u64_fallback;3246 FNIEMAIMPLMEDIA F2U64iemAImpl_phsubw_u64, iemAImpl_phsubw_u64_fallback;3247 FNIEMAIMPLMEDIA F2U64iemAImpl_phsubd_u64, iemAImpl_phsubd_u64_fallback;3248 FNIEMAIMPLMEDIA F2U64iemAImpl_phaddsw_u64, iemAImpl_phaddsw_u64_fallback;3249 FNIEMAIMPLMEDIA F2U64iemAImpl_phsubsw_u64, iemAImpl_phsubsw_u64_fallback;3250 FNIEMAIMPLMEDIA F2U64iemAImpl_pmaddubsw_u64, iemAImpl_pmaddubsw_u64_fallback;3251 FNIEMAIMPLMEDIA F2U64iemAImpl_pmulhrsw_u64, iemAImpl_pmulhrsw_u64_fallback;3252 FNIEMAIMPLMEDIA F2U64iemAImpl_pmuludq_u64;3222 FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_pshufb_u64, iemAImpl_pshufb_u64_fallback; 3223 FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_pand_u64, iemAImpl_pandn_u64, iemAImpl_por_u64, iemAImpl_pxor_u64; 3224 FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_pcmpeqb_u64, iemAImpl_pcmpeqw_u64, iemAImpl_pcmpeqd_u64; 3225 FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_pcmpgtb_u64, iemAImpl_pcmpgtw_u64, iemAImpl_pcmpgtd_u64; 3226 FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_paddb_u64, iemAImpl_paddsb_u64, iemAImpl_paddusb_u64; 3227 FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_paddw_u64, iemAImpl_paddsw_u64, iemAImpl_paddusw_u64; 3228 FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_paddd_u64; 3229 FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_paddq_u64; 3230 FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_psubb_u64, iemAImpl_psubsb_u64, iemAImpl_psubusb_u64; 3231 FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_psubw_u64, iemAImpl_psubsw_u64, iemAImpl_psubusw_u64; 3232 FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_psubd_u64; 3233 FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_psubq_u64; 3234 FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_pmaddwd_u64, iemAImpl_pmaddwd_u64_fallback; 3235 FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_pmullw_u64, iemAImpl_pmulhw_u64; 3236 FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_pminub_u64, iemAImpl_pmaxub_u64; 3237 FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_pminsw_u64, iemAImpl_pmaxsw_u64; 3238 FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_pabsb_u64, iemAImpl_pabsb_u64_fallback; 3239 FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_pabsw_u64, iemAImpl_pabsw_u64_fallback; 3240 FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_pabsd_u64, iemAImpl_pabsd_u64_fallback; 3241 FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_psignb_u64, iemAImpl_psignb_u64_fallback; 3242 FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_psignw_u64, iemAImpl_psignw_u64_fallback; 3243 FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_psignd_u64, iemAImpl_psignd_u64_fallback; 3244 FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_phaddw_u64, iemAImpl_phaddw_u64_fallback; 3245 FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_phaddd_u64, iemAImpl_phaddd_u64_fallback; 3246 FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_phsubw_u64, iemAImpl_phsubw_u64_fallback; 3247 FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_phsubd_u64, iemAImpl_phsubd_u64_fallback; 3248 FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_phaddsw_u64, iemAImpl_phaddsw_u64_fallback; 3249 FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_phsubsw_u64, iemAImpl_phsubsw_u64_fallback; 3250 FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_pmaddubsw_u64, iemAImpl_pmaddubsw_u64_fallback; 3251 FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_pmulhrsw_u64, iemAImpl_pmulhrsw_u64_fallback; 3252 FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_pmuludq_u64; 3253 3253 FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_psllw_u64, iemAImpl_psrlw_u64, iemAImpl_psraw_u64; 3254 3254 FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_pslld_u64, iemAImpl_psrld_u64, iemAImpl_psrad_u64; … … 3260 3260 FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_psadbw_u64; 3261 3261 3262 FNIEMAIMPLMEDIA F2U128iemAImpl_pshufb_u128, iemAImpl_pshufb_u128_fallback;3263 FNIEMAIMPLMEDIA F2U128iemAImpl_pand_u128, iemAImpl_pandn_u128, iemAImpl_por_u128, iemAImpl_pxor_u128;3264 FNIEMAIMPLMEDIA F2U128iemAImpl_pcmpeqb_u128, iemAImpl_pcmpeqw_u128, iemAImpl_pcmpeqd_u128;3265 FNIEMAIMPLMEDIA F2U128iemAImpl_pcmpeqq_u128, iemAImpl_pcmpeqq_u128_fallback;3266 FNIEMAIMPLMEDIA F2U128iemAImpl_pcmpgtb_u128, iemAImpl_pcmpgtw_u128, iemAImpl_pcmpgtd_u128;3267 FNIEMAIMPLMEDIA F2U128iemAImpl_pcmpgtq_u128, iemAImpl_pcmpgtq_u128_fallback;3268 FNIEMAIMPLMEDIA F2U128iemAImpl_paddb_u128, iemAImpl_paddsb_u128, iemAImpl_paddusb_u128;3269 FNIEMAIMPLMEDIA F2U128iemAImpl_paddw_u128, iemAImpl_paddsw_u128, iemAImpl_paddusw_u128;3270 FNIEMAIMPLMEDIA F2U128iemAImpl_paddd_u128;3271 FNIEMAIMPLMEDIA F2U128iemAImpl_paddq_u128;3272 FNIEMAIMPLMEDIA F2U128iemAImpl_psubb_u128, iemAImpl_psubsb_u128, iemAImpl_psubusb_u128;3273 FNIEMAIMPLMEDIA F2U128iemAImpl_psubw_u128, iemAImpl_psubsw_u128, iemAImpl_psubusw_u128;3274 FNIEMAIMPLMEDIA F2U128iemAImpl_psubd_u128;3275 FNIEMAIMPLMEDIA F2U128iemAImpl_psubq_u128;3276 FNIEMAIMPLMEDIA F2U128iemAImpl_pmullw_u128, iemAImpl_pmullw_u128_fallback;3277 FNIEMAIMPLMEDIA F2U128iemAImpl_pmulhw_u128;3278 FNIEMAIMPLMEDIA F2U128iemAImpl_pmulld_u128, iemAImpl_pmulld_u128_fallback;3279 FNIEMAIMPLMEDIA F2U128iemAImpl_pmaddwd_u128, iemAImpl_pmaddwd_u128_fallback;3280 FNIEMAIMPLMEDIA F2U128iemAImpl_pminub_u128;3281 FNIEMAIMPLMEDIA F2U128iemAImpl_pminud_u128, iemAImpl_pminud_u128_fallback;3282 FNIEMAIMPLMEDIA F2U128iemAImpl_pminuw_u128, iemAImpl_pminuw_u128_fallback;3283 FNIEMAIMPLMEDIA F2U128iemAImpl_pminsb_u128, iemAImpl_pminsb_u128_fallback;3284 FNIEMAIMPLMEDIA F2U128iemAImpl_pminsd_u128, iemAImpl_pminsd_u128_fallback;3285 FNIEMAIMPLMEDIA F2U128iemAImpl_pminsw_u128, iemAImpl_pminsw_u128_fallback;3286 FNIEMAIMPLMEDIA F2U128iemAImpl_pmaxub_u128;3287 FNIEMAIMPLMEDIA F2U128iemAImpl_pmaxud_u128, iemAImpl_pmaxud_u128_fallback;3288 FNIEMAIMPLMEDIA F2U128iemAImpl_pmaxuw_u128, iemAImpl_pmaxuw_u128_fallback;3289 FNIEMAIMPLMEDIA F2U128iemAImpl_pmaxsb_u128, iemAImpl_pmaxsb_u128_fallback;3290 FNIEMAIMPLMEDIA F2U128iemAImpl_pmaxsw_u128;3291 FNIEMAIMPLMEDIA F2U128iemAImpl_pmaxsd_u128, iemAImpl_pmaxsd_u128_fallback;3292 FNIEMAIMPLMEDIA F2U128iemAImpl_pabsb_u128, iemAImpl_pabsb_u128_fallback;3293 FNIEMAIMPLMEDIA F2U128iemAImpl_pabsw_u128, iemAImpl_pabsw_u128_fallback;3294 FNIEMAIMPLMEDIA F2U128iemAImpl_pabsd_u128, iemAImpl_pabsd_u128_fallback;3295 FNIEMAIMPLMEDIA F2U128iemAImpl_psignb_u128, iemAImpl_psignb_u128_fallback;3296 FNIEMAIMPLMEDIA F2U128iemAImpl_psignw_u128, iemAImpl_psignw_u128_fallback;3297 FNIEMAIMPLMEDIA F2U128iemAImpl_psignd_u128, iemAImpl_psignd_u128_fallback;3298 FNIEMAIMPLMEDIA F2U128iemAImpl_phaddw_u128, iemAImpl_phaddw_u128_fallback;3299 FNIEMAIMPLMEDIA F2U128iemAImpl_phaddd_u128, iemAImpl_phaddd_u128_fallback;3300 FNIEMAIMPLMEDIA F2U128iemAImpl_phsubw_u128, iemAImpl_phsubw_u128_fallback;3301 FNIEMAIMPLMEDIA F2U128iemAImpl_phsubd_u128, iemAImpl_phsubd_u128_fallback;3302 FNIEMAIMPLMEDIA F2U128iemAImpl_phaddsw_u128, iemAImpl_phaddsw_u128_fallback;3303 FNIEMAIMPLMEDIA F2U128iemAImpl_phsubsw_u128, iemAImpl_phsubsw_u128_fallback;3304 FNIEMAIMPLMEDIA F2U128iemAImpl_pmaddubsw_u128, iemAImpl_pmaddubsw_u128_fallback;3305 FNIEMAIMPLMEDIA F2U128iemAImpl_pmulhrsw_u128, iemAImpl_pmulhrsw_u128_fallback;3306 FNIEMAIMPLMEDIA F2U128iemAImpl_pmuludq_u128;3307 FNIEMAIMPLMEDIA F2U128iemAImpl_pmaddwd_u128, iemAImpl_pmaddwd_u128_fallback;3262 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_pshufb_u128, iemAImpl_pshufb_u128_fallback; 3263 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_pand_u128, iemAImpl_pandn_u128, iemAImpl_por_u128, iemAImpl_pxor_u128; 3264 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_pcmpeqb_u128, iemAImpl_pcmpeqw_u128, iemAImpl_pcmpeqd_u128; 3265 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_pcmpeqq_u128, iemAImpl_pcmpeqq_u128_fallback; 3266 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_pcmpgtb_u128, iemAImpl_pcmpgtw_u128, iemAImpl_pcmpgtd_u128; 3267 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_pcmpgtq_u128, iemAImpl_pcmpgtq_u128_fallback; 3268 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_paddb_u128, iemAImpl_paddsb_u128, iemAImpl_paddusb_u128; 3269 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_paddw_u128, iemAImpl_paddsw_u128, iemAImpl_paddusw_u128; 3270 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_paddd_u128; 3271 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_paddq_u128; 3272 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_psubb_u128, iemAImpl_psubsb_u128, iemAImpl_psubusb_u128; 3273 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_psubw_u128, iemAImpl_psubsw_u128, iemAImpl_psubusw_u128; 3274 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_psubd_u128; 3275 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_psubq_u128; 3276 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_pmullw_u128, iemAImpl_pmullw_u128_fallback; 3277 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_pmulhw_u128; 3278 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_pmulld_u128, iemAImpl_pmulld_u128_fallback; 3279 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_pmaddwd_u128, iemAImpl_pmaddwd_u128_fallback; 3280 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_pminub_u128; 3281 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_pminud_u128, iemAImpl_pminud_u128_fallback; 3282 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_pminuw_u128, iemAImpl_pminuw_u128_fallback; 3283 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_pminsb_u128, iemAImpl_pminsb_u128_fallback; 3284 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_pminsd_u128, iemAImpl_pminsd_u128_fallback; 3285 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_pminsw_u128, iemAImpl_pminsw_u128_fallback; 3286 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_pmaxub_u128; 3287 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_pmaxud_u128, iemAImpl_pmaxud_u128_fallback; 3288 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_pmaxuw_u128, iemAImpl_pmaxuw_u128_fallback; 3289 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_pmaxsb_u128, iemAImpl_pmaxsb_u128_fallback; 3290 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_pmaxsw_u128; 3291 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_pmaxsd_u128, iemAImpl_pmaxsd_u128_fallback; 3292 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_pabsb_u128, iemAImpl_pabsb_u128_fallback; 3293 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_pabsw_u128, iemAImpl_pabsw_u128_fallback; 3294 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_pabsd_u128, iemAImpl_pabsd_u128_fallback; 3295 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_psignb_u128, iemAImpl_psignb_u128_fallback; 3296 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_psignw_u128, iemAImpl_psignw_u128_fallback; 3297 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_psignd_u128, iemAImpl_psignd_u128_fallback; 3298 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_phaddw_u128, iemAImpl_phaddw_u128_fallback; 3299 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_phaddd_u128, iemAImpl_phaddd_u128_fallback; 3300 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_phsubw_u128, iemAImpl_phsubw_u128_fallback; 3301 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_phsubd_u128, iemAImpl_phsubd_u128_fallback; 3302 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_phaddsw_u128, iemAImpl_phaddsw_u128_fallback; 3303 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_phsubsw_u128, iemAImpl_phsubsw_u128_fallback; 3304 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_pmaddubsw_u128, iemAImpl_pmaddubsw_u128_fallback; 3305 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_pmulhrsw_u128, iemAImpl_pmulhrsw_u128_fallback; 3306 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_pmuludq_u128; 3307 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_pmaddwd_u128, iemAImpl_pmaddwd_u128_fallback; 3308 3308 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_packsswb_u128, iemAImpl_packuswb_u128; 3309 3309 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_packssdw_u128, iemAImpl_packusdw_u128;
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