VirtualBox

Changeset 103590 in vbox for trunk


Ignore:
Timestamp:
Feb 27, 2024 4:41:11 PM (7 months ago)
Author:
vboxsync
Message:

VMM/IEM: Native translation of IEM_MC_FETCH_FSW() body (untested), bugref:10371

Location:
trunk/src/VBox/VMM
Files:
5 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/VMM/VMMAll/IEMAllInstOneByte.cpp.h

    r103589 r103590  
    1039610396    IEM_MC_ARG_CONST(IEMMODE,           enmEffOpSize, /*=*/ pVCpu->iem.s.enmEffOpSize,  0);
    1039710397    IEM_MC_ARG_CONST(uint8_t,           iEffSeg,      /*=*/ pVCpu->iem.s.iEffSeg,       1);
    10398     IEM_MC_CALL_CIMPL_3(IEM_CIMPL_F_FPU, 0, iemCImpl_fnstenv, enmEffOpSize, iEffSeg, GCPtrEffDst);
     10398    IEM_MC_CALL_CIMPL_3(IEM_CIMPL_F_FPU, RT_BIT_64(kIemNativeGstReg_FpuFcw) | RT_BIT_64(kIemNativeGstReg_FpuFsw),
     10399                        iemCImpl_fnstenv, enmEffOpSize, iEffSeg, GCPtrEffDst);
    1039910400    IEM_MC_END();
    1040010401}
     
    1172511726    IEMOP_MNEMONIC(fninit, "fninit");
    1172611727    IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
    11727     IEM_MC_DEFER_TO_CIMPL_1_RET(IEM_CIMPL_F_FPU, RT_BIT_64(kIemNativeGstReg_FpuFcw),
     11728    IEM_MC_DEFER_TO_CIMPL_1_RET(IEM_CIMPL_F_FPU, RT_BIT_64(kIemNativeGstReg_FpuFcw) | RT_BIT_64(kIemNativeGstReg_FpuFsw),
    1172811729                                iemCImpl_finit, false /*fCheckXcpts*/);
    1172911730}
     
    1226712268    IEM_MC_ARG_CONST(IEMMODE,           enmEffOpSize, /*=*/ pVCpu->iem.s.enmEffOpSize,  0);
    1226812269    IEM_MC_ARG_CONST(uint8_t,           iEffSeg,      /*=*/ pVCpu->iem.s.iEffSeg,       1);
    12269     IEM_MC_CALL_CIMPL_3(IEM_CIMPL_F_FPU, RT_BIT_64(kIemNativeGstReg_FpuFcw),
     12270    IEM_MC_CALL_CIMPL_3(IEM_CIMPL_F_FPU, RT_BIT_64(kIemNativeGstReg_FpuFcw) | RT_BIT_64(kIemNativeGstReg_FpuFsw),
    1227012271                        iemCImpl_frstor, enmEffOpSize, iEffSeg, GCPtrEffSrc);
    1227112272    IEM_MC_END();
     
    1228712288    IEM_MC_ARG_CONST(IEMMODE,           enmEffOpSize, /*=*/ pVCpu->iem.s.enmEffOpSize,  0);
    1228812289    IEM_MC_ARG_CONST(uint8_t,           iEffSeg,      /*=*/ pVCpu->iem.s.iEffSeg,       1);
    12289     IEM_MC_CALL_CIMPL_3(IEM_CIMPL_F_FPU, RT_BIT_64(kIemNativeGstReg_FpuFcw),
     12290    IEM_MC_CALL_CIMPL_3(IEM_CIMPL_F_FPU, RT_BIT_64(kIemNativeGstReg_FpuFcw) | RT_BIT_64(kIemNativeGstReg_FpuFsw),
    1229012291                        iemCImpl_fnsave, enmEffOpSize, iEffSeg, GCPtrEffDst);
    1229112292    IEM_MC_END();
  • trunk/src/VBox/VMM/VMMAll/IEMAllInstPython.py

    r103589 r103590  
    29632963    'IEM_MC_FETCH_EFLAGS_U8':                                    (McBlock.parseMcGeneric,           False, False, False, ),
    29642964    'IEM_MC_FETCH_FCW':                                          (McBlock.parseMcGeneric,           False, False, True,  ),
    2965     'IEM_MC_FETCH_FSW':                                          (McBlock.parseMcGeneric,           False, False, False, ),
     2965    'IEM_MC_FETCH_FSW':                                          (McBlock.parseMcGeneric,           False, False, True, ),
    29662966    'IEM_MC_FETCH_GREG_U16':                                     (McBlock.parseMcGeneric,           False, False, True,  ),
    29672967    'IEM_MC_FETCH_GREG_U16_SX_U32':                              (McBlock.parseMcGeneric,           False, False, True,  ),
  • trunk/src/VBox/VMM/VMMAll/IEMAllInstTwoByte0f.cpp.h

    r103589 r103590  
    1002910029    IEM_MC_ARG_CONST(uint8_t,   iEffSeg,      /*=*/ pVCpu->iem.s.iEffSeg,       0);
    1003010030    IEM_MC_ARG_CONST(IEMMODE,   enmEffOpSize, /*=*/pVCpu->iem.s.enmEffOpSize,   2);
    10031     IEM_MC_CALL_CIMPL_3(IEM_CIMPL_F_FPU, RT_BIT_64(kIemNativeGstReg_FpuFcw),
     10031    IEM_MC_CALL_CIMPL_3(IEM_CIMPL_F_FPU, RT_BIT_64(kIemNativeGstReg_FpuFcw) | RT_BIT_64(kIemNativeGstReg_FpuFsw),
    1003210032                        iemCImpl_fxrstor, iEffSeg, GCPtrEff, enmEffOpSize);
    1003310033    IEM_MC_END();
     
    1015310153    IEM_MC_ARG_CONST(uint8_t,   iEffSeg,      /*=*/ pVCpu->iem.s.iEffSeg,       0);
    1015410154    IEM_MC_ARG_CONST(IEMMODE,   enmEffOpSize, /*=*/ pVCpu->iem.s.enmEffOpSize,  2);
    10155     IEM_MC_CALL_CIMPL_3(IEM_CIMPL_F_FPU, RT_BIT_64(kIemNativeGstReg_FpuFcw),
     10155    IEM_MC_CALL_CIMPL_3(IEM_CIMPL_F_FPU, RT_BIT_64(kIemNativeGstReg_FpuFcw) | RT_BIT_64(kIemNativeGstReg_FpuFsw),
    1015610156                        iemCImpl_xrstor, iEffSeg, GCPtrEff, enmEffOpSize);
    1015710157    IEM_MC_END();
  • trunk/src/VBox/VMM/VMMAll/IEMAllN8veRecompiler.cpp

    r103589 r103590  
    35003500    /* [kIemNativeGstReg_Cr0] = */                      { CPUMCTX_OFF_AND_SIZE(cr0),                "cr0", },
    35013501    /* [kIemNativeGstReg_FpuFcw] = */                   { CPUMCTX_OFF_AND_SIZE(XState.x87.FCW),     "fcw", },
    3502     /* [kIemNativeGstReg_LivenessPadding19] = */        { UINT32_MAX / 4, 0,                        "pad19", },
     3502    /* [kIemNativeGstReg_FpuFsw] = */                   { CPUMCTX_OFF_AND_SIZE(XState.x87.FSW),     "fsw", },
    35033503    /* [kIemNativeGstReg_SegBaseFirst + 0] = */         { CPUMCTX_OFF_AND_SIZE(aSRegs[0].u64Base),  "es_base", },
    35043504    /* [kIemNativeGstReg_SegBaseFirst + 1] = */         { CPUMCTX_OFF_AND_SIZE(aSRegs[1].u64Base),  "cs_base", },
     
    1328313283    /* Free but don't flush the FCW register. */
    1328413284    iemNativeRegFreeTmp(pReNative, idxFcwReg);
     13285
     13286    return off;
     13287}
     13288
     13289
     13290#define IEM_MC_FETCH_FSW(a_u16Fsw) \
     13291    off = iemNativeEmitFetchFpuFsw(pReNative, off, a_u16Fsw)
     13292
     13293/** Emits code for IEM_MC_FETCH_FSW. */
     13294DECL_INLINE_THROW(uint32_t)
     13295iemNativeEmitFetchFpuFsw(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxDstVar)
     13296{
     13297    IEMNATIVE_ASSERT_VAR_IDX(pReNative, idxDstVar);
     13298    Assert(pReNative->Core.aVars[idxDstVar].cbVar == sizeof(uint16_t));
     13299
     13300    /* Allocate a temporary FSW register. */
     13301    uint8_t const idxFswReg = iemNativeRegAllocTmpForGuestReg(pReNative, &off, kIemNativeGstReg_FpuFsw, kIemNativeGstRegUse_ReadOnly);
     13302
     13303    off = iemNativeEmitLoadGprFromGpr16(pReNative, off, idxDstVar, idxFswReg);
     13304
     13305    /* Free but don't flush the FSW register. */
     13306    iemNativeRegFreeTmp(pReNative, idxFswReg);
    1328513307
    1328613308    return off;
  • trunk/src/VBox/VMM/include/IEMN8veRecompiler.h

    r103589 r103590  
    689689    kIemNativeGstReg_Cr0,
    690690    kIemNativeGstReg_FpuFcw,
    691     kIemNativeGstReg_LivenessPadding19,
     691    kIemNativeGstReg_FpuFsw,
    692692    kIemNativeGstReg_SegBaseFirst,
    693693    kIemNativeGstReg_SegBaseLast   = kIemNativeGstReg_SegBaseFirst + 5,
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