Changeset 101000 in vbox
- Timestamp:
- Sep 1, 2023 5:49:38 AM (13 months ago)
- File:
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- 1 edited
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trunk/include/iprt/x86.h (modified) (1 diff)
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trunk/include/iprt/x86.h
r100996 r101000 1443 1443 * "Programming the PAT", AMD spec. 7.8.2 "PAT Indexing") */ 1444 1444 #define MSR_IA32_CR_PAT_INIT_VAL UINT64_C(0x0007040600070406) 1445 1446 /** Memory types that can be encoded in the IA32_PAT MSR. 1447 * @{ */ 1448 /** Uncacheable. */ 1449 #define MSR_IA32_PAT_MT_UC 0 1450 /** Write Combining. */ 1451 #define MSR_IA32_PAT_MT_WC 1 1452 /** Reserved value 2. */ 1453 #define MSR_IA32_PAT_MT_RSVD_2 2 1454 /** Reserved value 3. */ 1455 #define MSR_IA32_PAT_MT_RSVD_3 3 1456 /** Write-through. */ 1457 #define MSR_IA32_PAT_MT_WT 4 1458 /** Write-protected. */ 1459 #define MSR_IA32_PAT_MT_WP 5 1460 /** Writeback. */ 1461 #define MSR_IA32_PAT_MT_WB 6 1462 /** Uncached (UC-). */ 1463 #define MSR_IA32_PAT_MT_UCD 7 1464 /** @}*/ 1465 1445 1466 1446 1467 /** Performance event select MSRs. (Intel only) */
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