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source: vbox/trunk/src/VBox/ValidationKit/bootsectors/bs3-fpustate-1-template.mac@ 103131

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1; $Id: bs3-fpustate-1-template.mac 98103 2023-01-17 14:15:46Z vboxsync $
2;; @file
3; BS3Kit - bs3-fpustate-1, assembly template.
4;
5
6;
7; Copyright (C) 2007-2023 Oracle and/or its affiliates.
8;
9; This file is part of VirtualBox base platform packages, as
10; available from https://www.virtualbox.org.
11;
12; This program is free software; you can redistribute it and/or
13; modify it under the terms of the GNU General Public License
14; as published by the Free Software Foundation, in version 3 of the
15; License.
16;
17; This program is distributed in the hope that it will be useful, but
18; WITHOUT ANY WARRANTY; without even the implied warranty of
19; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20; General Public License for more details.
21;
22; You should have received a copy of the GNU General Public License
23; along with this program; if not, see <https://www.gnu.org/licenses>.
24;
25; The contents of this file may alternatively be used under the terms
26; of the Common Development and Distribution License Version 1.0
27; (CDDL), a copy of it is provided in the "COPYING.CDDL" file included
28; in the VirtualBox distribution, in which case the provisions of the
29; CDDL are applicable instead of those of the GPL.
30;
31; You may elect to license modified versions of this file under the
32; terms and conditions of either the GPL or the CDDL or both.
33;
34; SPDX-License-Identifier: GPL-3.0-only OR CDDL-1.0
35;
36
37
38;*********************************************************************************************************************************
39;* Header Files *
40;*********************************************************************************************************************************
41%include "bs3kit-template-header.mac" ; setup environment
42
43
44;*********************************************************************************************************************************
45;* External Symbols *
46;*********************************************************************************************************************************
47TMPL_BEGIN_TEXT
48
49
50;;
51; Initializes the FPU state and saves it to pFxState.
52;
53; BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_InitState)(X86FXSTATE BS3_FAR *pFxState, void *pvMmioReg);
54;
55BS3_PROC_BEGIN_MODE bs3FpuState1_InitState, BS3_PBC_NEAR
56 BS3_CALL_CONV_PROLOG 2
57 push xBP
58 mov xBP, xSP
59 push xBX
60TONLY16 push ds
61 pushf
62TONLY64 sub xSP, 20h
63
64 ;
65 ; x87 state.
66 ;
67 fninit
68 fld dword [TMPL_DATA16_WRT(g_r32V1)]
69 fld qword [TMPL_DATA16_WRT(g_r64V1)]
70 fld tword [TMPL_DATA16_WRT(g_r80V1)]
71 fld qword [TMPL_DATA16_WRT(g_r64V1)]
72 fld dword [TMPL_DATA16_WRT(g_r32V2)]
73 fld dword [TMPL_DATA16_WRT(g_r80_QNaNMax)]
74 fld tword [TMPL_DATA16_WRT(g_r80_SNaNMax)]
75 fld tword [TMPL_DATA16_WRT(g_r80_ThirtyTwo)]
76
77 ;
78 ; We'll later be using FMUL to test actually using the FPU in RC & R0,
79 ; so for everything to line up correctly with FPU CS:IP and FPU DS:DP,
80 ; we'll call the function here too. This has the benefitial side effect
81 ; of loading correct FPU DS/DS values so we can check that they don't
82 ; get lost either. Also, we now don't have to guess whether the CPU
83 ; emulation sets CS/DS or not.
84 ;
85TONLY16 push xPRE [xBP + xCB + cbCurRetAddr + sCB + 2]
86 push xPRE [xBP + xCB + cbCurRetAddr + sCB]
87 BS3_CALL TMPL_NM(bs3FpuState1_FMul), 1
88 add xSP, sCB
89
90 ;
91 ; SSE state
92 ;
93 movdqu xmm0, [TMPL_DATA16_WRT(g_r32_0dot1)]
94 movdqu xmm1, [TMPL_DATA16_WRT(g_r32_Two)]
95 movdqu xmm2, [TMPL_DATA16_WRT(g_r32_ThirtyTwo)]
96 movdqu xmm3, [TMPL_DATA16_WRT(g_r32_SNaN)]
97 movdqu xmm4, [TMPL_DATA16_WRT(g_r80_ThirtyTwo)]
98 movdqu xmm5, [TMPL_DATA16_WRT(g_r32_NegQNaN)]
99 movdqu xmm6, [TMPL_DATA16_WRT(g_r64_Zero)]
100 movdqu xmm7, [TMPL_DATA16_WRT(g_r64_Two)]
101%if TMPL_BITS == 64
102 movdqu xmm8, [TMPL_DATA16_WRT(g_r64_Ten)]
103 movdqu xmm9, [TMPL_DATA16_WRT(g_r64_ThirtyTwo)]
104 movdqu xmm10, [TMPL_DATA16_WRT(g_r64_Max)]
105 movdqu xmm11, [TMPL_DATA16_WRT(g_r64_SNaN)]
106 movdqu xmm12, [TMPL_DATA16_WRT(g_r64_NegQNaN)]
107 movdqu xmm13, [TMPL_DATA16_WRT(g_r64_QNaNMax)]
108 movdqu xmm14, [TMPL_DATA16_WRT(g_r64_DnMax)]
109 movdqu xmm15, [TMPL_DATA16_WRT(g_r80_Eleven)]
110%endif
111
112 ;; @todo status regs
113
114 ;
115 ; Save it. Note that DS is no longer valid in 16-bit code.
116 ; To be on the safe side, we load and save the state once again.
117 ;
118TONLY16 mov ds, [xBP + xCB + cbCurRetAddr + 2]
119 mov xBX, [xBP + xCB + cbCurRetAddr]
120 cli
121%if TMPL_BITS == 64
122 o64 fxsave [xBX]
123 fninit
124 o64 fxrstor [xBX]
125 o64 fxsave [xBX]
126%else
127 fxsave [xBX]
128 fninit
129 fxrstor [xBX]
130 fxsave [xBX]
131%endif
132
133.return:
134TONLY64 add xSP, 20h
135 popf
136TONLY16 pop ds
137 pop xBX
138 mov xSP, xBP
139 pop xBP
140 BS3_CALL_CONV_EPILOG 2
141 BS3_HYBRID_RET
142BS3_PROC_END_MODE bs3FpuState1_InitState
143
144
145;;
146; BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_Restore)(X86FXSTATE const BS3_FAR *pFxState);
147;
148BS3_PROC_BEGIN_MODE bs3FpuState1_Restore, BS3_PBC_NEAR
149 push xBP
150 mov xBP, xSP
151
152%if TMPL_BITS == 64
153 o64 fxrstor [rcx]
154
155%elif TMPL_BITS == 32
156 mov eax, [xBP + xCB*2]
157 fxrstor [eax]
158
159%elif TMPL_BITS == 16
160 mov ax, ds
161 mov ds, [xBP + xCB + cbCurRetAddr + 2]
162 mov xBX, [xBP + xCB + cbCurRetAddr]
163 fxrstor [bx]
164 mov ds, ax
165%else
166 %error TMPL_BITS
167%endif
168
169 mov xSP, xBP
170 pop xBP
171 BS3_HYBRID_RET
172BS3_PROC_END_MODE bs3FpuState1_Restore
173
174;;
175; BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_Save)(X86FXSTATE BS3_FAR *pFxState);
176;
177BS3_PROC_BEGIN_MODE bs3FpuState1_Save, BS3_PBC_NEAR
178 push xBP
179 mov xBP, xSP
180
181%if TMPL_BITS == 64
182 o64 fxsave [rcx]
183
184%elif TMPL_BITS == 32
185 mov eax, [xBP + xCB*2]
186 fxsave [eax]
187
188%elif TMPL_BITS == 16
189 push bx
190 push ds
191 mov ds, [xBP + xCB + cbCurRetAddr + 2]
192 mov bx, [xBP + xCB + cbCurRetAddr]
193 fxsave [bx]
194 pop ds
195 pop bx
196%else
197 %error TMPL_BITS
198%endif
199
200 mov xSP, xBP
201 pop xBP
202 BS3_HYBRID_RET
203BS3_PROC_END_MODE bs3FpuState1_Save
204
205
206;;
207; Performs a MOVDQU write on the specified memory.
208;
209; BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_MovDQU_Write)(void *pvMmioReg);
210;
211BS3_PROC_BEGIN_MODE bs3FpuState1_MovDQU_Write, BS3_PBC_NEAR
212 BS3_CALL_CONV_PROLOG 1
213 push xBP
214 mov xBP, xSP
215 push xBX
216TONLY16 push ds
217
218 ; Load the register pointer.
219 mov xBX, [xBP + xCB + cbCurRetAddr]
220TONLY16 mov ds, [xBP + xCB + cbCurRetAddr + 2]
221
222 ; Do read.
223 movdqu [xBX], xmm0
224
225TONLY16 pop ds
226 pop xBX
227 leave
228 BS3_CALL_CONV_EPILOG 1
229 BS3_HYBRID_RET
230BS3_PROC_END_MODE bs3FpuState1_MovDQU_Write
231
232
233;;
234; Performs a MOVDQU write to the specified memory.
235;
236; BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_MovDQU_Read)(void *pvMmioReg);
237;
238BS3_PROC_BEGIN_MODE bs3FpuState1_MovDQU_Read, BS3_PBC_NEAR
239 BS3_CALL_CONV_PROLOG 2
240 push xBP
241 mov xBP, xSP
242 push xBX
243TONLY16 push ds
244 sub xSP, 20h
245%if TMPL_BITS == 16
246 movdqu [xBP - xCB - xCB - 2 - 18h], xmm2
247%else
248 movdqu [xSP], xmm2
249%endif
250
251 ; Load the register pointer.
252 mov xBX, [xBP + xCB + cbCurRetAddr]
253TONLY16 mov ds, [xBP + xCB + cbCurRetAddr + 2]
254
255
256 ; Do read.
257 movdqu xmm2, [xBX]
258
259 ; Save the result.
260 mov xBX, [xBP + xCB + cbCurRetAddr + sCB]
261TONLY16 mov ds, [xBP + xCB + cbCurRetAddr + sCB + 2]
262 movups [xBX], xmm2
263
264%if TMPL_BITS == 16
265 movdqu xmm2, [xBP - xCB - xCB - 2 - 18h]
266%else
267 movdqu xmm2, [xSP]
268%endif
269 add xSP, 20h
270TONLY16 pop ds
271 pop xBX
272 mov xSP, xBP
273 pop xBP
274 BS3_CALL_CONV_EPILOG 2
275 BS3_HYBRID_RET
276BS3_PROC_END_MODE bs3FpuState1_MovDQU_Read
277
278
279;;
280; Performs a MOVUPS write on the specified memory.
281;
282; BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_MovUPS_Write)(void *pvMmioReg);
283;
284BS3_PROC_BEGIN_MODE bs3FpuState1_MovUPS_Write, BS3_PBC_NEAR
285 BS3_CALL_CONV_PROLOG 1
286 push xBP
287 mov xBP, xSP
288 push xBX
289TONLY16 push ds
290
291 ; Load the register pointer.
292 mov xBX, [xBP + xCB + cbCurRetAddr]
293TONLY16 mov ds, [xBP + xCB + cbCurRetAddr + 2]
294
295 ; Do read.
296 movups [xBX], xmm3
297
298TONLY16 pop ds
299 pop xBX
300 leave
301 BS3_CALL_CONV_EPILOG 1
302 BS3_HYBRID_RET
303BS3_PROC_END_MODE bs3FpuState1_MovUPS_Write
304
305
306;;
307; Performs a MOVUPS write to the specified memory.
308;
309; BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_MovUPS_Read)(void *pvMmioReg, void *pvResult);
310;
311BS3_PROC_BEGIN_MODE bs3FpuState1_MovUPS_Read, BS3_PBC_NEAR
312 BS3_CALL_CONV_PROLOG 2
313 push xBP
314 mov xBP, xSP
315 push xBX
316TONLY16 push ds
317 sub xSP, 20h
318%if TMPL_BITS == 16
319 movups [xBP - xCB - xCB - 2 - 18h], xmm1
320%else
321 movups [xSP], xmm1
322%endif
323
324 ; Load the register pointer.
325 mov xBX, [xBP + xCB + cbCurRetAddr]
326TONLY16 mov ds, [xBP + xCB + cbCurRetAddr + 2]
327
328
329 ; Do read.
330 movups xmm1, [xBX]
331
332 ; Save the result.
333 mov xBX, [xBP + xCB + cbCurRetAddr + sCB]
334TONLY16 mov ds, [xBP + xCB + cbCurRetAddr + sCB + 2]
335 movups [xBX], xmm1
336
337%if TMPL_BITS == 16
338 movups xmm1, [xBP - xCB - xCB - 2 - 18h]
339%else
340 movups xmm1, [xSP]
341%endif
342 add xSP, 20h
343TONLY16 pop ds
344 pop xBX
345 mov xSP, xBP
346 pop xBP
347 BS3_CALL_CONV_EPILOG 2
348 BS3_HYBRID_RET
349BS3_PROC_END_MODE bs3FpuState1_MovUPS_Read
350
351
352;;
353; Performs a FNSTENV write on the specified memory.
354;
355; BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_FNStEnv)(void *pvMmioReg);
356;
357BS3_PROC_BEGIN_MODE bs3FpuState1_FNStEnv, BS3_PBC_NEAR
358 BS3_CALL_CONV_PROLOG 1
359 push xBP
360 mov xBP, xSP
361 push xBX
362TONLY16 push ds
363
364 ; Load the register pointer.
365 mov xBX, [xBP + xCB + cbCurRetAddr]
366TONLY16 mov ds, [xBP + xCB + cbCurRetAddr + 2]
367
368 ; Just write.
369 fnstenv [xBX]
370
371TONLY16 pop ds
372 pop xBX
373 mov xSP, xBP
374 pop xBP
375 BS3_CALL_CONV_EPILOG 1
376 BS3_HYBRID_RET
377BS3_PROC_END_MODE bs3FpuState1_FNStEnv
378
379
380;;
381; Performs a FMUL on the specified memory, after writing a 64-bit value to it first.
382;
383; BS3_DECL_NEAR(void) TMPL_NM(bs3FpuState1_FMul)(void *pvMmioReg, void *pvResultIgnored);
384;
385BS3_PROC_BEGIN_MODE bs3FpuState1_FMul, BS3_PBC_NEAR
386 BS3_CALL_CONV_PROLOG 2
387 push xBP
388 mov xBP, xSP
389 push xBX
390TONLY16 push ds
391
392 ; Load the value we'll be multiplying with into register(s) while ds is DATA16.
393 mov sAX, [TMPL_DATA16_WRT(g_r64_One)]
394TNOT64 mov edx, [4 + TMPL_DATA16_WRT(g_r64_One)]
395
396 ; Load the register pointer.
397 mov xBX, [xBP + xCB + cbCurRetAddr]
398TONLY16 mov ds, [xBP + xCB + cbCurRetAddr + 2]
399
400 ; Just write.
401 mov [xBX], sAX
402TNOT64 mov [xBX + 4], edx
403 call .do_it
404
405TONLY16 pop ds
406 pop xBX
407 mov xSP, xBP
408 pop xBP
409 BS3_CALL_CONV_EPILOG 2
410 BS3_HYBRID_RET
411.do_it:
412 fmul qword [xBX]
413 ret
414BS3_PROC_END_MODE bs3FpuState1_FMul
415
416
417%include "bs3kit-template-footer.mac" ; reset environment
418
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