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source: vbox/trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-weird-1-template.mac@ 103131

Last change on this file since 103131 was 102789, checked in by vboxsync, 9 months ago

ValKit/bs3-cpu-weird-1: Extended the PUSH/POP SReg testcase to cover all the basics. bugref:10371

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1; $Id: bs3-cpu-weird-1-template.mac 102789 2024-01-08 21:48:55Z vboxsync $
2;; @file
3; BS3Kit - bs3-cpu-weird-1 assembly template.
4;
5
6;
7; Copyright (C) 2007-2023 Oracle and/or its affiliates.
8;
9; This file is part of VirtualBox base platform packages, as
10; available from https://www.virtualbox.org.
11;
12; This program is free software; you can redistribute it and/or
13; modify it under the terms of the GNU General Public License
14; as published by the Free Software Foundation, in version 3 of the
15; License.
16;
17; This program is distributed in the hope that it will be useful, but
18; WITHOUT ANY WARRANTY; without even the implied warranty of
19; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20; General Public License for more details.
21;
22; You should have received a copy of the GNU General Public License
23; along with this program; if not, see <https://www.gnu.org/licenses>.
24;
25; The contents of this file may alternatively be used under the terms
26; of the Common Development and Distribution License Version 1.0
27; (CDDL), a copy of it is provided in the "COPYING.CDDL" file included
28; in the VirtualBox distribution, in which case the provisions of the
29; CDDL are applicable instead of those of the GPL.
30;
31; You may elect to license modified versions of this file under the
32; terms and conditions of either the GPL or the CDDL or both.
33;
34; SPDX-License-Identifier: GPL-3.0-only OR CDDL-1.0
35;
36
37
38;*********************************************************************************************************************************
39;* Header Files *
40;*********************************************************************************************************************************
41%include "bs3kit-template-header.mac" ; setup environment
42
43
44;*********************************************************************************************************************************
45;* External Symbols *
46;*********************************************************************************************************************************
47TMPL_BEGIN_TEXT
48
49
50;
51; Test code snippets containing code which differs between 16-bit, 32-bit
52; and 64-bit CPUs modes.
53;
54%ifdef BS3_INSTANTIATING_CMN
55
56
57;
58; Inhibited int 80h.
59;
60BS3_PROC_BEGIN_CMN bs3CpuWeird1_InhibitedInt80, BS3_PBC_NEAR
61 ; Load SS from stack. This instruction causes fusing.
62%if TMPL_BITS != 64
63 pop ss
64%else
65 mov ss, [rsp]
66%endif
67 ; The ring transition instruction.
68BS3_GLOBAL_NAME_EX BS3_CMN_NM(bs3CpuWeird1_InhibitedInt80_int80), , 0
69 int 80h
70 ; We shouldn't get here!
71.ud2_again:
72 ud2
73 jmp .ud2_again
74BS3_PROC_END_CMN bs3CpuWeird1_InhibitedInt80
75
76;
77; Inhibited int 3.
78;
79BS3_PROC_BEGIN_CMN bs3CpuWeird1_InhibitedInt3, BS3_PBC_NEAR
80 ; Load SS from stack. This instruction causes fusing.
81%if TMPL_BITS != 64
82 pop ss
83%else
84 mov ss, [rsp]
85%endif
86 ; The ring transition instruction.
87BS3_GLOBAL_NAME_EX BS3_CMN_NM(bs3CpuWeird1_InhibitedInt3_int3), , 0
88 int 3
89 ; We shouldn't get here!
90.ud2_again:
91 ud2
92 jmp .ud2_again
93AssertCompile(.ud2_again - BS3_CMN_NM(bs3CpuWeird1_InhibitedInt3_int3) == 2)
94BS3_PROC_END_CMN bs3CpuWeird1_InhibitedInt3
95
96
97;
98; Inhibited int3.
99;
100BS3_PROC_BEGIN_CMN bs3CpuWeird1_InhibitedBp, BS3_PBC_NEAR
101 ; Load SS from stack. This instruction causes fusing.
102%if TMPL_BITS != 64
103 pop ss
104%else
105 mov ss, [rsp]
106%endif
107 ; The ring transition instruction.
108BS3_GLOBAL_NAME_EX BS3_CMN_NM(bs3CpuWeird1_InhibitedBp_int3), , 0
109 int3
110 ; We shouldn't get here!
111.ud2_again:
112 ud2
113 jmp .ud2_again
114AssertCompile(.ud2_again - BS3_CMN_NM(bs3CpuWeird1_InhibitedBp_int3) == 1)
115BS3_PROC_END_CMN bs3CpuWeird1_InhibitedBp
116
117
118;
119; PC (IP/EIP) wrapper templates.
120; These will potentially trigger VM exits, except for the benign one.
121;
122; Note! Single instructions as the testcase will shift multibyte variations
123; across the wrap-around boundary and that would cause unpredictable
124; results for the 16-bit if there is more than one instruction.
125;
126
127BS3_PROC_BEGIN_CMN bs3CpuWeird1_PcWrapBenign1, BS3_PBC_NEAR
128 nop
129BS3_PROC_END_CMN bs3CpuWeird1_PcWrapBenign1
130
131BS3_PROC_BEGIN_CMN bs3CpuWeird1_PcWrapBenign2, BS3_PBC_NEAR
132 xor xDX, xAX
133BS3_PROC_END_CMN bs3CpuWeird1_PcWrapBenign2
134
135BS3_PROC_BEGIN_CMN bs3CpuWeird1_PcWrapCpuId, BS3_PBC_NEAR
136 cpuid
137BS3_PROC_END_CMN bs3CpuWeird1_PcWrapCpuId
138
139BS3_PROC_BEGIN_CMN bs3CpuWeird1_PcWrapIn80, BS3_PBC_NEAR
140 in al, 80h
141BS3_PROC_END_CMN bs3CpuWeird1_PcWrapIn80
142
143BS3_PROC_BEGIN_CMN bs3CpuWeird1_PcWrapOut80, BS3_PBC_NEAR
144 out 80h, al
145BS3_PROC_END_CMN bs3CpuWeird1_PcWrapOut80
146
147BS3_PROC_BEGIN_CMN bs3CpuWeird1_PcWrapSmsw, BS3_PBC_NEAR
148 smsw si
149BS3_PROC_END_CMN bs3CpuWeird1_PcWrapSmsw
150
151BS3_PROC_BEGIN_CMN bs3CpuWeird1_PcWrapRdCr0, BS3_PBC_NEAR
152 mov sAX, cr0
153BS3_PROC_END_CMN bs3CpuWeird1_PcWrapRdCr0
154
155BS3_PROC_BEGIN_CMN bs3CpuWeird1_PcWrapRdDr0, BS3_PBC_NEAR
156 mov sAX, dr0
157BS3_PROC_END_CMN bs3CpuWeird1_PcWrapRdDr0
158
159BS3_PROC_BEGIN_CMN bs3CpuWeird1_PcWrapWrDr0, BS3_PBC_NEAR
160 mov dr0, sAX
161BS3_PROC_END_CMN bs3CpuWeird1_PcWrapWrDr0
162
163
164;
165; PUSH / POP.
166;
167
168BS3_PROC_BEGIN_CMN bs3CpuWeird1_Push_xSP_Ud2, BS3_PBC_NEAR
169 push xSP
170.ud2_again:
171 ud2
172 jmp .ud2_again
173AssertCompile(.ud2_again - BS3_CMN_NM(bs3CpuWeird1_Push_xSP_Ud2) == 1)
174BS3_PROC_END_CMN bs3CpuWeird1_Push_xSP_Ud2
175
176BS3_PROC_BEGIN_CMN bs3CpuWeird1_Pop_xSP_Ud2, BS3_PBC_NEAR
177 pop xSP
178.ud2_again:
179 ud2
180 jmp .ud2_again
181AssertCompile(.ud2_again - BS3_CMN_NM(bs3CpuWeird1_Pop_xSP_Ud2) == 1)
182BS3_PROC_END_CMN bs3CpuWeird1_Pop_xSP_Ud2
183
184
185BS3_PROC_BEGIN_CMN bs3CpuWeird1_Push_opsize_xSP_Ud2, BS3_PBC_NEAR
186 db 066h
187 push xSP
188.ud2_again:
189 ud2
190 jmp .ud2_again
191AssertCompile(.ud2_again - BS3_CMN_NM(bs3CpuWeird1_Push_opsize_xSP_Ud2) == 2)
192BS3_PROC_END_CMN bs3CpuWeird1_Push_opsize_xSP_Ud2
193
194BS3_PROC_BEGIN_CMN bs3CpuWeird1_Pop_opsize_xSP_Ud2, BS3_PBC_NEAR
195 db 066h
196 pop xSP
197.ud2_again:
198 ud2
199 jmp .ud2_again
200AssertCompile(.ud2_again - BS3_CMN_NM(bs3CpuWeird1_Pop_opsize_xSP_Ud2) == 2)
201BS3_PROC_END_CMN bs3CpuWeird1_Pop_opsize_xSP_Ud2
202
203
204BS3_PROC_BEGIN_CMN bs3CpuWeird1_Push_opsize_xBX_Ud2, BS3_PBC_NEAR
205 db 066h
206 push xBX
207.ud2_again:
208 ud2
209 jmp .ud2_again
210AssertCompile(.ud2_again - BS3_CMN_NM(bs3CpuWeird1_Push_opsize_xBX_Ud2) == 2)
211BS3_PROC_END_CMN bs3CpuWeird1_Push_opsize_xBX_Ud2
212
213BS3_PROC_BEGIN_CMN bs3CpuWeird1_Pop_opsize_xBX_Ud2, BS3_PBC_NEAR
214 db 066h
215 pop xBX
216.ud2_again:
217 ud2
218 jmp .ud2_again
219AssertCompile(.ud2_again - BS3_CMN_NM(bs3CpuWeird1_Pop_opsize_xBX_Ud2) == 2)
220BS3_PROC_END_CMN bs3CpuWeird1_Pop_opsize_xBX_Ud2
221
222
223;
224; PUSH / POP SREG.
225;
226
227 %ifndef DEFINED_DO_PUSH_POP_MACROS
228 %define DEFINED_DO_PUSH_POP_MACROS
229 %macro DoPushSeg 2
230
231BS3_PROC_BEGIN_CMN bs3CpuWeird1_Push_ %+ %1 %+ _Ud2, BS3_PBC_NEAR
232 push %1
233.ud2_again:
234 ud2
235 jmp .ud2_again
236AssertCompile(.ud2_again - BS3_CMN_NM(bs3CpuWeird1_Push_ %+ %1 %+ _Ud2) == %2)
237BS3_PROC_END_CMN bs3CpuWeird1_Push_ %+ %1 %+ _Ud2
238
239BS3_PROC_BEGIN_CMN bs3CpuWeird1_Push_opsize_ %+ %1 %+ _Ud2, BS3_PBC_NEAR
240 db 066h
241 push %1
242.ud2_again:
243 ud2
244 jmp .ud2_again
245AssertCompile(.ud2_again - BS3_CMN_NM(bs3CpuWeird1_Push_opsize_ %+ %1 %+ _Ud2) == (%2 + 1))
246BS3_PROC_END_CMN bs3CpuWeird1_Push_opsize_ %+ %1 %+ _Ud2
247
248 %endmacro ; DoPushSeg
249
250 %macro DoPopSeg 2
251
252BS3_PROC_BEGIN_CMN bs3CpuWeird1_Pop_ %+ %1 %+ _Ud2, BS3_PBC_NEAR
253 pop %1
254.ud2_again:
255 ud2
256 jmp .ud2_again
257AssertCompile(.ud2_again - BS3_CMN_NM(bs3CpuWeird1_Pop_ %+ %1 %+ _Ud2) == %2)
258BS3_PROC_END_CMN bs3CpuWeird1_Pop_ %+ %1 %+ _Ud2
259
260BS3_PROC_BEGIN_CMN bs3CpuWeird1_Pop_opsize_ %+ %1 %+ _Ud2, BS3_PBC_NEAR
261 db 066h
262 pop %1
263.ud2_again:
264 ud2
265 jmp .ud2_again
266AssertCompile(.ud2_again - BS3_CMN_NM(bs3CpuWeird1_Pop_opsize_ %+ %1 %+ _Ud2) == (%2 + 1))
267BS3_PROC_END_CMN bs3CpuWeird1_Pop_opsize_ %+ %1 %+ _Ud2
268
269 %endmacro ; DoPopSeg
270 %endif ; !DEFINED_DO_PUSH_POP_MACROS
271
272DoPushSeg fs, 2
273DoPopSeg fs, 2
274DoPushSeg gs, 2
275DoPopSeg gs, 2
276 %if TMPL_BITS == 32 || TMPL_BITS == 16
277DoPushSeg es, 1
278DoPopSeg es, 1
279DoPushSeg ds, 1
280DoPopSeg ds, 1
281DoPushSeg ss, 1
282DoPopSeg ss, 1
283DoPushSeg cs, 1
284 %endif
285
286%endif ; BS3_INSTANTIATING_CMN
287
288%include "bs3kit-template-footer.mac" ; reset environment
289
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